LLVM: llvm::SelectionDAGISel Class Reference (original) (raw)
SelectionDAGISel - This is the common base class used for SelectionDAG-based pattern-matching instruction selectors. More...
#include "[llvm/CodeGen/SelectionDAGISel.h](SelectionDAGISel%5F8h%5Fsource.html)"
| Public Member Functions | |
|---|---|
| SelectionDAGISel (TargetMachine &tm, CodeGenOptLevel OL=CodeGenOptLevel::Default) | |
| virtual | ~SelectionDAGISel () |
| BatchAAResults * | getBatchAA () const |
| Returns a (possibly null) pointer to the current BatchAAResults. | |
| const TargetLowering * | getTargetLowering () const |
| void | initializeAnalysisResults (MachineFunctionAnalysisManager &MFAM) |
| void | initializeAnalysisResults (MachineFunctionPass &MFP) |
| virtual bool | runOnMachineFunction (MachineFunction &mf) |
| virtual void | emitFunctionEntryCode () |
| virtual void | PreprocessISelDAG () |
| PreprocessISelDAG - This hook allows targets to hack on the graph before instruction selection starts. | |
| virtual void | PostprocessISelDAG () |
| PostprocessISelDAG() - This hook allows the target to hack on the graph right after selection. | |
| virtual void | Select (SDNode *N)=0 |
| Main hook for targets to transform nodes into machine nodes. | |
| virtual bool | SelectInlineAsmMemoryOperand (const SDValue &Op, InlineAsm::ConstraintCode ConstraintID, std::vector< SDValue > &OutOps) |
| SelectInlineAsmMemoryOperand - Select the specified address as a target addressing mode, according to the specified constraint. | |
| virtual bool | IsProfitableToFold (SDValue N, SDNode *U, SDNode *Root) const |
| IsProfitableToFold - Returns true if it's profitable to fold the specific operand node N of U during instruction selection that starts at Root. | |
| bool | CheckAndMask (SDValue LHS, ConstantSDNode *RHS, int64_t DesiredMaskS) const |
| CheckAndMask - The isel is trying to match something like (and X, 255). | |
| bool | CheckOrMask (SDValue LHS, ConstantSDNode *RHS, int64_t DesiredMaskS) const |
| CheckOrMask - The isel is trying to match something like (or X, 255). | |
| virtual bool | CheckPatternPredicate (unsigned PredNo) const |
| CheckPatternPredicate - This function is generated by tblgen in the target. | |
| virtual bool | CheckNodePredicate (SDValue Op, unsigned PredNo) const |
| CheckNodePredicate - This function is generated by tblgen in the target. | |
| virtual bool | CheckNodePredicateWithOperands (SDValue Op, unsigned PredNo, ArrayRef< SDValue > Operands) const |
| CheckNodePredicateWithOperands - This function is generated by tblgen in the target. | |
| virtual bool | CheckComplexPattern (SDNode *Root, SDNode *Parent, SDValue N, unsigned PatternNo, SmallVectorImpl< std::pair< SDValue, SDNode * > > &Result) |
| virtual SDValue | RunSDNodeXForm (SDValue V, unsigned XFormNo) |
| void | SelectCodeCommon (SDNode *NodeToMatch, const unsigned char *MatcherTable, unsigned TableSize) |
| virtual bool | ComplexPatternFuncMutatesDAG () const |
| Return true if complex patterns for this target can mutate the DAG. | |
| bool | mayRaiseFPException (SDNode *Node) const |
| Return whether the node may raise an FP exception. | |
| bool | isOrEquivalentToAdd (const SDNode *N) const |
| Static Public Member Functions | |
|---|---|
| static bool | IsLegalToFold (SDValue N, SDNode *U, SDNode *Root, CodeGenOptLevel OptLevel, bool IgnoreChains=false) |
| IsLegalToFold - Returns true if the specific operand node N of U can be folded during instruction selection that starts at Root. | |
| static void | InvalidateNodeId (SDNode *N) |
| static int | getUninvalidatedNodeId (SDNode *N) |
| static void | EnforceNodeIdInvariant (SDNode *N) |
| static int | getNumFixedFromVariadicInfo (unsigned Flags) |
| getNumFixedFromVariadicInfo - Transform an EmitNode flags word into the number of fixed arity values that should be skipped when copying from the root. |
| Public Attributes | |
|---|---|
| TargetMachine & | TM |
| const TargetLibraryInfo * | LibInfo |
| const RTLIB::RuntimeLibcallsInfo * | RuntimeLibCallInfo |
| std::unique_ptr< FunctionLoweringInfo > | FuncInfo |
| std::unique_ptr< SwiftErrorValueTracking > | SwiftError |
| MachineFunction * | MF |
| MachineModuleInfo * | MMI |
| MachineRegisterInfo * | RegInfo |
| SelectionDAG * | CurDAG |
| std::unique_ptr< SelectionDAGBuilder > | SDB |
| std::optional< BatchAAResults > | BatchAA |
| AssumptionCache * | AC = nullptr |
| GCFunctionInfo * | GFI = nullptr |
| SSPLayoutInfo * | SP = nullptr |
| const TargetTransformInfo * | TTI = nullptr |
| CodeGenOptLevel | OptLevel |
| const TargetInstrInfo * | TII |
| const TargetLowering * | TLI |
| bool | FastISelFailed |
| SmallPtrSet< const Instruction *, 4 > | ElidedArgCopyInstrs |
| std::unique_ptr< OptimizationRemarkEmitter > | ORE |
| Current optimization remark emitter. | |
| bool | MatchFilterFuncName = false |
| True if the function currently processing is in the function printing list (i.e. | |
| StringRef | FuncName |
| Protected Member Functions | |
|---|---|
| void | ReplaceUses (SDValue F, SDValue T) |
| ReplaceUses - replace all uses of the old node F with the use of the new node T. | |
| void | ReplaceUses (const SDValue *F, const SDValue *T, unsigned Num) |
| ReplaceUses - replace all uses of the old nodes F with the use of the new nodes T. | |
| void | ReplaceUses (SDNode *F, SDNode *T) |
| ReplaceUses - replace all uses of the old node F with the use of the new node T. | |
| void | ReplaceNode (SDNode *F, SDNode *T) |
| Replace all uses of F with T, then remove F from the DAG. | |
| void | SelectInlineAsmMemoryOperands (std::vector< SDValue > &Ops, const SDLoc &DL) |
| SelectInlineAsmMemoryOperands - Calls to this are automatically generated by tblgen. | |
| virtual StringRef | getPatternForIndex (unsigned index) |
| getPatternForIndex - Patterns selected by tablegen during ISEL | |
| virtual StringRef | getIncludePathForIndex (unsigned index) |
| getIncludePathForIndex - get the td source location of pattern instantiation | |
| bool | shouldOptForSize (const MachineFunction *MF) const |
| Protected Attributes | |
|---|---|
| unsigned | DAGSize = 0 |
| DAGSize - Size of DAG being instruction selected. |
SelectionDAGISel - This is the common base class used for SelectionDAG-based pattern-matching instruction selectors.
Definition at line 45 of file SelectionDAGISel.h.
◆ anonymous enum
| Enumerator |
|---|
| OPFL_None |
| OPFL_Chain |
| OPFL_GlueInput |
| OPFL_GlueOutput |
| OPFL_MemRefs |
| OPFL_Variadic0 |
| OPFL_Variadic1 |
| OPFL_Variadic2 |
| OPFL_Variadic3 |
| OPFL_Variadic4 |
| OPFL_Variadic5 |
| OPFL_Variadic6 |
| OPFL_Variadic7 |
| OPFL_VariadicInfo |
Definition at line 330 of file SelectionDAGISel.h.
◆ BuiltinOpcodes
| Enumerator |
|---|
| OPC_Scope |
| OPC_RecordNode |
| OPC_RecordChild0 |
| OPC_RecordChild1 |
| OPC_RecordChild2 |
| OPC_RecordChild3 |
| OPC_RecordChild4 |
| OPC_RecordChild5 |
| OPC_RecordChild6 |
| OPC_RecordChild7 |
| OPC_RecordMemRef |
| OPC_CaptureGlueInput |
| OPC_CaptureDeactivationSymbol |
| OPC_MoveChild |
| OPC_MoveChild0 |
| OPC_MoveChild1 |
| OPC_MoveChild2 |
| OPC_MoveChild3 |
| OPC_MoveChild4 |
| OPC_MoveChild5 |
| OPC_MoveChild6 |
| OPC_MoveChild7 |
| OPC_MoveSibling |
| OPC_MoveSibling0 |
| OPC_MoveSibling1 |
| OPC_MoveSibling2 |
| OPC_MoveSibling3 |
| OPC_MoveSibling4 |
| OPC_MoveSibling5 |
| OPC_MoveSibling6 |
| OPC_MoveSibling7 |
| OPC_MoveParent |
| OPC_CheckSame |
| OPC_CheckChild0Same |
| OPC_CheckChild1Same |
| OPC_CheckChild2Same |
| OPC_CheckChild3Same |
| OPC_CheckPatternPredicate |
| OPC_CheckPatternPredicate0 |
| OPC_CheckPatternPredicate1 |
| OPC_CheckPatternPredicate2 |
| OPC_CheckPatternPredicate3 |
| OPC_CheckPatternPredicate4 |
| OPC_CheckPatternPredicate5 |
| OPC_CheckPatternPredicate6 |
| OPC_CheckPatternPredicate7 |
| OPC_CheckPatternPredicateTwoByte |
| OPC_CheckPredicate |
| OPC_CheckPredicate0 |
| OPC_CheckPredicate1 |
| OPC_CheckPredicate2 |
| OPC_CheckPredicate3 |
| OPC_CheckPredicate4 |
| OPC_CheckPredicate5 |
| OPC_CheckPredicate6 |
| OPC_CheckPredicate7 |
| OPC_CheckPredicateWithOperands |
| OPC_CheckOpcode |
| OPC_SwitchOpcode |
| OPC_CheckType |
| OPC_CheckTypeI32 |
| OPC_CheckTypeI64 |
| OPC_CheckTypeRes |
| OPC_SwitchType |
| OPC_CheckChild0Type |
| OPC_CheckChild1Type |
| OPC_CheckChild2Type |
| OPC_CheckChild3Type |
| OPC_CheckChild4Type |
| OPC_CheckChild5Type |
| OPC_CheckChild6Type |
| OPC_CheckChild7Type |
| OPC_CheckChild0TypeI32 |
| OPC_CheckChild1TypeI32 |
| OPC_CheckChild2TypeI32 |
| OPC_CheckChild3TypeI32 |
| OPC_CheckChild4TypeI32 |
| OPC_CheckChild5TypeI32 |
| OPC_CheckChild6TypeI32 |
| OPC_CheckChild7TypeI32 |
| OPC_CheckChild0TypeI64 |
| OPC_CheckChild1TypeI64 |
| OPC_CheckChild2TypeI64 |
| OPC_CheckChild3TypeI64 |
| OPC_CheckChild4TypeI64 |
| OPC_CheckChild5TypeI64 |
| OPC_CheckChild6TypeI64 |
| OPC_CheckChild7TypeI64 |
| OPC_CheckInteger |
| OPC_CheckChild0Integer |
| OPC_CheckChild1Integer |
| OPC_CheckChild2Integer |
| OPC_CheckChild3Integer |
| OPC_CheckChild4Integer |
| OPC_CheckCondCode |
| OPC_CheckChild2CondCode |
| OPC_CheckValueType |
| OPC_CheckComplexPat |
| OPC_CheckComplexPat0 |
| OPC_CheckComplexPat1 |
| OPC_CheckComplexPat2 |
| OPC_CheckComplexPat3 |
| OPC_CheckComplexPat4 |
| OPC_CheckComplexPat5 |
| OPC_CheckComplexPat6 |
| OPC_CheckComplexPat7 |
| OPC_CheckAndImm |
| OPC_CheckOrImm |
| OPC_CheckImmAllOnesV |
| OPC_CheckImmAllZerosV |
| OPC_CheckFoldableChainNode |
| OPC_EmitInteger |
| OPC_EmitInteger8 |
| OPC_EmitInteger16 |
| OPC_EmitInteger32 |
| OPC_EmitInteger64 |
| OPC_EmitStringInteger |
| OPC_EmitStringInteger32 |
| OPC_EmitRegister |
| OPC_EmitRegisterI32 |
| OPC_EmitRegisterI64 |
| OPC_EmitRegister2 |
| OPC_EmitConvertToTarget |
| OPC_EmitConvertToTarget0 |
| OPC_EmitConvertToTarget1 |
| OPC_EmitConvertToTarget2 |
| OPC_EmitConvertToTarget3 |
| OPC_EmitConvertToTarget4 |
| OPC_EmitConvertToTarget5 |
| OPC_EmitConvertToTarget6 |
| OPC_EmitConvertToTarget7 |
| OPC_EmitMergeInputChains |
| OPC_EmitMergeInputChains1_0 |
| OPC_EmitMergeInputChains1_1 |
| OPC_EmitMergeInputChains1_2 |
| OPC_EmitCopyToReg |
| OPC_EmitCopyToReg0 |
| OPC_EmitCopyToReg1 |
| OPC_EmitCopyToReg2 |
| OPC_EmitCopyToReg3 |
| OPC_EmitCopyToReg4 |
| OPC_EmitCopyToReg5 |
| OPC_EmitCopyToReg6 |
| OPC_EmitCopyToReg7 |
| OPC_EmitCopyToRegTwoByte |
| OPC_EmitNodeXForm |
| OPC_EmitNode |
| OPC_EmitNode0 |
| OPC_EmitNode1 |
| OPC_EmitNode2 |
| OPC_EmitNode0None |
| OPC_EmitNode1None |
| OPC_EmitNode2None |
| OPC_EmitNode0Chain |
| OPC_EmitNode1Chain |
| OPC_EmitNode2Chain |
| OPC_MorphNodeTo |
| OPC_MorphNodeTo0 |
| OPC_MorphNodeTo1 |
| OPC_MorphNodeTo2 |
| OPC_MorphNodeTo0None |
| OPC_MorphNodeTo1None |
| OPC_MorphNodeTo2None |
| OPC_MorphNodeTo0Chain |
| OPC_MorphNodeTo1Chain |
| OPC_MorphNodeTo2Chain |
| OPC_MorphNodeTo0GlueInput |
| OPC_MorphNodeTo1GlueInput |
| OPC_MorphNodeTo2GlueInput |
| OPC_MorphNodeTo0GlueOutput |
| OPC_MorphNodeTo1GlueOutput |
| OPC_MorphNodeTo2GlueOutput |
| OPC_CompleteMatch |
| OPC_Coverage |
Definition at line 141 of file SelectionDAGISel.h.
Definition at line 393 of file SelectionDAGISel.cpp.
References CurDAG, FuncInfo, llvm::PassRegistry::getPassRegistry(), llvm::initializeAAResultsWrapperPassPass(), llvm::initializeBranchProbabilityInfoWrapperPassPass(), llvm::initializeGCModuleInfoPass(), llvm::initializeTargetLibraryInfoWrapperPassPass(), OptLevel, SDB, SwiftError, and TM.
Referenced by llvm::AMDGPUDAGToDAGISel::AMDGPUDAGToDAGISel(), llvm::HexagonDAGToDAGISel::HexagonDAGToDAGISel(), llvm::LoongArchDAGToDAGISel::LoongArchDAGToDAGISel(), llvm::MipsDAGToDAGISel::MipsDAGToDAGISel(), llvm::NVPTXDAGToDAGISel::NVPTXDAGToDAGISel(), and llvm::RISCVDAGToDAGISel::RISCVDAGToDAGISel().
◆ ~SelectionDAGISel()
| SelectionDAGISel::~SelectionDAGISel ( ) | virtual |
|---|
◆ CheckAndMask()
CheckAndMask - The isel is trying to match something like (and X, 255).
If the dag combiner simplified the 255, we still want to match. RHS is the actual value in the DAG on the RHS of an AND, and DesiredMaskS is the value specified in the .td file (e.g. 255).
Definition at line 2215 of file SelectionDAGISel.cpp.
References CurDAG, and llvm::APInt::isSubsetOf().
Referenced by CheckAndImm().
◆ CheckComplexPattern()
◆ CheckNodePredicate()
CheckNodePredicate - This function is generated by tblgen in the target.
It runs node predicate number PredNo and returns true if it succeeds or false if it fails. The number is a private implementation detail to the code tblgen produces.
Definition at line 429 of file SelectionDAGISel.h.
References llvm_unreachable.
Referenced by CheckNodePredicate(), and SelectCodeCommon().
◆ CheckNodePredicateWithOperands()
CheckNodePredicateWithOperands - This function is generated by tblgen in the target.
It runs node predicate number PredNo and returns true if it succeeds or false if it fails. The number is a private implementation detail to the code tblgen produces.
Definition at line 439 of file SelectionDAGISel.h.
References llvm_unreachable.
Referenced by SelectCodeCommon().
◆ CheckOrMask()
◆ CheckPatternPredicate()
| virtual bool llvm::SelectionDAGISel::CheckPatternPredicate ( unsigned PredNo) const | inlinevirtual |
|---|
◆ ComplexPatternFuncMutatesDAG()
| virtual bool llvm::SelectionDAGISel::ComplexPatternFuncMutatesDAG ( ) const | inlinevirtual |
|---|
◆ emitFunctionEntryCode()
| virtual void llvm::SelectionDAGISel::emitFunctionEntryCode ( ) | inlinevirtual |
|---|
◆ EnforceNodeIdInvariant()
| void SelectionDAGISel::EnforceNodeIdInvariant ( SDNode * N) | static |
|---|
◆ getBatchAA()
◆ getIncludePathForIndex()
| virtual StringRef llvm::SelectionDAGISel::getIncludePathForIndex ( unsigned index) | inlineprotectedvirtual |
|---|
◆ getNumFixedFromVariadicInfo()
| int llvm::SelectionDAGISel::getNumFixedFromVariadicInfo ( unsigned Flags) | inlinestatic |
|---|
◆ getPatternForIndex()
| virtual StringRef llvm::SelectionDAGISel::getPatternForIndex ( unsigned index) | inlineprotectedvirtual |
|---|
◆ getTargetLowering()
◆ getUninvalidatedNodeId()
| int SelectionDAGISel::getUninvalidatedNodeId ( SDNode * N) | static |
|---|
◆ initializeAnalysisResults() [1/2]
Definition at line 468 of file SelectionDAGISel.cpp.
References AC, BatchAA, CurDAG, FAM, FuncInfo, FuncName, llvm::Value::getName(), llvm::GlobalValue::getParent(), llvm::AnalysisManager< IRUnitT, ExtraArgTs >::getResult(), GFI, llvm::Function::hasGC(), llvm::isAssignmentTrackingEnabled(), llvm::isFunctionInPrintList(), LibInfo, maintainPGOProfile(), MatchFilterFuncName, MF, MMI, llvm::None, OptLevel, ORE, RegInfo, SP, TII, TLI, TM, TTI, and UseMBPI.
◆ initializeAnalysisResults() [2/2]
Definition at line 525 of file SelectionDAGISel.cpp.
References AC, BatchAA, CurDAG, FuncInfo, FuncName, llvm::AAResultsWrapperPass::getAAResults(), llvm::Pass::getAnalysis(), llvm::Pass::getAnalysisIfAvailable(), llvm::Value::getName(), llvm::GlobalValue::getParent(), GFI, llvm::Function::hasGC(), llvm::isAssignmentTrackingEnabled(), llvm::isFunctionInPrintList(), LibInfo, maintainPGOProfile(), MatchFilterFuncName, MF, MMI, llvm::None, OptLevel, ORE, RegInfo, SP, TII, TLI, TM, TTI, and UseMBPI.
◆ InvalidateNodeId()
| void SelectionDAGISel::InvalidateNodeId ( SDNode * N) | static |
|---|
◆ IsLegalToFold()
◆ isOrEquivalentToAdd()
◆ IsProfitableToFold()
◆ mayRaiseFPException()
| bool SelectionDAGISel::mayRaiseFPException | ( | SDNode * | Node | ) | const |
|---|
◆ PostprocessISelDAG()
| virtual void llvm::SelectionDAGISel::PostprocessISelDAG ( ) | inlinevirtual |
|---|
◆ PreprocessISelDAG()
| virtual void llvm::SelectionDAGISel::PreprocessISelDAG ( ) | inlinevirtual |
|---|
◆ ReplaceNode()
| void llvm::SelectionDAGISel::ReplaceNode ( SDNode * F, SDNode * T ) | inlineprotected |
|---|
Replace all uses of F with T, then remove F from the DAG.
Definition at line 384 of file SelectionDAGISel.h.
References CurDAG, EnforceNodeIdInvariant(), F, and T.
Referenced by llvm::HexagonDAGToDAGISel::FastFDiv(), llvm::HexagonDAGToDAGISel::FDiv(), llvm::AMDGPUDAGToDAGISel::Select(), llvm::RISCVDAGToDAGISel::Select(), llvm::HexagonDAGToDAGISel::SelectAddSubCarry(), llvm::HexagonDAGToDAGISel::SelectConstant(), llvm::HexagonDAGToDAGISel::SelectConstantFP(), llvm::HexagonDAGToDAGISel::SelectD2P(), llvm::HexagonDAGToDAGISel::SelectExtractSubvector(), llvm::HexagonDAGToDAGISel::SelectFrameIndex(), llvm::HexagonDAGToDAGISel::SelectIntrinsicWOChain(), llvm::HexagonDAGToDAGISel::SelectP2D(), llvm::HexagonDAGToDAGISel::SelectQ2V(), llvm::RISCVDAGToDAGISel::selectSF_VC_X_SE(), llvm::HexagonDAGToDAGISel::SelectSHL(), llvm::HexagonDAGToDAGISel::SelectTypecast(), llvm::HexagonDAGToDAGISel::SelectV2Q(), llvm::HexagonDAGToDAGISel::SelectV65Gather(), llvm::HexagonDAGToDAGISel::SelectV65GatherPred(), llvm::HexagonDAGToDAGISel::SelectVAlign(), llvm::HexagonDAGToDAGISel::SelectVAlignAddr(), llvm::RISCVDAGToDAGISel::selectVSETVLI(), llvm::RISCVDAGToDAGISel::selectVSSEG(), llvm::RISCVDAGToDAGISel::selectVSXSEG(), llvm::RISCVDAGToDAGISel::selectXSfmmVSET(), llvm::RISCVDAGToDAGISel::tryIndexedLoad(), llvm::RISCVDAGToDAGISel::tryShrinkShlLogicImm(), llvm::RISCVDAGToDAGISel::trySignedBitfieldExtract(), llvm::RISCVDAGToDAGISel::trySignedBitfieldInsertInSign(), llvm::RISCVDAGToDAGISel::tryUnsignedBitfieldExtract(), and llvm::RISCVDAGToDAGISel::tryUnsignedBitfieldInsertInZero().
◆ ReplaceUses() [1/3]
◆ ReplaceUses() [2/3]
| void llvm::SelectionDAGISel::ReplaceUses ( SDNode * F, SDNode * T ) | inlineprotected |
|---|
◆ ReplaceUses() [3/3]
ReplaceUses - replace all uses of the old node F with the use of the new node T.
Definition at line 363 of file SelectionDAGISel.h.
References CurDAG, EnforceNodeIdInvariant(), F, and T.
Referenced by llvm::AMDGPUDAGToDAGISel::PostprocessISelDAG(), llvm::RISCVDAGToDAGISel::Select(), llvm::HexagonDAGToDAGISel::SelectBrevLdIntrinsic(), SelectCodeCommon(), llvm::HexagonDAGToDAGISel::SelectHVXDualOutput(), llvm::HexagonDAGToDAGISel::SelectIndexedLoad(), llvm::HexagonDAGToDAGISel::SelectIndexedStore(), llvm::HexagonDAGToDAGISel::SelectNewCircIntrinsic(), llvm::RISCVDAGToDAGISel::selectVLSEG(), llvm::RISCVDAGToDAGISel::selectVLSEGFF(), llvm::RISCVDAGToDAGISel::selectVLXSEG(), llvm::HexagonDAGToDAGISel::StoreInstrForLoadIntrinsic(), and llvm::HexagonDAGToDAGISel::tryLoadOfLoadIntrinsic().
◆ runOnMachineFunction()
Reimplemented in llvm::AMDGPUDAGToDAGISel, llvm::HexagonDAGToDAGISel, llvm::LoongArchDAGToDAGISel, llvm::MipsDAGToDAGISel, llvm::NVPTXDAGToDAGISel, and llvm::RISCVDAGToDAGISel.
Definition at line 582 of file SelectionDAGISel.cpp.
References AC, assert(), llvm::MachineBasicBlock::begin(), llvm::BuildMI(), llvm::cast(), CurDAG, llvm::dbgs(), llvm::LLVMContext::diagnose(), DL, EnableFastISelFallbackReport, llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::end(), FastISelFailed, llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::find(), FuncInfo, FuncName, getBatchAA(), llvm::Function::getContext(), llvm::MachineFunction::getFunction(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), GFI, llvm::MachineFrameInfo::hasCalls(), I, llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::insert(), llvm::MachineBasicBlock::insert(), llvm::MachineBasicBlock::insertAfter(), llvm::isa(), ISEL_DUMP, llvm::Register::isVirtual(), LibInfo, LLVM_DEBUG, MBB, MF, MI, MRI, llvm::None, OptLevel, llvm::printReg(), llvm::SmallVectorTemplateBase< T, bool >::push_back(), RegInfo, SDB, llvm::MachineFrameInfo::setHasCalls(), llvm::succ_empty(), SwiftError, TII, TLI, TRI, TTI, llvm::MachineFunction::useDebugInstrRef(), and UseMI.
Referenced by llvm::AMDGPUDAGToDAGISel::runOnMachineFunction(), llvm::HexagonDAGToDAGISel::runOnMachineFunction(), llvm::LoongArchDAGToDAGISel::runOnMachineFunction(), llvm::MipsDAGToDAGISel::runOnMachineFunction(), llvm::NVPTXDAGToDAGISel::runOnMachineFunction(), and llvm::RISCVDAGToDAGISel::runOnMachineFunction().
◆ RunSDNodeXForm()
◆ Select()
| virtual void llvm::SelectionDAGISel::Select ( SDNode * N) | pure virtual |
|---|
◆ SelectCodeCommon()
Definition at line 3280 of file SelectionDAGISel.cpp.
References AbstractManglingParser< Derived, Alloc >::NumOps, AbstractManglingParser< Derived, Alloc >::Ops, llvm::any_of(), llvm::SmallVectorImpl< T >::append(), assert(), llvm::ISD::AssertAlign, llvm::ISD::AssertNoFPClass, llvm::ISD::AssertSext, llvm::ISD::AssertZext, llvm::SmallVectorTemplateCommon< T, typename >::back(), llvm::ISD::BasicBlock, llvm::SmallVectorTemplateCommon< T, typename >::begin(), llvm::cast(), CheckAndImm(), CheckChild2CondCode(), CheckChildInteger(), CheckChildSame(), CheckChildType(), CheckComplexPattern(), CheckCondCode(), CheckInteger(), CheckNodePredicate(), CheckNodePredicateWithOperands(), CheckOpcode(), CheckOrImm(), CheckPatternPredicate(), CheckSame(), CheckValueType(), llvm::SmallVectorImpl< T >::clear(), ComplexPatternFuncMutatesDAG(), llvm::ISD::Constant, llvm::ISD::ConstantFP, llvm::ISD::CopyFromReg, llvm::ISD::CopyToReg, CurDAG, llvm::dbgs(), llvm::ISD::DEACTIVATION_SYMBOL, decodeSignRotatedValue(), llvm::ISD::DELETED_NODE, llvm::dyn_cast(), llvm::SmallVectorTemplateCommon< T, typename >::empty(), llvm::SmallVectorTemplateCommon< T, typename >::end(), llvm::ISD::EntryToken, llvm::erase(), llvm::ISD::FREEZE, getIncludePathForIndex(), llvm::SDValue::getNode(), getNumFixedFromVariadicInfo(), llvm::SDNode::getNumOperands(), llvm::SDNode::getNumValues(), llvm::SDNode::getOpcode(), llvm::SDNode::getOperand(), getPatternForIndex(), getSimpleVT(), llvm::EVT::getSizeInBits(), llvm::SDValue::getValue(), llvm::SDValue::getValueSizeInBits(), llvm::SDNode::getValueType(), llvm::SDValue::getValueType(), GetVBR(), HandleMergeInputChains(), llvm::is_contained(), llvm::ISD::isConstantSplatVectorAllOnes(), llvm::ISD::isConstantSplatVectorAllZeros(), IsLegalToFold(), llvm::SDNode::isMachineOpcode(), IsPredicateKnownToFail(), IsProfitableToFold(), LLVM_DEBUG, mayRaiseFPException(), llvm::ISD::MCSymbol, N, llvm::SDNodeFlags::NoFPExcept, Opc, OPC_CaptureDeactivationSymbol, OPC_CaptureGlueInput, OPC_CheckAndImm, OPC_CheckChild0Integer, OPC_CheckChild0Same, OPC_CheckChild0Type, OPC_CheckChild0TypeI32, OPC_CheckChild0TypeI64, OPC_CheckChild1Integer, OPC_CheckChild1Same, OPC_CheckChild1Type, OPC_CheckChild1TypeI32, OPC_CheckChild1TypeI64, OPC_CheckChild2CondCode, OPC_CheckChild2Integer, OPC_CheckChild2Same, OPC_CheckChild2Type, OPC_CheckChild2TypeI32, OPC_CheckChild2TypeI64, OPC_CheckChild3Integer, OPC_CheckChild3Same, OPC_CheckChild3Type, OPC_CheckChild3TypeI32, OPC_CheckChild3TypeI64, OPC_CheckChild4Integer, OPC_CheckChild4Type, OPC_CheckChild4TypeI32, OPC_CheckChild4TypeI64, OPC_CheckChild5Type, OPC_CheckChild5TypeI32, OPC_CheckChild5TypeI64, OPC_CheckChild6Type, OPC_CheckChild6TypeI32, OPC_CheckChild6TypeI64, OPC_CheckChild7Type, OPC_CheckChild7TypeI32, OPC_CheckChild7TypeI64, OPC_CheckComplexPat, OPC_CheckComplexPat0, OPC_CheckComplexPat1, OPC_CheckComplexPat2, OPC_CheckComplexPat3, OPC_CheckComplexPat4, OPC_CheckComplexPat5, OPC_CheckComplexPat6, OPC_CheckComplexPat7, OPC_CheckCondCode, OPC_CheckFoldableChainNode, OPC_CheckImmAllOnesV, OPC_CheckImmAllZerosV, OPC_CheckInteger, OPC_CheckOpcode, OPC_CheckOrImm, OPC_CheckPatternPredicate, OPC_CheckPatternPredicate0, OPC_CheckPatternPredicate1, OPC_CheckPatternPredicate2, OPC_CheckPatternPredicate3, OPC_CheckPatternPredicate4, OPC_CheckPatternPredicate5, OPC_CheckPatternPredicate6, OPC_CheckPatternPredicate7, OPC_CheckPatternPredicateTwoByte, OPC_CheckPredicate, OPC_CheckPredicate0, OPC_CheckPredicate1, OPC_CheckPredicate2, OPC_CheckPredicate3, OPC_CheckPredicate4, OPC_CheckPredicate5, OPC_CheckPredicate6, OPC_CheckPredicate7, OPC_CheckPredicateWithOperands, OPC_CheckSame, OPC_CheckType, OPC_CheckTypeI32, OPC_CheckTypeI64, OPC_CheckTypeRes, OPC_CheckValueType, OPC_CompleteMatch, OPC_Coverage, OPC_EmitConvertToTarget, OPC_EmitConvertToTarget0, OPC_EmitConvertToTarget1, OPC_EmitConvertToTarget2, OPC_EmitConvertToTarget3, OPC_EmitConvertToTarget4, OPC_EmitConvertToTarget5, OPC_EmitConvertToTarget6, OPC_EmitConvertToTarget7, OPC_EmitCopyToReg, OPC_EmitCopyToReg0, OPC_EmitCopyToReg1, OPC_EmitCopyToReg2, OPC_EmitCopyToReg3, OPC_EmitCopyToReg4, OPC_EmitCopyToReg5, OPC_EmitCopyToReg6, OPC_EmitCopyToReg7, OPC_EmitCopyToRegTwoByte, OPC_EmitInteger, OPC_EmitInteger16, OPC_EmitInteger32, OPC_EmitInteger64, OPC_EmitInteger8, OPC_EmitMergeInputChains, OPC_EmitMergeInputChains1_0, OPC_EmitMergeInputChains1_1, OPC_EmitMergeInputChains1_2, OPC_EmitNode, OPC_EmitNode0, OPC_EmitNode0Chain, OPC_EmitNode0None, OPC_EmitNode1, OPC_EmitNode1Chain, OPC_EmitNode1None, OPC_EmitNode2, OPC_EmitNode2Chain, OPC_EmitNode2None, OPC_EmitNodeXForm, OPC_EmitRegister, OPC_EmitRegister2, OPC_EmitRegisterI32, OPC_EmitRegisterI64, OPC_EmitStringInteger, OPC_EmitStringInteger32, OPC_MorphNodeTo, OPC_MorphNodeTo0, OPC_MorphNodeTo0Chain, OPC_MorphNodeTo0GlueInput, OPC_MorphNodeTo0GlueOutput, OPC_MorphNodeTo0None, OPC_MorphNodeTo1, OPC_MorphNodeTo1Chain, OPC_MorphNodeTo1GlueInput, OPC_MorphNodeTo1GlueOutput, OPC_MorphNodeTo1None, OPC_MorphNodeTo2, OPC_MorphNodeTo2Chain, OPC_MorphNodeTo2GlueInput, OPC_MorphNodeTo2GlueOutput, OPC_MorphNodeTo2None, OPC_MoveChild, OPC_MoveChild0, OPC_MoveChild1, OPC_MoveChild2, OPC_MoveChild3, OPC_MoveChild4, OPC_MoveChild5, OPC_MoveChild6, OPC_MoveChild7, OPC_MoveParent, OPC_MoveSibling, OPC_MoveSibling0, OPC_MoveSibling1, OPC_MoveSibling2, OPC_MoveSibling3, OPC_MoveSibling4, OPC_MoveSibling5, OPC_MoveSibling6, OPC_MoveSibling7, OPC_RecordChild0, OPC_RecordChild1, OPC_RecordChild2, OPC_RecordChild3, OPC_RecordChild4, OPC_RecordChild5, OPC_RecordChild6, OPC_RecordChild7, OPC_RecordMemRef, OPC_RecordNode, OPC_Scope, OPC_SwitchOpcode, OPC_SwitchType, OPFL_Chain, OPFL_GlueInput, OPFL_GlueOutput, OPFL_MemRefs, OPFL_None, OPFL_VariadicInfo, OptLevel, llvm::ISD::POISON, llvm::SmallVectorTemplateBase< T, bool >::pop_back(), llvm::SmallVectorTemplateBase< T, bool >::push_back(), llvm::ISD::READ_REGISTER, llvm::ISD::Register, llvm::ISD::RegisterMask, ReplaceUses(), llvm::SmallVectorImpl< T >::resize(), RunSDNodeXForm(), SDValue(), llvm::SDNode::setNodeId(), llvm::SmallVectorTemplateCommon< T, typename >::size(), llvm::ISD::TargetBlockAddress, llvm::ISD::TargetConstant, llvm::ISD::TargetConstantFP, llvm::ISD::TargetConstantPool, llvm::ISD::TargetExternalSymbol, llvm::ISD::TargetFrameIndex, llvm::ISD::TargetGlobalAddress, llvm::ISD::TargetGlobalTLSAddress, llvm::ISD::TargetJumpTable, TII, TLI, llvm::ISD::TokenFactor, llvm::ISD::UNDEF, llvm::SDNode::use_empty(), llvm::SDNode::uses(), and llvm::ISD::WRITE_REGISTER.
◆ SelectInlineAsmMemoryOperand()
◆ SelectInlineAsmMemoryOperands()
| void SelectionDAGISel::SelectInlineAsmMemoryOperands ( std::vector< SDValue > & Ops, const SDLoc & DL ) | protected |
|---|
SelectInlineAsmMemoryOperands - Calls to this are automatically generated by tblgen.
Others should not call it.
Definition at line 2280 of file SelectionDAGISel.cpp.
References AbstractManglingParser< Derived, Alloc >::Ops, llvm::append_range(), assert(), CurDAG, DL, llvm::InlineAsm::Func, getValueType(), llvm::InlineAsm::Mem, llvm::InlineAsm::Op_AsmString, llvm::InlineAsm::Op_ExtraInfo, llvm::InlineAsm::Op_FirstOperand, llvm::InlineAsm::Op_InputChain, llvm::InlineAsm::Op_MDNode, llvm::report_fatal_error(), and SelectInlineAsmMemoryOperand().
◆ shouldOptForSize()
◆ AC
◆ BatchAA
◆ CurDAG
Definition at line 55 of file SelectionDAGISel.h.
Referenced by llvm::RISCVDAGToDAGISel::addVectorLoadStoreOperands(), llvm::RISCVDAGToDAGISel::areOffsetsWithinAlignment(), CheckAndMask(), CheckOrMask(), llvm::HexagonDAGToDAGISel::DetectUseSxtw(), llvm::HexagonDAGToDAGISel::FastFDiv(), llvm::HexagonDAGToDAGISel::FDiv(), llvm::MipsDAGToDAGISel::getGlobalBaseReg(), llvm::HexagonDAGToDAGISel::HvxSelector, initializeAnalysisResults(), initializeAnalysisResults(), IsPredicateKnownToFail(), llvm::HexagonDAGToDAGISel::LoadInstrForLoadIntrinsic(), llvm::AMDGPUDAGToDAGISel::matchLoadD16FromBuildVector(), mayRaiseFPException(), llvm::RISCVDAGToDAGISel::orDisjoint(), llvm::AMDGPUDAGToDAGISel::PostprocessISelDAG(), llvm::RISCVDAGToDAGISel::PostprocessISelDAG(), llvm::AMDGPUDAGToDAGISel::PreprocessISelDAG(), llvm::HexagonDAGToDAGISel::PreprocessISelDAG(), llvm::RISCVDAGToDAGISel::PreprocessISelDAG(), ReplaceNode(), ReplaceUses(), ReplaceUses(), ReplaceUses(), runOnMachineFunction(), llvm::AMDGPUDAGToDAGISel::Select(), llvm::RISCVDAGToDAGISel::Select(), llvm::LoongArchDAGToDAGISel::SelectAddrConstant(), llvm::HexagonDAGToDAGISel::SelectAddrFI(), llvm::RISCVDAGToDAGISel::SelectAddrFrameIndex(), llvm::RISCVDAGToDAGISel::SelectAddrRegImm(), llvm::LoongArchDAGToDAGISel::SelectAddrRegImm12(), llvm::RISCVDAGToDAGISel::SelectAddrRegImm9(), llvm::RISCVDAGToDAGISel::SelectAddrRegImmLsb00000(), llvm::RISCVDAGToDAGISel::SelectAddrRegRegScale(), llvm::HexagonDAGToDAGISel::SelectAddSubCarry(), llvm::HexagonDAGToDAGISel::SelectAnyImmediate(), llvm::HexagonDAGToDAGISel::SelectAnyInt(), llvm::LoongArchDAGToDAGISel::SelectBaseAddr(), llvm::HexagonDAGToDAGISel::SelectBrevLdIntrinsic(), llvm::AMDGPUDAGToDAGISel::SelectBuildVector(), SelectCodeCommon(), llvm::HexagonDAGToDAGISel::SelectConstant(), llvm::HexagonDAGToDAGISel::SelectConstantFP(), llvm::HexagonDAGToDAGISel::SelectD2P(), llvm::HexagonDAGToDAGISel::SelectExtractSubvector(), llvm::HexagonDAGToDAGISel::SelectFrameIndex(), llvm::HexagonDAGToDAGISel::SelectGlobalAddress(), llvm::HexagonDAGToDAGISel::SelectHVXDualOutput(), llvm::HexagonDAGToDAGISel::SelectIndexedLoad(), llvm::HexagonDAGToDAGISel::SelectIndexedStore(), llvm::HexagonDAGToDAGISel::SelectInlineAsmMemoryOperand(), llvm::LoongArchDAGToDAGISel::SelectInlineAsmMemoryOperand(), llvm::NVPTXDAGToDAGISel::SelectInlineAsmMemoryOperand(), llvm::RISCVDAGToDAGISel::SelectInlineAsmMemoryOperand(), SelectInlineAsmMemoryOperands(), llvm::HexagonDAGToDAGISel::SelectIntrinsicWChain(), llvm::HexagonDAGToDAGISel::SelectIntrinsicWOChain(), llvm::RISCVDAGToDAGISel::selectInvLogicImm(), SelectionDAGISel(), llvm::HexagonDAGToDAGISel::SelectNewCircIntrinsic(), llvm::HexagonDAGToDAGISel::SelectP2D(), llvm::HexagonDAGToDAGISel::SelectQ2V(), llvm::RISCVDAGToDAGISel::selectRVVSimm5(), llvm::RISCVDAGToDAGISel::selectScalarFPAsInt(), llvm::RISCVDAGToDAGISel::selectSETCC(), llvm::RISCVDAGToDAGISel::selectSExtBits(), llvm::LoongArchDAGToDAGISel::selectSExti32(), llvm::RISCVDAGToDAGISel::selectSF_VC_X_SE(), llvm::LoongArchDAGToDAGISel::selectShiftMask(), llvm::RISCVDAGToDAGISel::selectShiftMask(), llvm::HexagonDAGToDAGISel::SelectSHL(), llvm::RISCVDAGToDAGISel::selectSHXADD_UWOp(), llvm::RISCVDAGToDAGISel::selectSHXADDOp(), llvm::RISCVDAGToDAGISel::selectSimm5Shl2(), llvm::HexagonDAGToDAGISel::SelectTypecast(), llvm::HexagonDAGToDAGISel::SelectV2Q(), llvm::HexagonDAGToDAGISel::SelectV65Gather(), llvm::HexagonDAGToDAGISel::SelectV65GatherPred(), llvm::HexagonDAGToDAGISel::SelectVAlign(), llvm::HexagonDAGToDAGISel::SelectVAlignAddr(), llvm::AMDGPUDAGToDAGISel::SelectVectorShuffle(), llvm::RISCVDAGToDAGISel::selectVLOp(), llvm::RISCVDAGToDAGISel::selectVLSEG(), llvm::RISCVDAGToDAGISel::selectVLSEGFF(), llvm::RISCVDAGToDAGISel::selectVLXSEG(), llvm::RISCVDAGToDAGISel::selectVSETVLI(), llvm::LoongArchDAGToDAGISel::selectVSplatImm(), llvm::RISCVDAGToDAGISel::selectVSplatSimm5(), llvm::RISCVDAGToDAGISel::selectVSplatSimm5Plus1(), llvm::RISCVDAGToDAGISel::selectVSplatSimm5Plus1NoDec(), llvm::RISCVDAGToDAGISel::selectVSplatSimm5Plus1NonZero(), llvm::RISCVDAGToDAGISel::selectVSplatUimm(), llvm::LoongArchDAGToDAGISel::selectVSplatUimmInvPow2(), llvm::LoongArchDAGToDAGISel::selectVSplatUimmPow2(), llvm::RISCVDAGToDAGISel::selectVSSEG(), llvm::RISCVDAGToDAGISel::selectVSXSEG(), llvm::RISCVDAGToDAGISel::selectXSfmmVSET(), llvm::RISCVDAGToDAGISel::selectZExtBits(), llvm::LoongArchDAGToDAGISel::selectZExti32(), shouldOptForSize(), llvm::HexagonDAGToDAGISel::StoreInstrForLoadIntrinsic(), llvm::RISCVDAGToDAGISel::tryIndexedLoad(), llvm::HexagonDAGToDAGISel::tryLoadOfLoadIntrinsic(), llvm::RISCVDAGToDAGISel::tryShrinkShlLogicImm(), llvm::RISCVDAGToDAGISel::trySignedBitfieldExtract(), llvm::RISCVDAGToDAGISel::trySignedBitfieldInsertInSign(), llvm::RISCVDAGToDAGISel::tryUnsignedBitfieldExtract(), llvm::RISCVDAGToDAGISel::tryUnsignedBitfieldInsertInZero(), and ~SelectionDAGISel().
◆ DAGSize
| unsigned llvm::SelectionDAGISel::DAGSize = 0 | protected |
|---|
◆ ElidedArgCopyInstrs
◆ FastISelFailed
bool llvm::SelectionDAGISel::FastISelFailed
◆ FuncInfo
◆ FuncName
◆ GFI
◆ LibInfo
◆ MatchFilterFuncName
bool llvm::SelectionDAGISel::MatchFilterFuncName = false
True if the function currently processing is in the function printing list (i.e.
-filter-print-funcs). This is primarily used by ISEL_DUMP, which spans in multiple member functions. Storing the filter result here so that we only need to do the filtering once.
Definition at line 77 of file SelectionDAGISel.h.
Referenced by initializeAnalysisResults(), and initializeAnalysisResults().
◆ MF
Definition at line 52 of file SelectionDAGISel.h.
Referenced by llvm::AMDGPUDAGToDAGISel::AMDGPUDAGToDAGISel(), llvm::createBURRListDAGScheduler(), llvm::createDAGLinearizer(), llvm::createDefaultScheduler(), llvm::createFastDAGScheduler(), llvm::createHybridListDAGScheduler(), llvm::createILPListDAGScheduler(), llvm::createSourceListDAGScheduler(), llvm::createVLIWDAGScheduler(), llvm::HexagonDAGToDAGISel::emitFunctionEntryCode(), llvm::MipsDAGToDAGISel::getGlobalBaseReg(), initializeAnalysisResults(), initializeAnalysisResults(), isOrEquivalentToAdd(), llvm::NVPTXDAGToDAGISel::NVPTXDAGToDAGISel(), llvm::RISCVDAGToDAGISel::PreprocessISelDAG(), llvm::ResourcePriorityQueue::ResourcePriorityQueue(), llvm::AMDGPUDAGToDAGISel::runOnMachineFunction(), llvm::HexagonDAGToDAGISel::runOnMachineFunction(), llvm::LoongArchDAGToDAGISel::runOnMachineFunction(), llvm::MipsDAGToDAGISel::runOnMachineFunction(), llvm::NVPTXDAGToDAGISel::runOnMachineFunction(), llvm::RISCVDAGToDAGISel::runOnMachineFunction(), runOnMachineFunction(), llvm::HexagonDAGToDAGISel::SelectAddrFI(), llvm::HexagonDAGToDAGISel::SelectFrameIndex(), and shouldOptForSize().
◆ MMI
◆ OptLevel
Definition at line 62 of file SelectionDAGISel.h.
Referenced by llvm::AMDGPUDAGToDAGISel::AMDGPUDAGToDAGISel(), llvm::AMDGPUDAGToDAGISel::AMDGPUDAGToDAGISel(), llvm::HexagonDAGToDAGISel::HexagonDAGToDAGISel(), initializeAnalysisResults(), initializeAnalysisResults(), IsLegalToFold(), IsProfitableToFold(), llvm::LoongArchDAGToDAGISel::LoongArchDAGToDAGISel(), llvm::NVPTXDAGToDAGISel::NVPTXDAGToDAGISel(), llvm::NVPTXDAGToDAGISel::NVPTXDAGToDAGISel(), llvm::RISCVDAGToDAGISel::RISCVDAGToDAGISel(), runOnMachineFunction(), SelectCodeCommon(), and SelectionDAGISel().
◆ ORE
◆ RegInfo
◆ RuntimeLibCallInfo
◆ SDB
◆ SP
◆ SwiftError
◆ TII
◆ TLI
Definition at line 64 of file SelectionDAGISel.h.
Referenced by llvm::createDefaultScheduler(), llvm::createHybridListDAGScheduler(), llvm::createILPListDAGScheduler(), getTargetLowering(), initializeAnalysisResults(), initializeAnalysisResults(), IsPredicateKnownToFail(), llvm::ResourcePriorityQueue::ResourcePriorityQueue(), runOnMachineFunction(), llvm::RISCVDAGToDAGISel::Select(), and SelectCodeCommon().
◆ TM
◆ TTI
The documentation for this class was generated from the following files:
- include/llvm/CodeGen/SelectionDAGISel.h
- lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
- lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp