TargetSubtargetInfo.cpp Source File (original) (raw)

15using namespace llvm;

22 const InstrStage *IS, const unsigned *OC, const unsigned *FP)

23 : MCSubtargetInfo(TT, CPU, TuneCPU, FS, PN, PF, PD, WPR, WL, RA, IS, OC,

24 FP) {}

SI optimize exec mask operations pre RA

ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...

MCSubtargetInfo(const MCSubtargetInfo &)=default

const MCSchedModel & getSchedModel() const

Get the machine model for this subtarget's CPU.

StringRef - Represent a constant reference to a string, i.e.

virtual bool enableJoinGlobalCopies() const

True if the subtarget should enable joining global copies.

Definition TargetSubtargetInfo.cpp:40

~TargetSubtargetInfo() override

virtual bool enableIndirectBrExpand() const

True if the subtarget should run the indirectbr expansion pass.

Definition TargetSubtargetInfo.cpp:32

virtual bool enableRALocalReassignment(CodeGenOptLevel OptLevel) const

True if the subtarget should run the local reassignment heuristic of the register allocator.

Definition TargetSubtargetInfo.cpp:44

virtual bool enableMachineScheduler() const

True if the subtarget should run MachineScheduler after aggressive coalescing.

Definition TargetSubtargetInfo.cpp:36

virtual bool useAA() const

Enable use of alias analysis during code generation (during MI scheduling, DAGCombine,...

Definition TargetSubtargetInfo.cpp:57

virtual void mirFileLoaded(MachineFunction &MF) const

This is called after a .mir file was loaded.

Definition TargetSubtargetInfo.cpp:61

virtual bool enablePostRAMachineScheduler() const

True if the subtarget should run a machine scheduler after register allocation.

Definition TargetSubtargetInfo.cpp:53

virtual bool enableAtomicExpand() const

True if the subtarget should run the atomic expansion pass.

Definition TargetSubtargetInfo.cpp:28

virtual bool enablePostRAScheduler() const

True if the subtarget should run a scheduler after register allocation.

Definition TargetSubtargetInfo.cpp:49

TargetSubtargetInfo()=delete

Triple - Helper class for working with autoconf configuration names.

This is an optimization pass for GlobalISel generic memory operations.

CodeGenOptLevel

Code generation optimization level.

These values represent a non-pipelined step in the execution of an instruction.

Specify the number of cycles allowed after instruction issue before a particular use operand reads it...

Specify the latency in cpu cycles for a particular scheduling class and def index.

Identify one of the processor resource kinds consumed by a particular scheduling class for the specif...