Thumb2ITBlockPass.cpp Source File (original) (raw)

26#include

27#include

29using namespace llvm;

31#define DEBUG_TYPE "thumb2-it"

32#define PASS_NAME "Thumb IT blocks insertion pass"

34 STATISTIC(NumITs, "Number of IT blocks inserted");

35 STATISTIC(NumMovedInsts, "Number of predicated instructions moved");

39namespace {

42 public:

43 static char ID;

45 bool restrictIT;

56 }

58 StringRef getPassName() const override {

60 }

62 private:

65 RegisterSet &Defs, RegisterSet &Uses);

67 };

69 char Thumb2ITBlock::ID = 0;

71}

81 RegList LocalDefs;

82 RegList LocalUses;

84 for (auto &MO : MI->operands()) {

85 if (!MO.isReg())

86 continue;

87 Register Reg = MO.getReg();

88 if (!Reg || Reg == ARM::ITSTATE || Reg == ARM::SP)

89 continue;

90 if (MO.isUse())

91 LocalUses.push_back(Reg);

92 else

93 LocalDefs.push_back(Reg);

94 }

96 auto InsertUsesDefs = [&](RegList &Regs, RegisterSet &UsesDefs) {

97 for (unsigned Reg : Regs)

98 UsesDefs.insert_range(TRI->subregs_inclusive(Reg));

99 };

100

101 InsertUsesDefs(LocalDefs, Defs);

102 InsertUsesDefs(LocalUses, Uses);

103}

104

105

106

107

110 if (!MO.isReg() || MO.isDef() || !MO.isKill())

111 continue;

112 if ( Uses .count(MO.getReg()))

113 continue;

114 MO.setIsKill(false);

115 }

116}

117

119 switch (MI->getOpcode()) {

120 default:

121 return false;

122 case ARM::MOVr:

123 case ARM::MOVr_TC:

124 case ARM::tMOVr:

125 case ARM::t2MOVr:

126 return true;

127 }

128}

129

130bool

133 RegisterSet &Defs, RegisterSet &Uses) {

135 return false;

136

137

138

139 assert(MI->getOperand(0).getSubReg() == 0 &&

140 MI->getOperand(1).getSubReg() == 0 &&

141 "Sub-register indices still around?");

142

143 Register DstReg = MI->getOperand(0).getReg();

144 Register SrcReg = MI->getOperand(1).getReg();

145

146

147 if (Uses.count(DstReg) || Defs.count(SrcReg))

148 return false;

149

150

151

152

153

154

155

156

157

158

159

160

161

162

163

164

165

166 const MCInstrDesc &MCID = MI->getDesc();

167 if (MI->hasOptionalDef() &&

168 MI->getOperand(MCID.getNumOperands() - 1).getReg() == ARM::CPSR)

169 return false;

170

171

172

174 ++I;

176

177 while (I != E && I->isDebugInstr())

178 ++I;

179

180 if (I != E) {

183 if (NCC == CC || NCC == OCC)

184 return true;

185 }

186 return false;

187}

188

189bool Thumb2ITBlock::InsertITInstructions(MachineBasicBlock &MBB) {

193

194 while (MBBI != E) {

195 MachineInstr *MI = &*MBBI;

201 continue;

202 }

203

204 Defs.clear();

205 Uses.clear();

207

208

211

212

214 true, false));

215

216 MachineInstr *LastITMI = MI;

219

220

222 unsigned Mask = 0, Pos = 3;

223

224

225

226 if (!restrictIT) {

228

229

230 for (; MBBI != E && Pos &&

231 (->isBranch() && ->isReturn()) ; ++MBBI) {

232 if (MBBI->isDebugInstr())

233 continue;

234

235 MachineInstr *NMI = &*MBBI;

236 MI = NMI;

237

240 if (NCC == CC || NCC == OCC) {

241 Mask |= ((NCC ^ CC) & 1) << Pos;

242

244 true, false));

245 LastITMI = NMI;

246 } else {

248 MoveCopyOutOfITBlock(NMI, CC, OCC, Defs, Uses)) {

253 ++NumMovedInsts;

254 continue;

255 }

256 break;

257 }

259 --Pos;

260 }

261 }

262

263

264 Mask |= (1 << Pos);

266

267

270

271

274

276 ++NumITs;

277 }

278

280}

281

282bool Thumb2ITBlock::runOnMachineFunction(MachineFunction &Fn) {

283 const ARMSubtarget &STI = Fn.getSubtarget();

285 return false;

286 AFI = Fn.getInfo();

287 TII = static_cast<const Thumb2InstrInfo *>(STI.getInstrInfo());

290

292 return false;

293

295 for (auto &MBB : Fn )

297

300

302}

303

304

305

assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")

const TargetInstrInfo & TII

MachineBasicBlock MachineBasicBlock::iterator MBBI

static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")

Promote Memory to Register

#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)

Remove Loads Into Fake Uses

This file defines the SmallSet class.

This file defines the SmallVector class.

This file defines the 'Statistic' class, which is designed to be an easy way to expose various metric...

#define STATISTIC(VARNAME, DESC)

SmallSet< unsigned, 4 > RegisterSet

Definition Thumb2ITBlockPass.cpp:37

static bool isCopy(MachineInstr *MI)

Definition Thumb2ITBlockPass.cpp:118

static void ClearKillFlags(MachineInstr *MI, RegisterSet &Uses)

Clear kill flags for any uses in the given set.

Definition Thumb2ITBlockPass.cpp:108

static void TrackDefUses(MachineInstr *MI, RegisterSet &Defs, RegisterSet &Uses, const TargetRegisterInfo *TRI)

TrackDefUses - Tracking what registers are being defined and used by instructions in the IT block.

Definition Thumb2ITBlockPass.cpp:78

ARMFunctionInfo - This class is derived from MachineFunctionInfo and contains private ARM-specific in...

void setHasITBlocks(bool h)

bool isThumbFunction() const

const ARMBaseInstrInfo * getInstrInfo() const override

const ARMBaseRegisterInfo * getRegisterInfo() const override

FunctionPass class - This class is used to implement most global optimizations.

unsigned getNumOperands() const

Return the number of declared MachineOperands for this MachineInstruction.

const MCInstrDesc & get(unsigned Opcode) const

Return the machine instruction descriptor that corresponds to the specified instruction opcode.

LLVM_ABI instr_iterator insert(instr_iterator I, MachineInstr *M)

Insert MI into the instruction list before I, possibly inside a bundle.

MachineInstr * remove(MachineInstr *I)

Remove the unbundled instruction from the instruction list without deleting it.

MachineInstrBundleIterator< MachineInstr > iterator

MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...

Properties which a MachineFunction may have at a given point in time.

const TargetSubtargetInfo & getSubtarget() const

getSubtarget - Return the subtarget for which this machine code is being compiled.

Ty * getInfo()

getInfo - Keep track of various per-function pieces of information for backends that would like to do...

const MachineInstrBuilder & addImm(int64_t Val) const

Add a new immediate operand.

MachineInstr * getInstr() const

If conversion operators fail, use this method to get the MachineInstr explicitly.

instr_iterator getInstrIterator() const

Representation of each machine instruction.

LLVM_ABI void addOperand(MachineFunction &MF, const MachineOperand &Op)

Add the specified operand to the instruction.

MachineOperand * findRegisterUseOperand(Register Reg, const TargetRegisterInfo *TRI, bool isKill=false)

Wrapper for findRegisterUseOperandIdx, it returns a pointer to the MachineOperand rather than an inde...

MachineOperand class - Representation of each machine instruction operand.

void setIsKill(bool Val=true)

static MachineOperand CreateReg(Register Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false, bool isRenamable=false)

SmallSet - This maintains a set of unique values, optimizing for the case when the set is small (less...

This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.

StringRef - Represent a constant reference to a string, i.e.

TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...

self_iterator getIterator()

static CondCodes getOppositeCondition(CondCodes CC)

constexpr std::underlying_type_t< E > Mask()

Get a bitmask with 1s in all places up to the high-order bit of E's largest value.

unsigned ID

LLVM IR allows to use arbitrary numbers as calling convention identifiers.

This is an optimization pass for GlobalISel generic memory operations.

LLVM_ABI void finalizeBundle(MachineBasicBlock &MBB, MachineBasicBlock::instr_iterator FirstMI, MachineBasicBlock::instr_iterator LastMI)

finalizeBundle - Finalize a machine instruction bundle which includes a sequence of instructions star...

MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)

Builder interface. Specify how to create the initial instruction itself.

ARMCC::CondCodes getITInstrPredicate(const MachineInstr &MI, Register &PredReg)

getITInstrPredicate - Valid only in Thumb2 mode.

LLVM_ABI raw_ostream & dbgs()

dbgs() - This returns a reference to a raw_ostream for debugging messages.

FunctionPass * createThumb2ITBlockPass()

createThumb2ITBlockPass - Returns an instance of the Thumb2 IT blocks insertion pass.

Definition Thumb2ITBlockPass.cpp:306