X86Subtarget.h Source File (original) (raw)

13#ifndef LLVM_LIB_TARGET_X86_X86SUBTARGET_H

14#define LLVM_LIB_TARGET_X86_X86SUBTARGET_H

23#include

24#include

26#define GET_SUBTARGETINFO_HEADER

27#include "X86GenSubtargetInfo.inc"

29namespace llvm {

31class CallLowering;

32class GlobalValue;

33class InstructionSelector;

34class LegalizerInfo;

35class RegisterBankInfo;

36class StringRef;

37class TargetMachine;

53 enum X86SSEEnum {

54 NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2, AVX512

55 };

63 X86SSEEnum X86SSELevel = NoSSE;

65#define GET_SUBTARGETINFO_MACRO(ATTRIBUTE, DEFAULT, GETTER) \

66 bool ATTRIBUTE = DEFAULT;

67#include "X86GenSubtargetInfo.inc"

70 Align stackAlignment = Align(4);

72 Align TileConfigAlignment = Align(4);

77 unsigned MaxInlineSizeThreshold = 128;

80 Triple TargetTriple;

83 std::unique_ptr CallLoweringInfo;

84 std::unique_ptr Legalizer;

85 std::unique_ptr RegBankInfo;

86 std::unique_ptr InstSelector;

89 MaybeAlign StackAlignOverride;

92 unsigned PreferVectorWidthOverride;

96 unsigned PreferVectorWidth = UINT32_MAX;

99 unsigned RequiredVectorWidth;

100

101 X86SelectionDAGInfo TSInfo;

102

103

104 X86InstrInfo InstrInfo;

105 X86TargetLowering TLInfo;

106 X86FrameLowering FrameLowering;

107

108public:

109

110

111

112 X86Subtarget(const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS,

113 const X86TargetMachine &TM, MaybeAlign StackAlignOverride,

114 unsigned PreferVectorWidthOverride,

115 unsigned RequiredVectorWidth);

117

119 return &TLInfo;

120 }

121

123

125 return &FrameLowering;

126 }

127

129 return &TSInfo;

130 }

131

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157

158private:

159

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166public:

167

168#define GET_SUBTARGETINFO_MACRO(ATTRIBUTE, DEFAULT, GETTER) \

169 bool GETTER() const { return ATTRIBUTE; }

170#include "X86GenSubtargetInfo.inc"

171

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183

184 return hasCX16() && is64Bit();

185 }

186

187

189 bool hasSSE1() const { return X86SSELevel >= SSE1; }

190 bool hasSSE2() const { return X86SSELevel >= SSE2; }

191 bool hasSSE3() const { return X86SSELevel >= SSE3; }

192 bool hasSSSE3() const { return X86SSELevel >= SSSE3; }

193 bool hasSSE41() const { return X86SSELevel >= SSE41; }

194 bool hasSSE42() const { return X86SSELevel >= SSE42; }

195 bool hasAVX() const { return X86SSELevel >= AVX; }

196 bool hasAVX2() const { return X86SSELevel >= AVX2; }

197 bool hasAVX512() const { return X86SSELevel >= AVX512; }

199 bool hasAnyFMA() const { return hasFMA() || hasFMA4(); }

201

202

203 return hasPRFCHW();

204 }

206

207

208 return hasSSE1() || hasPRFCHW() || hasPREFETCHI();

209 }

211

212

213

215 return useRetpolineIndirectCalls() || useLVIControlFlowIntegrity();

216 }

218 return useRetpolineIndirectBranches() || useLVIControlFlowIntegrity();

219 }

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282 bool isTargetDarwin() const { return TargetTriple.isOSDarwin(); }

286 bool isTargetPS() const { return TargetTriple.isPS(); }

287

288 bool isTargetELF() const { return TargetTriple.isOSBinFormatELF(); }

289 bool isTargetCOFF() const { return TargetTriple.isOSBinFormatCOFF(); }

290 bool isTargetMachO() const { return TargetTriple.isOSBinFormatMachO(); }

291

292 bool isTargetLinux() const { return TargetTriple.isOSLinux(); }

294 bool isTargetHurd() const { return TargetTriple.isOSHurd(); }

295 bool isTargetGlibc() const { return TargetTriple.isOSGlibc(); }

297 bool isTargetMCU() const { return TargetTriple.isOSIAMCU(); }

299

301 return TargetTriple.isWindowsMSVCEnvironment();

302 }

303

305 return TargetTriple.isWindowsCoreCLREnvironment();

306 }

307

309 return TargetTriple.isWindowsCygwinEnvironment();

310 }

311

313 return TargetTriple.isWindowsGNUEnvironment();

314 }

315

317 return TargetTriple.isWindowsItaniumEnvironment();

318 }

319

321

322 bool isUEFI() const { return TargetTriple.isUEFI(); }

323

324 bool isOSWindows() const { return TargetTriple.isOSWindows(); }

325

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342 switch (CC) {

343

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358 return true;

359

361 return false;

362

363 default:

364 return false;

365 }

366 }

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373 const Module &M) const;

375

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378 const Module &M) const;

379 unsigned char

381

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398 unsigned Major = TT.getOSVersion().getMajor();

399 switch(TT.getOS()) {

400 default:

401 return false;

404 return Major < 15;

406 return Major < 8;

409 return Major < 12;

410 }

411 }

412

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423

424 void getPostRAMutations(std::vector<std::unique_ptr>

425 &Mutations) const override;

426

428 return TargetSubtargetInfo::ANTIDEP_CRITICAL;

429 }

430};

431

432}

433

434#endif

static bool is64Bit(const char *name)

A Module instance is used to store all the information related to an LLVM module.

Holds all the information related to register banks.

StringRef - Represent a constant reference to a string, i.e.

Primary interface to the complete machine description for the target machine.

Triple - Helper class for working with autoconf configuration names.

const X86RegisterInfo & getRegisterInfo() const

getRegisterInfo - TargetInstrInfo is a superset of MRegister info.

bool canExtendTo512BW() const

Definition X86Subtarget.h:231

bool hasAnyFMA() const

Definition X86Subtarget.h:199

bool enableEarlyIfConversion() const override

bool isOSWindows() const

Definition X86Subtarget.h:324

bool isTargetMachO() const

Definition X86Subtarget.h:290

unsigned getTileConfigSize() const

Definition X86Subtarget.h:136

bool canUseLAHFSAHF() const

Definition X86Subtarget.h:210

bool isUEFI() const

Definition X86Subtarget.h:322

bool isTargetKFreeBSD() const

Definition X86Subtarget.h:293

bool isXRaySupported() const override

Definition X86Subtarget.h:265

unsigned getRequiredVectorWidth() const

Definition X86Subtarget.h:222

bool useIndirectThunkBranches() const

Definition X86Subtarget.h:217

bool hasSSE1() const

Definition X86Subtarget.h:189

bool avoidMFence() const

Avoid use of mfence forfence seq_cst, and instead use lock or.

Definition X86Subtarget.h:278

bool useLight256BitInstructions() const

Definition X86Subtarget.h:252

bool isTargetSolaris() const

Definition X86Subtarget.h:285

bool hasBitScanPassThrough() const

Definition X86Subtarget.h:263

bool isPICStyleGOT() const

Definition X86Subtarget.h:332

bool isTargetWindowsCygwin() const

Definition X86Subtarget.h:308

bool hasSSE42() const

Definition X86Subtarget.h:194

InstructionSelector * getInstructionSelector() const override

const X86TargetLowering * getTargetLowering() const override

Definition X86Subtarget.h:118

bool hasMFence() const

Use mfence if we have SSE2 or we're on x86-64 (even if we asked for no-sse2).

Definition X86Subtarget.h:275

bool hasNoDomainDelayBlend() const

Definition X86Subtarget.h:239

Align getTileConfigAlignment() const

Definition X86Subtarget.h:137

bool isTargetMCU() const

Definition X86Subtarget.h:297

bool isTargetDragonFly() const

Definition X86Subtarget.h:284

bool canUseCMOV() const

Definition X86Subtarget.h:188

bool isPICStyleStubPIC() const

Definition X86Subtarget.h:335

bool isLegalToCallImmediateAddr() const

Return true if the subtarget allows calls to immediate address.

bool enableMachineScheduler() const override

Enable the MachineScheduler pass for all X86 subtargets.

Definition X86Subtarget.h:420

bool isTargetWindowsMSVC() const

Definition X86Subtarget.h:300

bool canUseCMPXCHG8B() const

Definition X86Subtarget.h:181

bool isTarget64BitILP32() const

Is this x86_64 with the ILP32 programming model (x32 ABI)?

Definition X86Subtarget.h:173

bool hasNoDomainDelayShuffle() const

Definition X86Subtarget.h:242

bool isTargetDarwin() const

Definition X86Subtarget.h:282

bool isTargetWin64() const

Definition X86Subtarget.h:328

bool hasPrefetchW() const

Definition X86Subtarget.h:200

bool isTarget64BitLP64() const

Is this x86_64 with the LP64 programming model (standard AMD64, no x32)?

Definition X86Subtarget.h:176

bool swiftAsyncContextIsDynamicallySet() const

Return whether FrameLowering should always set the "extended framepresent" bit in FP,...

Definition X86Subtarget.h:391

const Triple & getTargetTriple() const

Definition X86Subtarget.h:280

AntiDepBreakMode getAntiDepBreakMode() const override

Definition X86Subtarget.h:427

bool isTargetWindowsCoreCLR() const

Definition X86Subtarget.h:304

const X86InstrInfo * getInstrInfo() const override

Definition X86Subtarget.h:122

const RegisterBankInfo * getRegBankInfo() const override

bool useAVX512Regs() const

Definition X86Subtarget.h:248

bool isTargetCOFF() const

Definition X86Subtarget.h:289

bool hasSSE3() const

Definition X86Subtarget.h:191

bool isCallingConvWin64(CallingConv::ID CC) const

Definition X86Subtarget.h:341

bool hasAVX512() const

Definition X86Subtarget.h:197

bool canExtendTo512DQ() const

Definition X86Subtarget.h:228

bool hasSSE41() const

Definition X86Subtarget.h:193

Align getStackAlignment() const

Returns the minimum alignment known to hold of the stack frame on entry to the function and which mus...

Definition X86Subtarget.h:142

bool isTargetELF() const

Definition X86Subtarget.h:288

bool hasSSEPrefetch() const

Definition X86Subtarget.h:205

bool canUseCMPXCHG16B() const

Definition X86Subtarget.h:182

unsigned char classifyGlobalReference(const GlobalValue *GV, const Module &M) const

const LegalizerInfo * getLegalizerInfo() const override

bool isPositionIndependent() const

bool hasSSE2() const

Definition X86Subtarget.h:190

bool isTargetFreeBSD() const

Definition X86Subtarget.h:283

bool isTargetGlibc() const

Definition X86Subtarget.h:295

bool isTargetFuchsia() const

Definition X86Subtarget.h:298

bool hasSSSE3() const

Definition X86Subtarget.h:192

bool hasInt256() const

Definition X86Subtarget.h:198

bool isPICStyleRIPRel() const

Definition X86Subtarget.h:333

bool isTargetCygMing() const

Definition X86Subtarget.h:320

bool hasNoDomainDelay() const

Definition X86Subtarget.h:235

unsigned char classifyLocalReference(const GlobalValue *GV) const

Classify a global variable reference for the current subtarget according to how we should reference i...

unsigned char classifyBlockAddressReference() const

Classify a blockaddress reference for the current subtarget according to how we should reference it i...

PICStyles::Style getPICStyle() const

Definition X86Subtarget.h:178

bool enableIndirectBrExpand() const override

If we are using indirect thunks, we need to expand indirectbr to avoid it lowering to an actual indir...

Definition X86Subtarget.h:415

bool hasNoDomainDelayMov() const

Definition X86Subtarget.h:236

bool isTargetPS() const

Definition X86Subtarget.h:286

bool isTargetUEFI64() const

Definition X86Subtarget.h:326

const X86RegisterInfo * getRegisterInfo() const override

Definition X86Subtarget.h:132

void setPICStyle(PICStyles::Style Style)

Definition X86Subtarget.h:179

X86Subtarget(const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS, const X86TargetMachine &TM, MaybeAlign StackAlignOverride, unsigned PreferVectorWidthOverride, unsigned RequiredVectorWidth)

This constructor initializes the data members to match that of the specified triple.

bool hasAVX() const

Definition X86Subtarget.h:195

bool isTargetWindowsGNU() const

Definition X86Subtarget.h:312

unsigned getMaxInlineSizeThreshold() const

Returns the maximum memset / memcpy size that still makes it profitable to inline the call.

Definition X86Subtarget.h:146

unsigned getPreferVectorWidth() const

Definition X86Subtarget.h:221

bool isTargetWindowsItanium() const

Definition X86Subtarget.h:316

bool isTargetAndroid() const

Definition X86Subtarget.h:296

const CallLowering * getCallLowering() const override

Methods used by Global ISel.

bool hasCLFLUSH() const

Use clflush if we have SSE2 or we're on x86-64 (even if we asked for no-sse2).

Definition X86Subtarget.h:270

void ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS)

ParseSubtargetFeatures - Parses features string setting specified subtarget options.

const X86FrameLowering * getFrameLowering() const override

Definition X86Subtarget.h:124

void getPostRAMutations(std::vector< std::unique_ptr< ScheduleDAGMutation > > &Mutations) const override

bool isTargetHurd() const

Definition X86Subtarget.h:294

bool useBWIRegs() const

Definition X86Subtarget.h:256

bool isTargetWin32() const

Definition X86Subtarget.h:330

bool useIndirectThunkCalls() const

Definition X86Subtarget.h:214

unsigned char classifyGlobalFunctionReference(const GlobalValue *GV, const Module &M) const

Classify a global function reference for the current subtarget.

bool hasAVX2() const

Definition X86Subtarget.h:196

const X86SelectionDAGInfo * getSelectionDAGInfo() const override

Definition X86Subtarget.h:128

bool isTargetLinux() const

Definition X86Subtarget.h:292

unsigned ID

LLVM IR allows to use arbitrary numbers as calling convention identifiers.

@ X86_64_SysV

The C convention as specified in the x86-64 supplement to the System V ABI, used on most non-Windows ...

@ Swift

Calling convention for Swift.

@ X86_ThisCall

Similar to X86_StdCall.

@ X86_StdCall

stdcall is mostly used by the Win32 API.

@ Fast

Attempts to make calls as fast as possible (e.g.

@ X86_VectorCall

MSVC calling convention that passes vectors and vector aggregates in SSE registers.

@ Intel_OCL_BI

Used for Intel OpenCL built-ins.

@ Tail

Attemps to make calls as fast as possible while guaranteeing that tail call optimization can always b...

@ Win64

The C convention as implemented on Windows/x86-64 and AArch64.

@ SwiftTail

This follows the Swift calling convention in how arguments are passed but guarantees tail calls will ...

@ C

The default llvm calling convention, compatible with C.

@ X86_FastCall

'fast' analog of X86_StdCall.

The X86 backend supports a number of different styles of PIC.

Definition X86Subtarget.h:41

Style

Definition X86Subtarget.h:43

@ RIPRel

Definition X86Subtarget.h:46

@ StubPIC

Definition X86Subtarget.h:44

@ None

Definition X86Subtarget.h:47

@ GOT

Definition X86Subtarget.h:45

This is an optimization pass for GlobalISel generic memory operations.

This struct is a compact representation of a valid (non-zero power of two) alignment.