LLVM: llvm::X86Subtarget Class Reference (original ) (raw )#include "[Target/X86/X86Subtarget.h](X86Subtarget%5F8h%5Fsource.html)"
Public Member Functions
X86Subtarget (const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS, const X86TargetMachine &TM, MaybeAlign StackAlignOverride, unsigned PreferVectorWidthOverride, unsigned RequiredVectorWidth)
This constructor initializes the data members to match that of the specified triple.
~X86Subtarget () override
const X86TargetLowering *
getTargetLowering () const override
const X86InstrInfo *
getInstrInfo () const override
const X86FrameLowering *
getFrameLowering () const override
const X86SelectionDAGInfo *
getSelectionDAGInfo () const override
const X86RegisterInfo *
getRegisterInfo () const override
unsigned
getTileConfigSize () const
Align
getTileConfigAlignment () const
Align
getStackAlignment () const
Returns the minimum alignment known to hold of the stack frame on entry to the function and which must be maintained by every function for this subtarget.
unsigned
getMaxInlineSizeThreshold () const
Returns the maximum memset / memcpy size that still makes it profitable to inline the call.
void
ParseSubtargetFeatures (StringRef CPU, StringRef TuneCPU, StringRef FS)
ParseSubtargetFeatures - Parses features string setting specified subtarget options.
const CallLowering *
getCallLowering () const override
Methods used by Global ISel.
InstructionSelector *
getInstructionSelector () const override
const LegalizerInfo *
getLegalizerInfo () const override
const RegisterBankInfo *
getRegBankInfo () const override
bool
isTarget64BitILP32 () const
Is this x86_64 with the ILP32 programming model (x32 ABI)?
bool
isTarget64BitLP64 () const
Is this x86_64 with the LP64 programming model (standard AMD64, no x32)?
PICStyles::Style
getPICStyle () const
void
setPICStyle (PICStyles::Style Style)
bool
canUseCMPXCHG8B () const
bool
canUseCMPXCHG16B () const
bool
canUseCMOV () const
bool
hasSSE1 () const
bool
hasSSE2 () const
bool
hasSSE3 () const
bool
hasSSSE3 () const
bool
hasSSE41 () const
bool
hasSSE42 () const
bool
hasAVX () const
bool
hasAVX2 () const
bool
hasAVX512 () const
bool
hasInt256 () const
bool
hasAnyFMA () const
bool
hasPrefetchW () const
bool
hasSSEPrefetch () const
bool
canUseLAHFSAHF () const
bool
useIndirectThunkCalls () const
bool
useIndirectThunkBranches () const
unsigned
getPreferVectorWidth () const
unsigned
getRequiredVectorWidth () const
bool
canExtendTo512DQ () const
bool
canExtendTo512BW () const
bool
hasNoDomainDelay () const
bool
hasNoDomainDelayMov () const
bool
hasNoDomainDelayBlend () const
bool
hasNoDomainDelayShuffle () const
bool
useAVX512Regs () const
bool
useLight256BitInstructions () const
bool
useBWIRegs () const
bool
hasBitScanPassThrough () const
bool
isXRaySupported () const override
bool
hasCLFLUSH () const
Use clflush if we have SSE2 or we're on x86-64 (even if we asked for no-sse2).
bool
hasMFence () const
Use mfence if we have SSE2 or we're on x86-64 (even if we asked for no-sse2).
bool
avoidMFence () const
Avoid use of mfence forfence seq_cst, and instead use lock or.
const Triple &
getTargetTriple () const
bool
isTargetDarwin () const
bool
isTargetFreeBSD () const
bool
isTargetDragonFly () const
bool
isTargetSolaris () const
bool
isTargetPS () const
bool
isTargetELF () const
bool
isTargetCOFF () const
bool
isTargetMachO () const
bool
isTargetLinux () const
bool
isTargetKFreeBSD () const
bool
isTargetHurd () const
bool
isTargetGlibc () const
bool
isTargetAndroid () const
bool
isTargetMCU () const
bool
isTargetFuchsia () const
bool
isTargetWindowsMSVC () const
bool
isTargetWindowsCoreCLR () const
bool
isTargetWindowsCygwin () const
bool
isTargetWindowsGNU () const
bool
isTargetWindowsItanium () const
bool
isTargetCygMing () const
bool
isUEFI () const
bool
isOSWindows () const
bool
isTargetUEFI64 () const
bool
isTargetWin64 () const
bool
isTargetWin32 () const
bool
isPICStyleGOT () const
bool
isPICStyleRIPRel () const
bool
isPICStyleStubPIC () const
bool
isPositionIndependent () const
bool
isCallingConvWin64 (CallingConv::ID CC) const
unsigned char
classifyLocalReference (const GlobalValue *GV) const
Classify a global variable reference for the current subtarget according to how we should reference it in a non-pcrel context.
unsigned char
classifyGlobalReference (const GlobalValue *GV, const Module &M) const
unsigned char
classifyGlobalReference (const GlobalValue *GV) const
Classify a global variable reference for the current subtarget according to how we should reference it in a non-pcrel context.
unsigned char
classifyGlobalFunctionReference (const GlobalValue *GV, const Module &M) const
Classify a global function reference for the current subtarget.
unsigned char
classifyGlobalFunctionReference (const GlobalValue *GV) const override
unsigned char
classifyBlockAddressReference () const
Classify a blockaddress reference for the current subtarget according to how we should reference it in a non-pcrel context.
bool
isLegalToCallImmediateAddr () const
Return true if the subtarget allows calls to immediate address.
bool
swiftAsyncContextIsDynamicallySet () const
Return whether FrameLowering should always set the "extended frame present" bit in FP, or set it based on a symbol in the runtime.
bool
enableIndirectBrExpand () const override
If we are using indirect thunks, we need to expand indirectbr to avoid it lowering to an actual indirect jump.
bool
enableMachineScheduler () const override
Enable the MachineScheduler pass for all X86 subtargets.
bool
enableEarlyIfConversion () const override
void
getPostRAMutations (std::vector< std::unique_ptr< ScheduleDAGMutation > > &Mutations) const override
AntiDepBreakMode
getAntiDepBreakMode () const override
Definition at line 52 of file X86Subtarget.h .
This constructor initializes the data members to match that of the specified triple.
Definition at line 311 of file X86Subtarget.cpp .
References llvm::createX86InstructionSelector() , getRegisterInfo() , getStackAlignment() , getTargetLowering() , llvm::PICStyles::GOT , is64Bit() , isPositionIndependent() , isTargetCOFF() , isTargetDarwin() , isTargetELF() , llvm::CodeModel::Large , llvm::None , llvm::PICStyles::None , llvm::PICStyles::RIPRel , setPICStyle() , and llvm::PICStyles::StubPIC .
Referenced by ParseSubtargetFeatures() .
◆ ~X86Subtarget()
X86Subtarget::~X86Subtarget ( )
overridedefault
◆ avoidMFence()
bool llvm::X86Subtarget::avoidMFence ( ) const
inline
◆ canExtendTo512BW()
bool llvm::X86Subtarget::canExtendTo512BW ( ) const
inline
◆ canExtendTo512DQ()
bool llvm::X86Subtarget::canExtendTo512DQ ( ) const
inline
Definition at line 228 of file X86Subtarget.h .
References getPreferVectorWidth() , and hasAVX512() .
Referenced by canExtendTo512BW() , lower1BitShuffle() , LowerMULO() , LowerShift() , LowerShiftByScalarVariable() , LowerSIGN_EXTEND_Mask() , LowerTruncateVecI1() , LowerVectorCTLZ() , LowerVectorCTLZ_AVX512CDI() , LowerVectorCTPOP() , LowerZERO_EXTEND_Mask() , useAVX512Regs() , and useVPTERNLOG() .
◆ canUseCMOV()
bool llvm::X86Subtarget::canUseCMOV ( ) const
inline
◆ canUseCMPXCHG16B()
bool llvm::X86Subtarget::canUseCMPXCHG16B ( ) const
inline
◆ canUseCMPXCHG8B()
bool llvm::X86Subtarget::canUseCMPXCHG8B ( ) const
inline
◆ canUseLAHFSAHF()
bool llvm::X86Subtarget::canUseLAHFSAHF ( ) const
inline
◆ classifyBlockAddressReference()
unsigned char X86Subtarget::classifyBlockAddressReference
(
)
const
◆ classifyGlobalFunctionReference() [1/2]◆ classifyGlobalFunctionReference() [2/2]Classify a global function reference for the current subtarget.
Definition at line 191 of file X86Subtarget.cpp .
References llvm::dyn_cast_or_null() , F , llvm::GlobalValue::hasDLLImportStorageClass() , is64Bit() , isTargetCOFF() , isTargetELF() , llvm::X86II::MO_COFFSTUB , llvm::X86II::MO_DLLIMPORT , llvm::X86II::MO_GOTPCREL , llvm::X86II::MO_NO_FLAG , llvm::X86II::MO_PLT , llvm::Reloc::Static , and llvm::CallingConv::X86_RegCall .
Referenced by classifyGlobalFunctionReference() .
◆ classifyGlobalReference() [1/2]◆ classifyGlobalReference() [2/2]Definition at line 124 of file X86Subtarget.cpp .
References classifyLocalReference() , llvm::GlobalValue::getAbsoluteSymbolRange() , llvm::GlobalValue::hasDLLImportStorageClass() , is64Bit() , llvm::isa() , isOSWindows() , isPositionIndependent() , isTargetCOFF() , isTargetDarwin() , isTargetELF() , llvm::CodeModel::Large , llvm::X86II::MO_ABS8 , llvm::X86II::MO_COFFSTUB , llvm::X86II::MO_DARWIN_NONLAZY , llvm::X86II::MO_DARWIN_NONLAZY_PIC_BASE , llvm::X86II::MO_DLLIMPORT , llvm::X86II::MO_GOT , llvm::X86II::MO_GOTPCREL , llvm::X86II::MO_GOTPCREL_NORELAX , llvm::X86II::MO_NO_FLAG , and llvm::Reloc::Static .
Referenced by classifyGlobalReference() , and X86SelectAddress() .
◆ classifyLocalReference()Classify a global variable reference for the current subtarget according to how we should reference it in a non-pcrel context.
Definition at line 71 of file X86Subtarget.cpp .
References assert() , llvm::GlobalValue::hasCommonLinkage() , is64Bit() , llvm::isa() , llvm::GlobalValue::isDeclarationForLinker() , isPositionIndependent() , isTargetCOFF() , isTargetDarwin() , isTargetELF() , llvm::CodeModel::Large , llvm::X86II::MO_DARWIN_NONLAZY_PIC_BASE , llvm::X86II::MO_GOTOFF , llvm::X86II::MO_GOTPCREL_NORELAX , llvm::X86II::MO_NO_FLAG , llvm::X86II::MO_PIC_BASE_OFFSET , and llvm::CodeModel::Tiny .
Referenced by classifyBlockAddressReference() , classifyGlobalReference() , and X86SelectAddress() .
◆ enableEarlyIfConversion()
bool X86Subtarget::enableEarlyIfConversion ( ) const
override
◆ enableIndirectBrExpand()
bool llvm::X86Subtarget::enableIndirectBrExpand ( ) const
inlineoverride
◆ enableMachineScheduler()
bool llvm::X86Subtarget::enableMachineScheduler ( ) const
inlineoverride
Enable the MachineScheduler pass for all X86 subtargets.
Definition at line 420 of file X86Subtarget.h .
◆ getAntiDepBreakMode()
AntiDepBreakMode llvm::X86Subtarget::getAntiDepBreakMode ( ) const
inlineoverride
◆ getCallLowering()◆ getFrameLowering()◆ getInstrInfo()◆ getInstructionSelector()◆ getLegalizerInfo()◆ getMaxInlineSizeThreshold()
unsigned llvm::X86Subtarget::getMaxInlineSizeThreshold ( ) const
inline
◆ getPICStyle()◆ getPostRAMutations()
void X86Subtarget::getPostRAMutations ( std::vector< std::unique_ptr< ScheduleDAGMutation > > & Mutations ) const
override
◆ getPreferVectorWidth()
unsigned llvm::X86Subtarget::getPreferVectorWidth ( ) const
inline
◆ getRegBankInfo()◆ getRegisterInfo()◆ getRequiredVectorWidth()
unsigned llvm::X86Subtarget::getRequiredVectorWidth ( ) const
inline
◆ getSelectionDAGInfo()◆ getStackAlignment()
Align llvm::X86Subtarget::getStackAlignment ( ) const
inline
Returns the minimum alignment known to hold of the stack frame on entry to the function and which must be maintained by every function for this subtarget.
Definition at line 142 of file X86Subtarget.h .
Referenced by X86Subtarget() .
◆ getTargetLowering()◆ getTargetTriple()
const Triple & llvm::X86Subtarget::getTargetTriple ( ) const
inline
◆ getTileConfigAlignment()
Align llvm::X86Subtarget::getTileConfigAlignment ( ) const
inline
◆ getTileConfigSize()
unsigned llvm::X86Subtarget::getTileConfigSize ( ) const
inline
◆ hasAnyFMA()
bool llvm::X86Subtarget::hasAnyFMA ( ) const
inline
◆ hasAVX()
bool llvm::X86Subtarget::hasAVX ( ) const
inline
Definition at line 195 of file X86Subtarget.h .
Referenced by combineAdd() , combineAndShuffleNot() , combineBitcastvxi1() , combineCONCAT_VECTORS() , combineConcatVectorOps() , combineConstantPoolLoads() , combineEXTRACT_SUBVECTOR() , combineLoad() , combinePredicateReduction() , combinePTESTCC() , combineSelect() , combineSetCC() , combineSetCCMOVMSK() , combineToHorizontalAddSub() , combineVectorSizedSetCCEquality() , combineX86ShuffleChain() , convertIntLogicToFPLogic() , CopyToFromAsymmetricReg() , createVariablePermute() , EltsFromConsecutiveLoads() , llvm::X86RegisterInfo::getCalleeSavedRegs() , llvm::X86RegisterInfo::getCallPreservedMask() , getLoadStoreRegOpcode() , isLegalConversion() , LowerANY_EXTEND() , LowerATOMIC_STORE() , lowerBuildVectorAsBroadcast() , LowerEXTEND_VECTOR_INREG() , LowerShift() , lowerShuffleAsBlend() , lowerShuffleAsBroadcast() , lowerShuffleAsDecomposedShuffleMerge() , LowerToHorizontalOp() , lowerUINT_TO_FP_vXi32() , lowerV2F64Shuffle() , lowerV4F32Shuffle() , LowerVectorAllEqual() , LowerVSETCC() , LowerVSETCCWithSUBUS() , LowerZERO_EXTEND() , matchBinaryPermuteShuffle() , matchBinaryShuffle() , matchTruncateWithPACK() , matchUnaryPermuteShuffle() , matchUnaryShuffle() , llvm::X86::mayFoldLoad() , llvm::X86::mayFoldLoadIntoBroadcastFromMem() , useVectorCast() , and X86ChooseCmpOpcode() .
◆ hasAVX2()
bool llvm::X86Subtarget::hasAVX2 ( ) const
inline
Definition at line 196 of file X86Subtarget.h .
Referenced by combineBitcastvxi1() , combineBlendOfPermutes() , combineConcatVectorOps() , combineEXTRACT_SUBVECTOR() , combineSelect() , combineSetCC() , combineTargetShuffle() , combineToExtendBoolVectorInReg() , combineVSelectToBLENDV() , combineX86ShuffleChain() , combineX86ShufflesRecursively() , convertShiftLeftToScale() , createVariablePermute() , EltsFromConsecutiveLoads() , expandFP_TO_UINT_SSE() , foldVectorXorShiftIntoCmp() , hasInt256() , isHorizontalBinOp() , lower256BitShuffle() , lowerBuildVectorAsBlend() , lowerBuildVectorAsBroadcast() , LowerFunnelShift() , LowerMGATHER() , LowerRotate() , LowerShift() , lowerShuffleAsBlend() , lowerShuffleAsBroadcast() , lowerShuffleAsByteRotateAndPermute() , lowerShuffleAsDecomposedShuffleMerge() , lowerShuffleAsLanePermuteAndPermute() , lowerShuffleAsLanePermuteAndShuffle() , lowerShuffleAsRepeatedMaskAndLanePermute() , lowerShuffleAsSplitOrBlend() , lowerShuffleAsTruncBroadcast() , lowerShuffleWithPSHUFB() , lowerShuffleWithUndefHalf() , LowerToHorizontalOp() , lowerV16I16Shuffle() , lowerV2F64Shuffle() , lowerV2I64Shuffle() , lowerV2X128Shuffle() , lowerV32I8Shuffle() , lowerV4F32Shuffle() , lowerV4F64Shuffle() , lowerV4I32Shuffle() , lowerV4I64Shuffle() , lowerV8F32Shuffle() , lowerV8I16Shuffle() , lowerV8I32Shuffle() , matchBinaryPermuteShuffle() , matchBinaryShuffle() , matchUnaryPermuteShuffle() , and SplitOpsAndApply() .
◆ hasAVX512()
bool llvm::X86Subtarget::hasAVX512 ( ) const
inline
Definition at line 197 of file X86Subtarget.h .
Referenced by canCombineAsMaskOperation() , canExtendTo512DQ() , combineArithReduction() , combineAVX512SetCCToKMOV() , combineBitcast() , combineBitcastvxi1() , combineCastedMaskArithmetic() , combineCompareEqual() , combineConcatVectorOps() , combineExtSetcc() , combineLoad() , combineMaskedLoad() , combineMulToPMADDWD() , combinePMULH() , combineSelect() , combineSetCC() , combineStore() , combineTargetShuffle() , combineToExtendBoolVectorInReg() , combineTruncateWithSat() , combineVectorPack() , combineX86ShuffleChain() , commuteSelect() , convertShiftLeftToScale() , CopyToFromAsymmetricReg() , createVariablePermute() , EmitAVX512Test() , getAVX512Node() , getBroadcastOpcode() , llvm::X86RegisterInfo::getCalleeSavedRegs() , llvm::X86RegisterInfo::getCallPreservedMask() , llvm::X86RegisterInfo::getLargestLegalSuperClass() , getLoadStoreRegOpcode() , llvm::X86RegisterInfo::getReservedRegs() , isMaskableNode() , lower1BitShuffle() , lower512BitShuffle() , LowerBITCAST() , LowerEXTEND_VECTOR_INREG() , LowerFunnelShift() , LowerLoad() , LowerMGATHER() , LowerMLOAD() , LowerMSCATTER() , LowerMSTORE() , LowerMULH() , LowerRotate() , LowerShift() , lowerShuffleAsBitRotate() , lowerShuffleAsVTRUNC() , lowerShuffleWithUndefHalf() , lowerShuffleWithVPMOV() , LowerStore() , lowerUINT_TO_FP_v2i32() , lowerUINT_TO_FP_vXi32() , lowerV16I16Shuffle() , lowerV2X128Shuffle() , lowerV32I8Shuffle() , lowerV8F32Shuffle() , lowerV8I32Shuffle() , lowerVECTOR_COMPRESS() , LowerVSETCC() , matchBinaryPermuteShuffle() , matchBinaryShuffle() , matchShuffleAsBitRotate() , matchTruncateWithPACK() , matchUnaryPermuteShuffle() , matchUnaryShuffle() , supportedVectorShiftWithImm() , supportedVectorVarShift() , truncateAVX512SetCCNoBWI() , truncateVectorWithPACK() , useAVX512Regs() , useVectorCast() , and X86ChooseCmpOpcode() .
◆ hasBitScanPassThrough()
bool llvm::X86Subtarget::hasBitScanPassThrough ( ) const
inline
◆ hasCLFLUSH()
bool llvm::X86Subtarget::hasCLFLUSH ( ) const
inline
Use clflush if we have SSE2 or we're on x86-64 (even if we asked for no-sse2).
There isn't any reason to disable it if the target processor supports it.
Definition at line 270 of file X86Subtarget.h .
References hasSSE2() , and is64Bit() .
◆ hasInt256()
bool llvm::X86Subtarget::hasInt256 ( ) const
inline
Definition at line 198 of file X86Subtarget.h .
References hasAVX2() .
Referenced by combineConcatVectorOps() , combineHorizOpWithShuffle() , combineLoad() , combineLogicBlendIntoPBLENDV() , combinePMULH() , combinePredicateReduction() , combineSetCCMOVMSK() , combineSignExtendInReg() , combineToExtendBoolVectorInReg() , convertShiftLeftToScale() , EltsFromConsecutiveLoads() , getPMOVMSKB() , LowerABD() , LowerABS() , LowerADDSAT_SUBSAT() , LowerAVG() , LowerAVXExtend() , LowerBITREVERSE() , lowerBuildVectorAsBroadcast() , LowerEXTEND_VECTOR_INREG() , LowerMINMAX() , LowerMUL() , LowerMULH() , LowerMULO() , LowerShift() , LowerShiftByScalarImmediate() , LowerSIGN_EXTEND() , LowerVectorCTLZ() , LowerVectorCTPOP() , LowerVSETCC() , matchBinaryShuffle() , matchUnaryShuffle() , PromoteMaskArithmetic() , supportedVectorShiftWithImm() , supportedVectorVarShift() , and truncateVectorWithPACK() .
◆ hasMFence()
bool llvm::X86Subtarget::hasMFence ( ) const
inline
◆ hasNoDomainDelay()
bool llvm::X86Subtarget::hasNoDomainDelay ( ) const
inline
◆ hasNoDomainDelayBlend()
bool llvm::X86Subtarget::hasNoDomainDelayBlend ( ) const
inline
◆ hasNoDomainDelayMov()
bool llvm::X86Subtarget::hasNoDomainDelayMov ( ) const
inline
◆ hasNoDomainDelayShuffle()
bool llvm::X86Subtarget::hasNoDomainDelayShuffle ( ) const
inline
◆ hasPrefetchW()
bool llvm::X86Subtarget::hasPrefetchW ( ) const
inline
◆ hasSSE1()
bool llvm::X86Subtarget::hasSSE1 ( ) const
inline
Definition at line 189 of file X86Subtarget.h .
Referenced by canUseCMOV() , combineAnd() , combineBitcast() , combineBitcastvxi1() , combineCMov() , combineFAndFNotToFAndn() , combineFMinNumFMaxNum() , combineOr() , combineSelect() , combineSetCC() , combineXor() , convertIntLogicToFPLogic() , createMMXBuildVector() , createSetFPEnvNodes() , get64BitArgumentXMMs() , llvm::X86RegisterInfo::getCalleeSavedRegs() , llvm::X86RegisterInfo::getCallPreservedMask() , hasSSEPrefetch() , LowerATOMIC_STORE() , LowerStore() , matchBinaryPermuteShuffle() , matchBinaryShuffle() , and X86ChooseCmpOpcode() .
◆ hasSSE2()
bool llvm::X86Subtarget::hasSSE2 ( ) const
inline
Definition at line 190 of file X86Subtarget.h .
Referenced by combineAnd() , combineAndShuffleNot() , combineArithReduction() , combineBasicSADPattern() , combineBitcast() , combineBitcastvxi1() , combineCMov() , combineCompareEqual() , combineExtractWithShuffle() , combineFAndFNotToFAndn() , combineFMinNumFMaxNum() , combineFPToSInt() , combineLogicBlendIntoPBLENDV() , combineMOVMSK() , combineMulToPMADDWD() , combineMulToPMULDQ() , combineOr() , combinePMULH() , combinePredicateReduction() , combineSelect() , combineSetCC() , combineShiftToPMULH() , combineStore() , combineToExtendBoolVectorInReg() , combineTruncateWithSat() , combineVectorSizedSetCCEquality() , combineX86ShuffleChain() , combineXor() , convertIntLogicToFPLogic() , EltsFromConsecutiveLoads() , foldVectorXorShiftIntoCmp() , getZeroVector() , hasCLFLUSH() , hasMFence() , isLegalConversion() , LowerATOMIC_STORE() , LowerBITCAST() , LowerBuildVectorAsInsert() , LowerEXTEND_VECTOR_INREG() , lowerFPToIntToFP() , LowerMUL() , LowerMULH() , LowerShift() , LowerStore() , lowerV4F32Shuffle() , LowerVSETCC() , LowerVSETCCWithSUBUS() , lowerX86FPLogicOp() , matchBinaryPermuteShuffle() , matchBinaryShuffle() , matchPMADDWD() , matchPMADDWD_2() , matchTruncateWithPACK() , matchUnaryPermuteShuffle() , matchUnaryShuffle() , MatchVectorAllEqualTest() , materializeVectorConstant() , reduceVMULWidth() , SplitOpsAndApply() , supportedVectorShiftWithImm() , truncateVectorWithPACK() , useVectorCast() , and X86ChooseCmpOpcode() .
◆ hasSSE3()
bool llvm::X86Subtarget::hasSSE3 ( ) const
inline
Definition at line 191 of file X86Subtarget.h .
Referenced by combineArithReduction() , combineToHorizontalAddSub() , isAddSubOrSubAdd() , isAddSubOrSubAdd() , lowerAddSubToHorizontalOp() , LowerBuildVectorv4x32() , lowerShuffleAsBitRotate() , lowerShuffleAsBroadcast() , LowerToHorizontalOp() , LowerUINT_TO_FP_i64() , lowerV4F32Shuffle() , and matchUnaryShuffle() .
◆ hasSSE41()
bool llvm::X86Subtarget::hasSSE41 ( ) const
inline
Definition at line 193 of file X86Subtarget.h .
Referenced by combineArithReduction() , combineEXTEND_VECTOR_INREG() , combineExtractWithShuffle() , combineLogicBlendIntoPBLENDV() , combineMinMaxReduction() , combineMulToPMADDWD() , combineMulToPMULDQ() , combineSetCCMOVMSK() , combineTruncateWithSat() , combineVectorSizedSetCCEquality() , combineVSelectToBLENDV() , combineX86ShuffleChain() , convertShiftLeftToScale() , createVariablePermute() , getPack() , getTargetVShiftNode() , LowerABS() , LowerBuildVectorAsInsert() , LowerBuildVectorv16i8() , LowerBuildVectorv4x32() , LowerBuildVectorv8i16() , LowerMUL() , LowerMULH() , LowerRotate() , LowerShift() , lowerShuffleAsBlend() , lowerShuffleAsDecomposedShuffleMerge() , lowerShuffleAsSpecificExtension() , lowerShuffleWithPACK() , LowerTruncateVecPack() , lowerUINT_TO_FP_vXi32() , lowerV16I8Shuffle() , lowerV2F64Shuffle() , lowerV2I64Shuffle() , lowerV4F32Shuffle() , lowerV4I32Shuffle() , lowerV8I16Shuffle() , LowerVectorAllEqual() , LowerVSETCC() , matchBinaryPermuteShuffle() , matchBinaryShuffle() , matchShuffleWithPACK() , matchShuffleWithUNPCK() , matchTruncateWithPACK() , matchUnaryShuffle() , reduceVMULWidth() , and truncateVectorWithPACK() .
◆ hasSSE42()
bool llvm::X86Subtarget::hasSSE42 ( ) const
inline
◆ hasSSEPrefetch()
bool llvm::X86Subtarget::hasSSEPrefetch ( ) const
inline
◆ hasSSSE3()
bool llvm::X86Subtarget::hasSSSE3 ( ) const
inline
Definition at line 192 of file X86Subtarget.h .
Referenced by combineArithReduction() , combineBITREVERSE() , combineToHorizontalAddSub() , combineX86ShuffleChain() , createVariablePermute() , detectPMADDUBSW() , lowerAddSubToHorizontalOp() , LowerBITREVERSE() , LowerMUL() , LowerShift() , lowerShuffleAsByteRotate() , lowerShuffleAsByteRotateAndPermute() , lowerShuffleAsByteShiftMask() , lowerShuffleAsSpecificExtension() , lowerShuffleWithPSHUFB() , LowerToHorizontalOp() , LowerTruncateVecPack() , lowerV16I8Shuffle() , lowerV2I64Shuffle() , lowerV4I32Shuffle() , lowerV8I16Shuffle() , LowerVectorCTLZ() , LowerVectorCTPOP() , matchBinaryPermuteShuffle() , and matchTruncateWithPACK() .
◆ isCallingConvWin64()Definition at line 341 of file X86Subtarget.h .
References llvm::CallingConv::C , llvm::CallingConv::Fast , llvm::CallingConv::Intel_OCL_BI , isTargetUEFI64() , isTargetWin64() , llvm::CallingConv::Swift , llvm::CallingConv::SwiftTail , llvm::CallingConv::Tail , llvm::CallingConv::Win64 , llvm::CallingConv::X86_64_SysV , llvm::CallingConv::X86_FastCall , llvm::CallingConv::X86_StdCall , llvm::CallingConv::X86_ThisCall , and llvm::CallingConv::X86_VectorCall .
Referenced by get64BitArgumentGPRs() , get64BitArgumentXMMs() , llvm::X86CallLowering::lowerCall() , and LowerVACOPY() .
bool X86Subtarget::isLegalToCallImmediateAddr
(
)
const
◆ isOSWindows()
bool llvm::X86Subtarget::isOSWindows ( ) const
inline
◆ isPICStyleGOT()
bool llvm::X86Subtarget::isPICStyleGOT ( ) const
inline
◆ isPICStyleRIPRel()
bool llvm::X86Subtarget::isPICStyleRIPRel ( ) const
inline
◆ isPICStyleStubPIC()
bool llvm::X86Subtarget::isPICStyleStubPIC ( ) const
inline
◆ isPositionIndependent()
bool X86Subtarget::isPositionIndependent
(
)
const
◆ isTarget64BitILP32()
bool llvm::X86Subtarget::isTarget64BitILP32 ( ) const
inline
◆ isTarget64BitLP64()
bool llvm::X86Subtarget::isTarget64BitLP64 ( ) const
inline
◆ isTargetAndroid()
bool llvm::X86Subtarget::isTargetAndroid ( ) const
inline
◆ isTargetCOFF()
bool llvm::X86Subtarget::isTargetCOFF ( ) const
inline
◆ isTargetCygMing()
bool llvm::X86Subtarget::isTargetCygMing ( ) const
inline
◆ isTargetDarwin()
bool llvm::X86Subtarget::isTargetDarwin ( ) const
inline
◆ isTargetDragonFly()
bool llvm::X86Subtarget::isTargetDragonFly ( ) const
inline
◆ isTargetELF()
bool llvm::X86Subtarget::isTargetELF ( ) const
inline
◆ isTargetFreeBSD()
bool llvm::X86Subtarget::isTargetFreeBSD ( ) const
inline
◆ isTargetFuchsia()
bool llvm::X86Subtarget::isTargetFuchsia ( ) const
inline
◆ isTargetGlibc()
bool llvm::X86Subtarget::isTargetGlibc ( ) const
inline
◆ isTargetHurd()
bool llvm::X86Subtarget::isTargetHurd ( ) const
inline
◆ isTargetKFreeBSD()
bool llvm::X86Subtarget::isTargetKFreeBSD ( ) const
inline
◆ isTargetLinux()
bool llvm::X86Subtarget::isTargetLinux ( ) const
inline
◆ isTargetMachO()
bool llvm::X86Subtarget::isTargetMachO ( ) const
inline
◆ isTargetMCU()
bool llvm::X86Subtarget::isTargetMCU ( ) const
inline
◆ isTargetPS()
bool llvm::X86Subtarget::isTargetPS ( ) const
inline
◆ isTargetSolaris()
bool llvm::X86Subtarget::isTargetSolaris ( ) const
inline
◆ isTargetUEFI64()
bool llvm::X86Subtarget::isTargetUEFI64 ( ) const
inline
◆ isTargetWin32()
bool llvm::X86Subtarget::isTargetWin32 ( ) const
inline
◆ isTargetWin64()
bool llvm::X86Subtarget::isTargetWin64 ( ) const
inline
◆ isTargetWindowsCoreCLR()
bool llvm::X86Subtarget::isTargetWindowsCoreCLR ( ) const
inline
◆ isTargetWindowsCygwin()
bool llvm::X86Subtarget::isTargetWindowsCygwin ( ) const
inline
◆ isTargetWindowsGNU()
bool llvm::X86Subtarget::isTargetWindowsGNU ( ) const
inline
◆ isTargetWindowsItanium()
bool llvm::X86Subtarget::isTargetWindowsItanium ( ) const
inline
◆ isTargetWindowsMSVC()
bool llvm::X86Subtarget::isTargetWindowsMSVC ( ) const
inline
◆ isUEFI()
bool llvm::X86Subtarget::isUEFI ( ) const
inline
◆ isXRaySupported()
bool llvm::X86Subtarget::isXRaySupported ( ) const
inlineoverride
◆ ParseSubtargetFeatures()ParseSubtargetFeatures - Parses features string setting specified subtarget options.
Definition of function is auto generated by tblgen.
References X86Subtarget() .
◆ setPICStyle()◆ swiftAsyncContextIsDynamicallySet()
bool llvm::X86Subtarget::swiftAsyncContextIsDynamicallySet ( ) const
inline
◆ useAVX512Regs()
bool llvm::X86Subtarget::useAVX512Regs ( ) const
inline
Definition at line 248 of file X86Subtarget.h .
References canExtendTo512DQ() , and hasAVX512() .
Referenced by llvm::X86TTIImpl::areTypesABICompatible() , combineAdd() , combineAndShuffleNot() , combineConcatVectorOps() , combineExtSetcc() , combineTargetShuffle() , combineTruncateWithSat() , combineVectorSizedSetCCEquality() , combineX86ShuffleChain() , handleMaskRegisterForCallingConv() , isLegalConversion() , lowerShuffleAsVTRUNC() , LowerVectorAllEqual() , LowerVSETCC() , matchUnaryShuffle() , SplitOpsAndApply() , supportedVectorShiftWithImm() , supportedVectorVarShift() , and useBWIRegs() .
◆ useBWIRegs()
bool llvm::X86Subtarget::useBWIRegs ( ) const
inline
◆ useIndirectThunkBranches()
bool llvm::X86Subtarget::useIndirectThunkBranches ( ) const
inline
◆ useIndirectThunkCalls()
bool llvm::X86Subtarget::useIndirectThunkCalls ( ) const
inline
◆ useLight256BitInstructions()
bool llvm::X86Subtarget::useLight256BitInstructions ( ) const
inline
The documentation for this class was generated from the following files: