LLVM: lib/Target/X86/Disassembler/X86Disassembler.cpp File Reference (original) (raw)
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| Classes | |
|---|---|
| struct | ModRMDecision |
| struct | OpcodeDecision |
| struct | ContextDecision |
| Namespaces | |
|---|---|
| namespace | llvm |
| This is an optimization pass for GlobalISel generic memory operations. | |
| namespace | llvm::X86 |
| Define some predicates that are used for node matching. | |
| Macros | |
|---|---|
| #define | DEBUG_TYPE "x86-disassembler" |
| #define | debug(s) LLVM_DEBUG(dbgs() << __LINE__ << ": " << s); |
| #define | GENERIC_FIXUP_FUNC(name, base, prefix) |
| #define | ENTRY(x) X86::x, |
| #define | ENTRY(x) case EA_BASE_##x: |
| #define | ENTRY(x) |
| #define | ENTRY(x) |
| #define | ENTRY(x) |
| #define | ENTRY(x) |
| #define | ENTRY(x) case EA_REG_##x: |
| Functions | |
|---|---|
| static InstrUID | decode (OpcodeType type, InstructionContext insnContext, uint8_t opcode, uint8_t modRM) |
| static bool | peek (struct InternalInstruction *insn, uint8_t &byte) |
| template<typename T > | |
| static bool | consume (InternalInstruction *insn, T &ptr) |
| static bool | isREX (struct InternalInstruction *insn, uint8_t prefix) |
| static bool | isREX2 (struct InternalInstruction *insn, uint8_t prefix) |
| static int | readPrefixes (struct InternalInstruction *insn) |
| static int | readSIB (struct InternalInstruction *insn) |
| static int | readDisplacement (struct InternalInstruction *insn) |
| static int | readModRM (struct InternalInstruction *insn) |
| static int | fixupReg (struct InternalInstruction *insn, const struct OperandSpecifier *op) |
| static bool | readOpcode (struct InternalInstruction *insn) |
| static bool | is16BitEquivalent (const char *orig, const char *equiv) |
| static bool | is64Bit (const char *name) |
| static int | getInstructionIDWithAttrMask (uint16_t *instructionID, struct InternalInstruction *insn, uint16_t attrMask) |
| static bool | isCCMPOrCTEST (InternalInstruction *insn) |
| static bool | isNF (InternalInstruction *insn) |
| static int | getInstructionID (struct InternalInstruction *insn, const MCInstrInfo *mii) |
| static int | readOpcodeRegister (struct InternalInstruction *insn, uint8_t size) |
| static int | readImmediate (struct InternalInstruction *insn, uint8_t size) |
| static int | readVVVV (struct InternalInstruction *insn) |
| static int | readMaskRegister (struct InternalInstruction *insn) |
| static int | readOperands (struct InternalInstruction *insn) |
| static bool | translateInstruction (MCInst &mcInst, InternalInstruction &insn, const MCDisassembler *Dis) |
| translateInstruction - Translates an internal instruction and all its operands to an MCInst. | |
| static void | translateRegister (MCInst &mcInst, Reg reg) |
| translateRegister - Translates an internal register to the appropriate LLVM register, and appends it as an operand to an MCInst. | |
| static bool | translateSrcIndex (MCInst &mcInst, InternalInstruction &insn) |
| translateSrcIndex - Appends a source index operand to an MCInst. | |
| static bool | translateDstIndex (MCInst &mcInst, InternalInstruction &insn) |
| translateDstIndex - Appends a destination index operand to an MCInst. | |
| static void | translateImmediate (MCInst &mcInst, uint64_t immediate, const OperandSpecifier &operand, InternalInstruction &insn, const MCDisassembler *Dis) |
| translateImmediate - Appends an immediate operand to an MCInst. | |
| static bool | translateRMRegister (MCInst &mcInst, InternalInstruction &insn) |
| translateRMRegister - Translates a register stored in the R/M field of the ModR/M byte to its LLVM equivalent and appends it to an MCInst. | |
| static bool | translateRMMemory (MCInst &mcInst, InternalInstruction &insn, const MCDisassembler *Dis, bool ForceSIB=false) |
| translateRMMemory - Translates a memory operand stored in the Mod and R/M fields of an internal instruction (and possibly its SIB byte) to a memory operand in LLVM's format, and appends it to an MCInst. | |
| static bool | translateRM (MCInst &mcInst, const OperandSpecifier &operand, InternalInstruction &insn, const MCDisassembler *Dis) |
| translateRM - Translates an operand stored in the R/M (and possibly SIB) byte of an instruction to LLVM form, and appends it to an MCInst. | |
| static void | translateFPRegister (MCInst &mcInst, uint8_t stackPos) |
| translateFPRegister - Translates a stack position on the FPU stack to its LLVM form, and appends it to an MCInst. | |
| static bool | translateMaskRegister (MCInst &mcInst, uint8_t maskRegNum) |
| translateMaskRegister - Translates a 3-bit mask register number to LLVM form, and appends it to an MCInst. | |
| static bool | translateOperand (MCInst &mcInst, const OperandSpecifier &operand, InternalInstruction &insn, const MCDisassembler *Dis) |
| translateOperand - Translates an operand stored in an internal instruction to LLVM's format and appends it to an MCInst. | |
| static MCDisassembler * | createX86Disassembler (const Target &T, const MCSubtargetInfo &STI, MCContext &Ctx) |
| LLVM_C_ABI void | LLVMInitializeX86Disassembler () |
◆ debug
| #define debug | ( | | s | ) | LLVM_DEBUG(dbgs() << __LINE__ << ": " << s); | | ------------- | - | | - | - | ------------------------------------------------------------------------------------------------------ |
◆ DEBUG_TYPE
#define DEBUG_TYPE "x86-disassembler"
◆ ENTRY [1/7]
| #define ENTRY | ( | | x | ) | X86::x, | | ------------- | - | | - | - | ------- |
◆ ENTRY [2/7]
| #define ENTRY | ( | | x | ) | case EA_BASE_##x: | | ------------- | - | | - | - | ------------------- |
◆ ENTRY [3/7]
Value:
case EA_REG_##x: \
static MCOperand createReg(MCRegister Reg)
◆ ENTRY [4/7]
◆ ENTRY [5/7]
◆ ENTRY [6/7]
◆ ENTRY [7/7]
| #define ENTRY | ( | | x | ) | case EA_REG_##x: | | ------------- | - | | - | - | ------------------ |
◆ GENERIC_FIXUP_FUNC
| #define GENERIC_FIXUP_FUNC | ( | | name, | | ---------------------------- | - | | ----------------------------------------------------------------- | | | base, | | | | | | prefix | | | | | ) | | | |
◆ consume()
◆ createX86Disassembler()
◆ decode()
Definition at line 123 of file X86Disassembler.cpp.
References ModRMDecision::instructionIDs, llvm_unreachable, llvm::X86Disassembler::MAP4, MAP4_SYM, llvm::X86Disassembler::MAP5, MAP5_SYM, llvm::X86Disassembler::MAP6, MAP6_SYM, llvm::X86Disassembler::MAP7, MAP7_SYM, modFromModRM, ModRMDecision::modrm_type, llvm::X86Disassembler::ONEBYTE, ONEBYTE_SYM, THREEBYTE38_SYM, THREEBYTE3A_SYM, llvm::X86Disassembler::THREEBYTE_38, llvm::X86Disassembler::THREEBYTE_3A, llvm::X86Disassembler::THREEDNOW_MAP, THREEDNOW_MAP_SYM, llvm::X86Disassembler::TWOBYTE, TWOBYTE_SYM, llvm::X86Disassembler::XOP8_MAP, XOP8_MAP_SYM, llvm::X86Disassembler::XOP9_MAP, XOP9_MAP_SYM, llvm::X86Disassembler::XOPA_MAP, and XOPA_MAP_SYM.
Referenced by getInstructionIDWithAttrMask().
◆ fixupReg()
◆ getInstructionID()
Definition at line 1197 of file X86Disassembler.cpp.
References aaaFromEVEX4of4, llvm::X86Disassembler::ATTR_64BIT, llvm::X86Disassembler::ATTR_ADSIZE, llvm::X86Disassembler::ATTR_EVEX, llvm::X86Disassembler::ATTR_EVEXB, llvm::X86Disassembler::ATTR_EVEXK, llvm::X86Disassembler::ATTR_EVEXKZ, llvm::X86Disassembler::ATTR_EVEXL2, llvm::X86Disassembler::ATTR_EVEXNF, llvm::X86Disassembler::ATTR_EVEXU, llvm::X86Disassembler::ATTR_NONE, llvm::X86Disassembler::ATTR_OPSIZE, llvm::X86Disassembler::ATTR_REX2, llvm::X86Disassembler::ATTR_REXW, llvm::X86Disassembler::ATTR_VEX, llvm::X86Disassembler::ATTR_VEXL, llvm::X86Disassembler::ATTR_XD, llvm::X86Disassembler::ATTR_XS, bFromEVEX4of4, llvm::StringRef::data(), llvm::dbgs(), getInstructionIDWithAttrMask(), llvm::MCInstrInfo::getName(), llvm::X86Disassembler::InternalInstruction::hasAdSize, llvm::X86Disassembler::InternalInstruction::hasOpSize, llvm::X86Disassembler::InternalInstruction::instructionID, INSTRUCTIONS_SYM, is16BitEquivalent(), is64Bit(), isCCMPOrCTEST(), isNF(), l2FromEVEX4of4, lFromEVEX4of4, lFromVEX2of2, lFromVEX3of3, lFromXOP3of3, LLVM_DEBUG, llvm::X86Disassembler::InternalInstruction::mandatoryPrefix, llvm::X86Disassembler::MAP4, llvm::X86Disassembler::InternalInstruction::mode, llvm::X86Disassembler::MODE_16BIT, llvm::X86Disassembler::MODE_64BIT, modFromModRM, llvm::X86Disassembler::InternalInstruction::modRM, llvm::X86Disassembler::ONEBYTE, llvm::X86Disassembler::InternalInstruction::opcode, llvm::X86Disassembler::InternalInstruction::opcodeType, ppFromEVEX3of4, ppFromVEX2of2, ppFromVEX3of3, ppFromXOP3of3, readModRM(), llvm::X86Disassembler::InternalInstruction::repeatPrefix, llvm::X86Disassembler::InternalInstruction::rex2ExtensionPrefix, llvm::X86Disassembler::InternalInstruction::rexPrefix, llvm::X86Disassembler::InternalInstruction::spec, llvm::X86Disassembler::THREEBYTE_38, llvm::X86Disassembler::TWOBYTE, llvm::X86Disassembler::TYPE_EVEX, llvm::X86Disassembler::TYPE_NO_VEX_XOP, llvm::X86Disassembler::TYPE_VEX_2B, llvm::X86Disassembler::TYPE_VEX_3B, llvm::X86Disassembler::TYPE_XOP, uFromEVEX3of4, llvm::X86Disassembler::InternalInstruction::vectorExtensionPrefix, llvm::X86Disassembler::InternalInstruction::vectorExtensionType, llvm::X86Disassembler::VEX_PREFIX_66, llvm::X86Disassembler::VEX_PREFIX_F2, llvm::X86Disassembler::VEX_PREFIX_F3, wFromEVEX3of4, wFromVEX3of3, wFromXOP3of3, and zFromEVEX4of4.
◆ getInstructionIDWithAttrMask()
Definition at line 1096 of file X86Disassembler.cpp.
References decode(), llvm::X86Disassembler::MAP4, MAP4_SYM, llvm::X86Disassembler::MAP5, MAP5_SYM, llvm::X86Disassembler::MAP6, MAP6_SYM, llvm::X86Disassembler::MAP7, MAP7_SYM, llvm::X86Disassembler::InternalInstruction::modRM, ModRMDecision::modrm_type, OpcodeDecision::modRMDecisions, llvm::X86Disassembler::ONEBYTE, ONEBYTE_SYM, llvm::X86Disassembler::InternalInstruction::opcode, ContextDecision::opcodeDecisions, llvm::X86Disassembler::InternalInstruction::opcodeType, readModRM(), THREEBYTE38_SYM, THREEBYTE3A_SYM, llvm::X86Disassembler::THREEBYTE_38, llvm::X86Disassembler::THREEBYTE_3A, llvm::X86Disassembler::THREEDNOW_MAP, THREEDNOW_MAP_SYM, llvm::X86Disassembler::TWOBYTE, TWOBYTE_SYM, llvm::X86Disassembler::XOP8_MAP, XOP8_MAP_SYM, llvm::X86Disassembler::XOP9_MAP, XOP9_MAP_SYM, llvm::X86Disassembler::XOPA_MAP, and XOPA_MAP_SYM.
Referenced by getInstructionID().
◆ is16BitEquivalent()
◆ is64Bit()
Definition at line 1085 of file X86Disassembler.cpp.
References name.
Referenced by llvm::X86Subtarget::canUseCMOV(), llvm::X86Subtarget::canUseCMPXCHG16B(), llvm::X86Subtarget::canUseLAHFSAHF(), CC_X86_Intr(), CC_X86_VectorCallAssignRegister(), llvm::X86Subtarget::classifyGlobalFunctionReference(), llvm::X86Subtarget::classifyGlobalReference(), llvm::X86Subtarget::classifyLocalReference(), computeDataLayout(), ComputeLinkerOptionsLoadCommandSize(), createX86MCAsmInfo(), llvm::PPCFrameLowering::eliminateCallFramePseudoInstr(), llvm::PPCRegisterInfo::eliminateFrameIndex(), llvm::NVPTXFrameLowering::emitPrologue(), getDataLayoutString(), getEffectiveRelocModel(), getInstructionID(), llvm::object::XCOFFSymbolRef::getName(), llvm::X86TargetLowering::getRegForInlineAsmConstraint(), llvm::object::XCOFFSymbolRef::getXCOFFCsectAuxRef(), llvm::X86Subtarget::hasCLFLUSH(), llvm::X86Subtarget::hasMFence(), llvm::X86::isCalleePop(), llvm::X86Subtarget::isTargetNaCl32(), llvm::X86Subtarget::isTargetNaCl64(), llvm::X86Subtarget::isXRaySupported(), LowerBR_CC(), llvm::PPCRegisterInfo::lowerDynamicAreaOffset(), llvm::SparcTargetLowering::LowerF128Compare(), llvm::SparcTargetLowering::LowerOperation(), LowerSELECT_CC(), LowerToTLSExecModel(), llvm::PPCELFMCAsmInfo::PPCELFMCAsmInfo(), llvm::X86ELFMCAsmInfo::X86ELFMCAsmInfo(), llvm::X86MCAsmInfoDarwin::X86MCAsmInfoDarwin(), and llvm::X86Subtarget::X86Subtarget().
◆ isCCMPOrCTEST()
◆ isNF()
◆ isREX()
◆ isREX2()
◆ LLVMInitializeX86Disassembler()
◆ peek()
◆ readDisplacement()
Definition at line 612 of file X86Disassembler.cpp.
References llvm::consume, llvm::dbgs(), llvm::X86Disassembler::InternalInstruction::displacement, llvm::X86Disassembler::InternalInstruction::displacementOffset, llvm::X86Disassembler::EA_DISP_16, llvm::X86Disassembler::EA_DISP_32, llvm::X86Disassembler::EA_DISP_8, llvm::X86Disassembler::EA_DISP_NONE, llvm::X86Disassembler::InternalInstruction::eaDisplacement, LLVM_DEBUG, llvm::X86Disassembler::InternalInstruction::readerCursor, and llvm::X86Disassembler::InternalInstruction::startLocation.
Referenced by readModRM().
◆ readImmediate()
Definition at line 1551 of file X86Disassembler.cpp.
References assert(), llvm::consume, llvm::dbgs(), llvm::X86Disassembler::InternalInstruction::immediateOffset, llvm::X86Disassembler::InternalInstruction::immediates, llvm::X86Disassembler::InternalInstruction::immediateSize, LLVM_DEBUG, llvm_unreachable, llvm::X86Disassembler::InternalInstruction::numImmediatesConsumed, llvm::X86Disassembler::InternalInstruction::readerCursor, llvm::size(), and llvm::X86Disassembler::InternalInstruction::startLocation.
Referenced by readOperands().
◆ readMaskRegister()
◆ readModRM()
Definition at line 643 of file X86Disassembler.cpp.
References llvm::X86Disassembler::InternalInstruction::addressSize, b2FromREX2, bFromREX, llvm::consume, llvm::X86Disassembler::InternalInstruction::consumedModRM, llvm::dbgs(), llvm::X86Disassembler::InternalInstruction::displacementSize, llvm::X86Disassembler::EA_BASE_NONE, llvm::X86Disassembler::EA_DISP_16, llvm::X86Disassembler::EA_DISP_32, llvm::X86Disassembler::EA_DISP_8, llvm::X86Disassembler::EA_DISP_NONE, llvm::X86Disassembler::InternalInstruction::eaBase, llvm::X86Disassembler::InternalInstruction::eaDisplacement, llvm::X86Disassembler::InternalInstruction::eaRegBase, LLVM_DEBUG, llvm::mod(), llvm::X86Disassembler::InternalInstruction::mode, llvm::X86Disassembler::MODE_64BIT, modFromModRM, llvm::X86Disassembler::InternalInstruction::modRM, r2FromEVEX2of4, r2FromREX2, readDisplacement(), readSIB(), llvm::X86Disassembler::InternalInstruction::reg, llvm::X86Disassembler::InternalInstruction::regBase, regFromModRM, llvm::X86Disassembler::InternalInstruction::registerSize, llvm::X86Disassembler::InternalInstruction::rex2ExtensionPrefix, llvm::X86Disassembler::InternalInstruction::rexPrefix, rFromREX, rmFromModRM, llvm::X86Disassembler::TYPE_EVEX, llvm::X86Disassembler::InternalInstruction::vectorExtensionPrefix, and llvm::X86Disassembler::InternalInstruction::vectorExtensionType.
Referenced by getInstructionID(), getInstructionIDWithAttrMask(), readOpcode(), and readOperands().
◆ readOpcode()
Definition at line 928 of file X86Disassembler.cpp.
References llvm::consume, llvm::dbgs(), llvm::format(), LLVM_DEBUG, llvm::X86Disassembler::InternalInstruction::mandatoryPrefix, llvm::X86Disassembler::MAP4, llvm::X86Disassembler::MAP5, llvm::X86Disassembler::MAP6, llvm::X86Disassembler::MAP7, mFromREX2, mmmFromEVEX2of4, mmmmmFromVEX2of3, mmmmmFromXOP2of3, llvm::X86Disassembler::ONEBYTE, llvm::X86Disassembler::InternalInstruction::opcode, llvm::X86Disassembler::InternalInstruction::opcodeType, readModRM(), llvm::X86Disassembler::InternalInstruction::rex2ExtensionPrefix, llvm::X86Disassembler::THREEBYTE_38, llvm::X86Disassembler::THREEBYTE_3A, llvm::X86Disassembler::THREEDNOW_MAP, llvm::X86Disassembler::TWOBYTE, llvm::X86Disassembler::TYPE_EVEX, llvm::X86Disassembler::TYPE_VEX_2B, llvm::X86Disassembler::TYPE_VEX_3B, llvm::X86Disassembler::TYPE_XOP, llvm::X86Disassembler::InternalInstruction::vectorExtensionPrefix, llvm::X86Disassembler::InternalInstruction::vectorExtensionType, llvm::X86Disassembler::VEX_LOB_0F, llvm::X86Disassembler::VEX_LOB_0F38, llvm::X86Disassembler::VEX_LOB_0F3A, llvm::X86Disassembler::VEX_LOB_MAP4, llvm::X86Disassembler::VEX_LOB_MAP5, llvm::X86Disassembler::VEX_LOB_MAP6, llvm::X86Disassembler::VEX_LOB_MAP7, llvm::X86Disassembler::XOP8_MAP, llvm::X86Disassembler::XOP9_MAP, llvm::X86Disassembler::XOP_MAP_SELECT_8, llvm::X86Disassembler::XOP_MAP_SELECT_9, llvm::X86Disassembler::XOP_MAP_SELECT_A, and llvm::X86Disassembler::XOPA_MAP.
◆ readOpcodeRegister()
◆ readOperands()
Definition at line 1635 of file X86Disassembler.cpp.
References llvm::X86Disassembler::InternalInstruction::addressSize, CASE_ENCODING_RM, CASE_ENCODING_VSIB, llvm::dbgs(), debug, llvm::X86Disassembler::InternalInstruction::displacement, llvm::X86Disassembler::EA_DISP_8, llvm::X86Disassembler::InternalInstruction::eaBase, llvm::X86Disassembler::InternalInstruction::eaDisplacement, fixupReg(), llvm::X86Disassembler::InternalInstruction::immediates, llvm::X86Disassembler::InternalInstruction::immediateSize, isCCMPOrCTEST(), l2FromEVEX4of4, lFromEVEX4of4, LLVM_DEBUG, llvm::X86Disassembler::InternalInstruction::mode, llvm::X86Disassembler::MODE_64BIT, llvm::X86Disassembler::InternalInstruction::numImmediatesConsumed, llvm::X86Disassembler::InternalInstruction::opcode, llvm::X86Disassembler::InstructionSpecifier::operands, oszcFromEVEX3of4, llvm::X86Disassembler::InternalInstruction::RC, readImmediate(), readMaskRegister(), readModRM(), readOpcodeRegister(), readVVVV(), scFromEVEX4of4, llvm::X86Disassembler::SIB_INDEX_NONE, llvm::X86Disassembler::InternalInstruction::sibIndex, llvm::X86Disassembler::InternalInstruction::sibIndexBase, llvm::X86Disassembler::InternalInstruction::spec, llvm::X86Disassembler::TYPE_EVEX, v2FromEVEX4of4, llvm::X86Disassembler::InternalInstruction::vectorExtensionPrefix, llvm::X86Disassembler::InternalInstruction::vectorExtensionType, and llvm::X86Disassembler::InternalInstruction::vvvv.
◆ readPrefixes()
Definition at line 221 of file X86Disassembler.cpp.
References llvm::X86Disassembler::InternalInstruction::addressSize, b2FromEVEX2of4, bFromEVEX2of4, bFromREX2, bFromVEX2of3, bFromXOP2of3, llvm::consume, llvm::dbgs(), llvm::X86Disassembler::InternalInstruction::displacementSize, llvm::format(), llvm::X86Disassembler::InternalInstruction::hasAdSize, llvm::X86Disassembler::InternalInstruction::hasLockPrefix, llvm::X86Disassembler::InternalInstruction::hasOpSize, llvm::X86Disassembler::InternalInstruction::immediateSize, isPrefix(), isREX(), isREX2(), LLVM_DEBUG, llvm::X86Disassembler::InternalInstruction::mandatoryPrefix, llvm::X86Disassembler::InternalInstruction::mode, llvm::X86Disassembler::MODE_16BIT, llvm::X86Disassembler::MODE_32BIT, llvm::X86Disassembler::MODE_64BIT, nextByte(), peek(), ppFromVEX2of2, ppFromXOP3of3, r2FromEVEX2of4, llvm::X86Disassembler::InternalInstruction::readerCursor, llvm::X86Disassembler::InternalInstruction::registerSize, llvm::X86Disassembler::InternalInstruction::repeatPrefix, llvm::X86Disassembler::InternalInstruction::rex2ExtensionPrefix, llvm::X86Disassembler::InternalInstruction::rexPrefix, rFromEVEX2of4, rFromREX2, rFromVEX2of2, rFromVEX2of3, rFromXOP2of3, llvm::X86Disassembler::SEG_OVERRIDE_CS, llvm::X86Disassembler::SEG_OVERRIDE_DS, llvm::X86Disassembler::SEG_OVERRIDE_ES, llvm::X86Disassembler::SEG_OVERRIDE_FS, llvm::X86Disassembler::SEG_OVERRIDE_GS, llvm::X86Disassembler::SEG_OVERRIDE_SS, llvm::X86Disassembler::InternalInstruction::segmentOverride, llvm::X86Disassembler::InternalInstruction::startLocation, llvm::X86Disassembler::TYPE_EVEX, llvm::X86Disassembler::TYPE_NO_VEX_XOP, llvm::X86Disassembler::TYPE_VEX_2B, llvm::X86Disassembler::TYPE_VEX_3B, llvm::X86Disassembler::TYPE_XOP, uFromEVEX3of4, llvm::X86Disassembler::InternalInstruction::vectorExtensionPrefix, llvm::X86Disassembler::InternalInstruction::vectorExtensionType, llvm::X86Disassembler::VEX_PREFIX_66, wFromEVEX3of4, wFromREX, wFromREX2, wFromVEX3of3, wFromXOP3of3, llvm::X86Disassembler::InternalInstruction::xAcquireRelease, xFromEVEX2of4, xFromREX2, xFromVEX2of3, and xFromXOP2of3.
◆ readSIB()
Definition at line 548 of file X86Disassembler.cpp.
References llvm::X86Disassembler::InternalInstruction::addressSize, b2FromREX2, baseFromSIB, bFromREX, llvm::consume, llvm::dbgs(), llvm::X86Disassembler::EA_DISP_32, llvm::X86Disassembler::EA_DISP_8, llvm::X86Disassembler::InternalInstruction::eaDisplacement, indexFromSIB, LLVM_DEBUG, llvm_unreachable, modFromModRM, llvm::X86Disassembler::InternalInstruction::modRM, llvm::X86Disassembler::InternalInstruction::rex2ExtensionPrefix, llvm::X86Disassembler::InternalInstruction::rexPrefix, scaleFromSIB, llvm::X86Disassembler::InternalInstruction::sib, llvm::X86Disassembler::SIB_BASE_NONE, llvm::X86Disassembler::SIB_INDEX_NONE, llvm::X86Disassembler::InternalInstruction::sibBase, llvm::X86Disassembler::InternalInstruction::sibIndex, llvm::X86Disassembler::InternalInstruction::sibIndexBase, llvm::X86Disassembler::InternalInstruction::sibScale, x2FromREX2, and xFromREX.
Referenced by readModRM().
◆ readVVVV()
Definition at line 1595 of file X86Disassembler.cpp.
References llvm::dbgs(), LLVM_DEBUG, llvm::X86Disassembler::InternalInstruction::mode, llvm::X86Disassembler::MODE_64BIT, llvm::X86Disassembler::TYPE_EVEX, llvm::X86Disassembler::TYPE_VEX_2B, llvm::X86Disassembler::TYPE_VEX_3B, llvm::X86Disassembler::TYPE_XOP, v2FromEVEX4of4, llvm::X86Disassembler::InternalInstruction::vectorExtensionPrefix, llvm::X86Disassembler::InternalInstruction::vectorExtensionType, llvm::X86Disassembler::InternalInstruction::vvvv, vvvvFromEVEX3of4, vvvvFromVEX2of2, vvvvFromVEX3of3, and vvvvFromXOP3of3.
Referenced by readOperands().
◆ translateDstIndex()
◆ translateFPRegister()
| static void translateFPRegister ( MCInst & mcInst, uint8_t stackPos ) | static |
|---|
◆ translateImmediate()
translateImmediate - Appends an immediate operand to an MCInst.
Parameters
| mcInst | - The MCInst to append to. |
|---|---|
| immediate | - The immediate value to append. |
| operand | - The operand, as stored in the descriptor table. |
| insn | - The internal instruction. |
Definition at line 2000 of file X86Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::X86Disassembler::InternalInstruction::displacementSize, llvm::X86Disassembler::OperandSpecifier::encoding, if(), llvm::X86Disassembler::InternalInstruction::immediateOffset, llvm::X86Disassembler::InternalInstruction::immediateSize, isBranch(), llvm::X86Disassembler::InternalInstruction::length, llvm::X86Disassembler::InternalInstruction::segmentOverride, segmentRegnums, llvm::X86Disassembler::InternalInstruction::startLocation, llvm::MCDisassembler::tryAddingSymbolicOperand(), and llvm::X86Disassembler::OperandSpecifier::type.
Referenced by translateOperand().
◆ translateInstruction()
◆ translateMaskRegister()
◆ translateOperand()
translateOperand - Translates an operand stored in an internal instruction to LLVM's format and appends it to an MCInst.
Parameters
| mcInst | - The MCInst to append to. |
|---|---|
| operand | - The operand, as stored in the descriptor table. |
| insn | - The internal instruction. |
Returns
- false on success; true otherwise.
Definition at line 2376 of file X86Disassembler.cpp.
References llvm::MCInst::addOperand(), CASE_ENCODING_RM, CASE_ENCODING_VSIB, llvm::MCOperand::createImm(), debug, llvm::X86Disassembler::OperandSpecifier::encoding, llvm::X86Disassembler::InternalInstruction::immediates, isCCMPOrCTEST(), llvm::X86Disassembler::InternalInstruction::modRM, llvm::X86Disassembler::InternalInstruction::numImmediatesTranslated, llvm::X86Disassembler::InternalInstruction::opcodeRegister, llvm::X86Disassembler::InternalInstruction::operands, llvm::X86Disassembler::InternalInstruction::RC, llvm::X86Disassembler::InternalInstruction::reg, translateDstIndex(), translateFPRegister(), translateImmediate(), translateMaskRegister(), translateOperand(), translateRegister(), translateRM(), translateSrcIndex(), llvm::X86Disassembler::OperandSpecifier::type, llvm::X86Disassembler::InternalInstruction::vvvv, and llvm::X86Disassembler::InternalInstruction::writemask.
Referenced by translateInstruction(), and translateOperand().
◆ translateRegister()
| static void translateRegister ( MCInst & mcInst, Reg reg ) | static |
|---|
◆ translateRM()
◆ translateRMMemory()
translateRMMemory - Translates a memory operand stored in the Mod and R/M fields of an internal instruction (and possibly its SIB byte) to a memory operand in LLVM's format, and appends it to an MCInst.
Parameters
| mcInst | - The MCInst to append to. |
|---|---|
| insn | - The instruction to extract Mod, R/M, and SIB fields from. |
| ForceSIB | - The instruction must use SIB. |
Returns
- 0 on success; nonzero otherwise
Definition at line 2144 of file X86Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::X86Disassembler::InternalInstruction::addressSize, ALL_EA_BASES, ALL_REGS, ALL_SIB_BASES, llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), debug, llvm::X86Disassembler::InternalInstruction::displacement, llvm::X86Disassembler::InternalInstruction::displacementOffset, llvm::X86Disassembler::InternalInstruction::displacementSize, llvm::X86Disassembler::EA_BASE_NONE, EA_BASES_32BIT, EA_BASES_64BIT, llvm::X86Disassembler::EA_DISP_NONE, llvm::X86Disassembler::InternalInstruction::eaBase, llvm::X86Disassembler::InternalInstruction::eaDisplacement, if(), llvm::X86Disassembler::InternalInstruction::length, llvm::X86Disassembler::InternalInstruction::mode, llvm::X86Disassembler::MODE_64BIT, REGS_XMM, REGS_YMM, REGS_ZMM, llvm::X86Disassembler::InternalInstruction::segmentOverride, segmentRegnums, llvm::X86Disassembler::SIB_BASE_NONE, llvm::X86Disassembler::SIB_INDEX_NONE, llvm::X86Disassembler::InternalInstruction::sibBase, llvm::X86Disassembler::InternalInstruction::sibIndex, llvm::X86Disassembler::InternalInstruction::sibScale, llvm::X86Disassembler::InternalInstruction::startLocation, llvm::MCDisassembler::tryAddingPcLoadReferenceComment(), and llvm::MCDisassembler::tryAddingSymbolicOperand().
Referenced by translateRM().