LLVM: llvm::mca::LSUnitBase Class Reference (original) (raw)

Abstract base interface for LS (load/store) units in llvm-mca. More...

#include "[llvm/MCA/HardwareUnits/LSUnit.h](LSUnit%5F8h%5Fsource.html)"

Public Types
enum Status { LSU_AVAILABLE = 0 , LSU_LQUEUE_FULL, LSU_SQUEUE_FULL }
Public Member Functions
LSUnitBase (const MCSchedModel &SM, unsigned LoadQueueSize, unsigned StoreQueueSize, bool AssumeNoAlias)
~LSUnitBase () override
unsigned getLoadQueueSize () const
Returns the total number of entries in the load queue.
unsigned getStoreQueueSize () const
Returns the total number of entries in the store queue.
unsigned getUsedLQEntries () const
unsigned getUsedSQEntries () const
void acquireLQSlot ()
void acquireSQSlot ()
void releaseLQSlot ()
void releaseSQSlot ()
bool assumeNoAlias () const
virtual Status isAvailable (const InstRef &IR) const =0
This method checks the availability of the load/store buffers.
virtual unsigned dispatch (const InstRef &IR)=0
Allocates LS resources for instruction IR.
bool isSQEmpty () const
bool isLQEmpty () const
bool isSQFull () const
bool isLQFull () const
virtual bool isReady (const InstRef &IR) const =0
Check if a peviously dispatched instruction IR is now ready for execution.
virtual bool isPending (const InstRef &IR) const =0
Check if instruction IR only depends on memory instructions that are currently executing.
virtual bool isWaiting (const InstRef &IR) const =0
Check if instruction IR is still waiting on memory operations, and the wait time is still unknown.
virtual bool hasDependentUsers (const InstRef &IR) const =0
virtual const CriticalDependency getCriticalPredecessor (unsigned GroupId)=0
virtual void onInstructionExecuted (const InstRef &IR)=0
virtual void onInstructionRetired (const InstRef &IR)=0
virtual void onInstructionIssued (const InstRef &IR)=0
virtual void cycleEvent ()=0
virtual void dump () const =0
Public Member Functions inherited from llvm::mca::HardwareUnit
HardwareUnit ()=default
virtual ~HardwareUnit ()

Abstract base interface for LS (load/store) units in llvm-mca.

Definition at line 29 of file LSUnit.h.

◆ Status

Enumerator
LSU_AVAILABLE
LSU_LQUEUE_FULL
LSU_SQUEUE_FULL

Definition at line 77 of file LSUnit.h.

◆ ~LSUnitBase()

llvm::mca::LSUnitBase::~LSUnitBase ( ) overridedefault

◆ acquireLQSlot()

void llvm::mca::LSUnitBase::acquireLQSlot ( ) inline

◆ acquireSQSlot()

void llvm::mca::LSUnitBase::acquireSQSlot ( ) inline

◆ assumeNoAlias()

bool llvm::mca::LSUnitBase::assumeNoAlias ( ) const inline

◆ cycleEvent()

virtual void llvm::mca::LSUnitBase::cycleEvent ( ) pure virtual

◆ dispatch()

Allocates LS resources for instruction IR.

This method assumes that a previous call to isAvailable(IR) succeeded with a LSUnitBase::Status value of LSU_AVAILABLE. Returns the GroupID associated with this instruction. That value will be used to set the LSUTokenID field in class Instruction.

Implemented in llvm::mca::LSUnit.

References IR.

◆ dump()

virtual void llvm::mca::LSUnitBase::dump ( ) const pure virtual

◆ getCriticalPredecessor()

◆ getLoadQueueSize()

unsigned llvm::mca::LSUnitBase::getLoadQueueSize ( ) const inline

◆ getStoreQueueSize()

unsigned llvm::mca::LSUnitBase::getStoreQueueSize ( ) const inline

◆ getUsedLQEntries()

unsigned llvm::mca::LSUnitBase::getUsedLQEntries ( ) const inline

◆ getUsedSQEntries()

unsigned llvm::mca::LSUnitBase::getUsedSQEntries ( ) const inline

◆ hasDependentUsers()

virtual bool llvm::mca::LSUnitBase::hasDependentUsers ( const InstRef & IR) const pure virtual

◆ isAvailable()

virtual Status llvm::mca::LSUnitBase::isAvailable ( const InstRef & IR) const pure virtual

This method checks the availability of the load/store buffers.

Returns LSU_AVAILABLE if there are enough load/store queue entries to accomodate instruction IR. By default, LSU_AVAILABLE is returned if IR is not a memory operation.

Implemented in llvm::mca::LSUnit.

References IR.

◆ isLQEmpty()

bool llvm::mca::LSUnitBase::isLQEmpty ( ) const inline

◆ isLQFull()

bool llvm::mca::LSUnitBase::isLQFull ( ) const inline

◆ isPending()

virtual bool llvm::mca::LSUnitBase::isPending ( const InstRef & IR) const pure virtual

Check if instruction IR only depends on memory instructions that are currently executing.

Implemented in llvm::mca::LSUnit.

References IR.

◆ isReady()

virtual bool llvm::mca::LSUnitBase::isReady ( const InstRef & IR) const pure virtual

Check if a peviously dispatched instruction IR is now ready for execution.

Implemented in llvm::mca::LSUnit.

References IR.

◆ isSQEmpty()

bool llvm::mca::LSUnitBase::isSQEmpty ( ) const inline

◆ isSQFull()

bool llvm::mca::LSUnitBase::isSQFull ( ) const inline

◆ isWaiting()

virtual bool llvm::mca::LSUnitBase::isWaiting ( const InstRef & IR) const pure virtual

Check if instruction IR is still waiting on memory operations, and the wait time is still unknown.

Implemented in llvm::mca::LSUnit.

References IR.

◆ onInstructionExecuted()

virtual void llvm::mca::LSUnitBase::onInstructionExecuted ( const InstRef & IR) pure virtual

◆ onInstructionIssued()

virtual void llvm::mca::LSUnitBase::onInstructionIssued ( const InstRef & IR) pure virtual

◆ onInstructionRetired()

virtual void llvm::mca::LSUnitBase::onInstructionRetired ( const InstRef & IR) pure virtual

◆ releaseLQSlot()

void llvm::mca::LSUnitBase::releaseLQSlot ( ) inline

◆ releaseSQSlot()

void llvm::mca::LSUnitBase::releaseSQSlot ( ) inline

The documentation for this class was generated from the following files: