David Deen | University of Notre Dame (original) (raw)
Papers by David Deen
An ac small signal model for lateral spin valves (LSVs) is developed, and is applied to two diffe... more An ac small signal model for lateral spin valves (LSVs) is developed, and is applied to two different types of devices: spin transmitters and magnetic field sensors. The small signal models explicitly decouple the charge-and spin-dependent components, which describe the intrinsic RC delay and the ac spin accumulation dynamics, separately. The analysis is applied to graphene LSVs as an example to illustrate the optimization strategies for LSV devices. By using the charge-spin circuit model, the scattering parameters and the reflection coefficients at the output terminals are quantitatively calculated as a function of frequency. This model can be used as a guide for future LSV design and to benchmark performance across different material systems. Index Terms— AC transmitter, lateral spin valves (LSVs), magnetic field sensor, small signal model, spin accumulation.
A lateral spin valve reader that includes a detector structure located proximate to a bearing su... more A lateral spin valve reader that includes a detector structure located proximate to a bearing
surface and a spin injection structure located away from the bearing surface. The lateral spin
valve reader also includes a channel layer extending from the detector structure to the spin
injection structure. An exterior cladding, disposed around the channel layer, suppresses
spin-scattering at surfaces of the channel layer.
A dual-channel AlN/GaN/AlN/GaN high electron mobility transistor (HEMT) architecture is proposed,... more A dual-channel AlN/GaN/AlN/GaN high electron mobility transistor (HEMT) architecture is proposed, simulated, and demonstrated that suppresses gate lag due to surface-originated trapped charge. Dual two-dimensional electron gas (2DEG) channels are utilized such that the top 2DEG serves as an equipotential that screens potential fluctuations resulting from surface trapped charge. The bottom channel serves as the transistor's modulated channel. Two device modeling approaches have been performed as a means to guide the device design and to elucidate the relationship between the design and performance metrics. The modeling efforts include a self-consistent Poisson-Schrodinger solution for electrostatic simulation as well as hydrodynamic three-dimensional device modeling for three-dimensional electrostatics, steady-state, and transient simulations. Experimental results validated the HEMT design whereby homo-epitaxial growth on free-standing GaN substrates and fabrication of same-wafer dual-channel and recessed-gate AlN/GaN HEMTs have been demonstrated. Notable pulsed-gate performance has been achieved by the fabricated HEMTs through a gate lag ratio of 0.86 with minimal drain current collapse while maintaining high levels of dc and rf performance.
Abstract Due to large polarization effects, two-dimensional electron gas (2DEG) concentrations hi... more Abstract Due to large polarization effects, two-dimensional electron gas (2DEG) concentrations higher than 1x1013 cm-2 can be produced at the AlN/GaN heterojunction with AlN barriers as thin as 2 nm. This ultra-shallow channel together with the wide bandgap of AlN (6.2 eV) makes AlN/GaN heterojunction field effect transistors (HFET) extremely attractive for high frequency (> 100 GHz) high power applications. At Notre Dame, these structures have been grown using molecular beam epitaxy and the record transport ...
![Research paper thumbnail of Highly sensitive micro-Hall devices based on Al[sub 0.12]In[sub 0.88]Sb∕InSb heterostructures](https://attachments.academia-assets.com/42290832/thumbnails/1.jpg)
](Journal of Applied Physics, 2005
Micro-Hall devices based on modulation-doped Al 0.12 In 0.88 Sb/ InSb heterostructures are fabric... more Micro-Hall devices based on modulation-doped Al 0.12 In 0.88 Sb/ InSb heterostructures are fabricated and studied in terms of sensitivity and noise. Extremely high supply-current-related magnetic sensitivities of 1800 V A −1 T −1 at 77 K and 1220 V A −1 T −1 at 300 K are reported and observed to be independent of the bias current. The detection limit of the devices studied at low and room temperature are at nanotesla values throughout the broad frequency range from 20 Hz to 20 kHz. The low detection limit of 28 nT at 300 K and 18 nT at 77 K were found at high frequencies where the Johnson noise is dominant. A measured detection limit per unit device width of 630 pT mm Hz −1/2 is reported indicating the potential for picotesla detectivity.
A model is presented for pnpnpn junction formation near metal-semiconductor contacts in two-dimensi... more A model is presented for pnpnpn junction formation near metal-semiconductor contacts in two-dimensional semiconducting systems such as graphene. Carrier type switching occurs in a region near the metal-semiconductor junction when energy band bending leads to a crossing between the junction Fermi level and the Dirac energy. A bias-dependent depletion region occurs due to the minimization of carrier density, which is shown to act as an additional parasitic resistance in devices. The pnpnpn junction resistance is demonstrated by its implementation in a transfer length structure.
A series of six ultrathin AlN/GaN heterostructures with varied AlN thicknesses from 1.5 - 6 nm ha... more A series of six ultrathin AlN/GaN heterostructures with varied AlN thicknesses from 1.5 - 6 nm have been grown by molecular beam epitaxy on free-standing hydride vapor phase epitaxy (HVPE) GaN substrates. High electron mobility transistors (HEMTs) were fabricated from the set in order to assess the impact of barrier thickness and homo-epitaxial growth on transistor performance. Room temperature Hall characteristics revealed mobility of 1700 cm2/Vs and sheet resistance of 130 Ω/sqr. for a 3 nm thick barrier, ranking amongst the lowest room-temperature sheet resistance values reported for a polarization-doped single heterostructure in the III-Nitride family. DC and small signal HEMT electrical characteristics from submicron gate length HEMTs further elucidated the effect of the AlN barrier thickness on device performance.
Introduction: Graphene is a promising material for electronic applications due to its high mobili... more Introduction: Graphene is a promising material for electronic applications due to its high mobility, low density of states, and monolayer thickness [1]. In order to realize practical devices [2], the interface properties between graphene and high-K dielectrics must be understood. However, due to the different nature of the bonding at the graphene 1 dielectric interface, techniques developed to study the Si/Si0 2 interface cannot be utilized. Some interface-state extraction methods have been reported for graphene [3][4][5], though, to our knowledge; there have been no attempts to understand the trapping mechanisms that lead to the frequency-and temperature-dependent capacitance-voltage (C-V) characteristics that are observed experimentally. In this work, a border trap model is employed to explain the observed frequency-dependent capacitance characteristics of metal-oxide-graphene (MOG) capacitors. Specifically, we have analyzed single-layer graphene capacitors with local-metal gates and Hf0 2 dielectrics, a geometry which allows scaled dielectrics to be analyzed, and also avoids non-idealities associated with dielectric nucleation on graphene. In addition, this geometry allows us to compare our results with metal-insulator-metal (MIM) capacitors that utilize the same dielectric, thus allowing us to differentiate bulk Hf0 2 effects from those associated with the grapheneldielectric interface. In this work, we compare the C-V characteristics of MOG capacitors with Hf0 2 dielectrics. Frequencydependent capacitance measurements indicate border-trap-like behavior at high temperatures and voltages, with trap density of r-.J 1-2 x 10 18 cm-3/eV, results similar to those obtained on MIM capacitors. At lower temperatures, the trapping mechanism freezes out, suggesting an interfacial layer between the graphene and Hf0 2
Applied Physics Letters
Graphene field effect transistors and capacitors that employ ultra-thin atomic layer deposited hi... more Graphene field effect transistors and capacitors that employ ultra-thin atomic layer deposited high-k TiO2 dielectrics are demonstrated. Of the three TiO2 gate insulation schemes employed, the sequentially deposited HfO2:TiO2 gate insulator stack enabled the reduction of equivalent oxide thickness while simultaneously providing an ultra-thin gate insulation layer that minimized gate leakage current. The multilayer gate insulation scheme demonstrates a means for advanced device scaling in graphene-based devices.
A wireless vapor sensor based upon the quantum capacitance effect in graphene is demonstrated. Th... more A wireless vapor sensor based upon the quantum capacitance effect in graphene is demonstrated. The sensor consists of a metal-oxide-graphene variable capacitor (varactor) coupled to an inductor, creating a resonant oscillator circuit. The resonant frequency is found to shift in proportion to water vapor concentration for relative humidity (RH) values ranging from 1% to 97% with a linear frequency shift of 5.7 +- 0.3 kHz / RH%. The capacitance values extracted from the wireless measurements agree with those determined from capacitance-voltage measurements, providing strong evidence that the sensing arises from the variable quantum capacitance in graphene. These results represent a new sensor transduction mechanism and pave the way for graphene quantum capacitance sensors to be studied for a wide range of chemical and biological sensing applications.
AlN/GaN heterostructures with 1700-cm2/V·s Hall mobility have been grown by molecular beam epitax... more AlN/GaN heterostructures with 1700-cm2/V·s Hall mobility have been grown by molecular beam epitaxy on freestanding GaN substrates. Submicrometer gate-length (LG) metal-oxide-semiconductor (MOS) high-electron-mobility transistors (HEMTs) fabricated from this material show excellent dc and RF performance. LG = 100 nm devices exhibited a drain current density of 1.5 A/mm, current gain cutoff frequency fT of 165 GHz, a maximum frequency of oscillation fmax of 171 GHz, and intrinsic average electron velocity ve of 1.5 ×107 cm/s. The 40-GHz load-pull measurements of LG = 140 nm devices showed 1-W/mm output power, with a 4.6-dB gain and 17% power-added efficiency. GaN substrates provide a way of achieving high mobility, high ve, and high RF performance in AlN/GaN transistors.
An ac small signal model for lateral spin valves (LSVs) is developed, and is applied to two diffe... more An ac small signal model for lateral spin valves (LSVs) is developed, and is applied to two different types of devices: spin transmitters and magnetic field sensors. The small signal models explicitly decouple the charge-and spin-dependent components, which describe the intrinsic RC delay and the ac spin accumulation dynamics, separately. The analysis is applied to graphene LSVs as an example to illustrate the optimization strategies for LSV devices. By using the charge-spin circuit model, the scattering parameters and the reflection coefficients at the output terminals are quantitatively calculated as a function of frequency. This model can be used as a guide for future LSV design and to benchmark performance across different material systems. Index Terms— AC transmitter, lateral spin valves (LSVs), magnetic field sensor, small signal model, spin accumulation.
A lateral spin valve reader that includes a detector structure located proximate to a bearing su... more A lateral spin valve reader that includes a detector structure located proximate to a bearing
surface and a spin injection structure located away from the bearing surface. The lateral spin
valve reader also includes a channel layer extending from the detector structure to the spin
injection structure. An exterior cladding, disposed around the channel layer, suppresses
spin-scattering at surfaces of the channel layer.
A dual-channel AlN/GaN/AlN/GaN high electron mobility transistor (HEMT) architecture is proposed,... more A dual-channel AlN/GaN/AlN/GaN high electron mobility transistor (HEMT) architecture is proposed, simulated, and demonstrated that suppresses gate lag due to surface-originated trapped charge. Dual two-dimensional electron gas (2DEG) channels are utilized such that the top 2DEG serves as an equipotential that screens potential fluctuations resulting from surface trapped charge. The bottom channel serves as the transistor's modulated channel. Two device modeling approaches have been performed as a means to guide the device design and to elucidate the relationship between the design and performance metrics. The modeling efforts include a self-consistent Poisson-Schrodinger solution for electrostatic simulation as well as hydrodynamic three-dimensional device modeling for three-dimensional electrostatics, steady-state, and transient simulations. Experimental results validated the HEMT design whereby homo-epitaxial growth on free-standing GaN substrates and fabrication of same-wafer dual-channel and recessed-gate AlN/GaN HEMTs have been demonstrated. Notable pulsed-gate performance has been achieved by the fabricated HEMTs through a gate lag ratio of 0.86 with minimal drain current collapse while maintaining high levels of dc and rf performance.
Abstract Due to large polarization effects, two-dimensional electron gas (2DEG) concentrations hi... more Abstract Due to large polarization effects, two-dimensional electron gas (2DEG) concentrations higher than 1x1013 cm-2 can be produced at the AlN/GaN heterojunction with AlN barriers as thin as 2 nm. This ultra-shallow channel together with the wide bandgap of AlN (6.2 eV) makes AlN/GaN heterojunction field effect transistors (HFET) extremely attractive for high frequency (> 100 GHz) high power applications. At Notre Dame, these structures have been grown using molecular beam epitaxy and the record transport ...
Journal of Applied Physics, 2005
Micro-Hall devices based on modulation-doped Al 0.12 In 0.88 Sb/ InSb heterostructures are fabric... more Micro-Hall devices based on modulation-doped Al 0.12 In 0.88 Sb/ InSb heterostructures are fabricated and studied in terms of sensitivity and noise. Extremely high supply-current-related magnetic sensitivities of 1800 V A −1 T −1 at 77 K and 1220 V A −1 T −1 at 300 K are reported and observed to be independent of the bias current. The detection limit of the devices studied at low and room temperature are at nanotesla values throughout the broad frequency range from 20 Hz to 20 kHz. The low detection limit of 28 nT at 300 K and 18 nT at 77 K were found at high frequencies where the Johnson noise is dominant. A measured detection limit per unit device width of 630 pT mm Hz −1/2 is reported indicating the potential for picotesla detectivity.
A model is presented for pnpnpn junction formation near metal-semiconductor contacts in two-dimensi... more A model is presented for pnpnpn junction formation near metal-semiconductor contacts in two-dimensional semiconducting systems such as graphene. Carrier type switching occurs in a region near the metal-semiconductor junction when energy band bending leads to a crossing between the junction Fermi level and the Dirac energy. A bias-dependent depletion region occurs due to the minimization of carrier density, which is shown to act as an additional parasitic resistance in devices. The pnpnpn junction resistance is demonstrated by its implementation in a transfer length structure.
A series of six ultrathin AlN/GaN heterostructures with varied AlN thicknesses from 1.5 - 6 nm ha... more A series of six ultrathin AlN/GaN heterostructures with varied AlN thicknesses from 1.5 - 6 nm have been grown by molecular beam epitaxy on free-standing hydride vapor phase epitaxy (HVPE) GaN substrates. High electron mobility transistors (HEMTs) were fabricated from the set in order to assess the impact of barrier thickness and homo-epitaxial growth on transistor performance. Room temperature Hall characteristics revealed mobility of 1700 cm2/Vs and sheet resistance of 130 Ω/sqr. for a 3 nm thick barrier, ranking amongst the lowest room-temperature sheet resistance values reported for a polarization-doped single heterostructure in the III-Nitride family. DC and small signal HEMT electrical characteristics from submicron gate length HEMTs further elucidated the effect of the AlN barrier thickness on device performance.
Introduction: Graphene is a promising material for electronic applications due to its high mobili... more Introduction: Graphene is a promising material for electronic applications due to its high mobility, low density of states, and monolayer thickness [1]. In order to realize practical devices [2], the interface properties between graphene and high-K dielectrics must be understood. However, due to the different nature of the bonding at the graphene 1 dielectric interface, techniques developed to study the Si/Si0 2 interface cannot be utilized. Some interface-state extraction methods have been reported for graphene [3][4][5], though, to our knowledge; there have been no attempts to understand the trapping mechanisms that lead to the frequency-and temperature-dependent capacitance-voltage (C-V) characteristics that are observed experimentally. In this work, a border trap model is employed to explain the observed frequency-dependent capacitance characteristics of metal-oxide-graphene (MOG) capacitors. Specifically, we have analyzed single-layer graphene capacitors with local-metal gates and Hf0 2 dielectrics, a geometry which allows scaled dielectrics to be analyzed, and also avoids non-idealities associated with dielectric nucleation on graphene. In addition, this geometry allows us to compare our results with metal-insulator-metal (MIM) capacitors that utilize the same dielectric, thus allowing us to differentiate bulk Hf0 2 effects from those associated with the grapheneldielectric interface. In this work, we compare the C-V characteristics of MOG capacitors with Hf0 2 dielectrics. Frequencydependent capacitance measurements indicate border-trap-like behavior at high temperatures and voltages, with trap density of r-.J 1-2 x 10 18 cm-3/eV, results similar to those obtained on MIM capacitors. At lower temperatures, the trapping mechanism freezes out, suggesting an interfacial layer between the graphene and Hf0 2
Applied Physics Letters
Graphene field effect transistors and capacitors that employ ultra-thin atomic layer deposited hi... more Graphene field effect transistors and capacitors that employ ultra-thin atomic layer deposited high-k TiO2 dielectrics are demonstrated. Of the three TiO2 gate insulation schemes employed, the sequentially deposited HfO2:TiO2 gate insulator stack enabled the reduction of equivalent oxide thickness while simultaneously providing an ultra-thin gate insulation layer that minimized gate leakage current. The multilayer gate insulation scheme demonstrates a means for advanced device scaling in graphene-based devices.
A wireless vapor sensor based upon the quantum capacitance effect in graphene is demonstrated. Th... more A wireless vapor sensor based upon the quantum capacitance effect in graphene is demonstrated. The sensor consists of a metal-oxide-graphene variable capacitor (varactor) coupled to an inductor, creating a resonant oscillator circuit. The resonant frequency is found to shift in proportion to water vapor concentration for relative humidity (RH) values ranging from 1% to 97% with a linear frequency shift of 5.7 +- 0.3 kHz / RH%. The capacitance values extracted from the wireless measurements agree with those determined from capacitance-voltage measurements, providing strong evidence that the sensing arises from the variable quantum capacitance in graphene. These results represent a new sensor transduction mechanism and pave the way for graphene quantum capacitance sensors to be studied for a wide range of chemical and biological sensing applications.
AlN/GaN heterostructures with 1700-cm2/V·s Hall mobility have been grown by molecular beam epitax... more AlN/GaN heterostructures with 1700-cm2/V·s Hall mobility have been grown by molecular beam epitaxy on freestanding GaN substrates. Submicrometer gate-length (LG) metal-oxide-semiconductor (MOS) high-electron-mobility transistors (HEMTs) fabricated from this material show excellent dc and RF performance. LG = 100 nm devices exhibited a drain current density of 1.5 A/mm, current gain cutoff frequency fT of 165 GHz, a maximum frequency of oscillation fmax of 171 GHz, and intrinsic average electron velocity ve of 1.5 ×107 cm/s. The 40-GHz load-pull measurements of LG = 140 nm devices showed 1-W/mm output power, with a 4.6-dB gain and 17% power-added efficiency. GaN substrates provide a way of achieving high mobility, high ve, and high RF performance in AlN/GaN transistors.
Of the III-Nitride family the AlN/GaN heterojunction has demonstrated the largest combined polari... more Of the III-Nitride family the AlN/GaN heterojunction has demonstrated the largest combined polarization charge and energy band o sets available in the system. Engineering the polarization fields through varying the AlN thickness leads to two-dimensional electron gas densities (2DEGs) that may be tailored between 0.5 - 5 x1013 cm2. Furthermore, the ultra-thin (< 5 nm) barrier and excellent transport properties of this all binary heterostructure make it well suited for high electron mobility transistor applications where high frequency and high current are required. This work encompasses various design aspects of GaN-based High Electron Mobility Transistors (HEMTs) which ultimately result in the realization of several generations that utilize the AlN/GaN heterostructure.
HEMTs fabricated from high-mobility, low sheet resistance heterostructures have achieved drain current densities up to 2.3 A/mm and transconductance of 480 mS/mm, which set new benchmarks for GaN-based HEMTs. Ultra-thin pre-metallization etching has been employed for the rst time to reduce ohmic contact resistance for AlN/GaN HEMTs and has enabled small signal frequency performance in excess of 100 GHz. Moll's method for delay time extraction has been utilized to extract an effective electron velocity in the intrinsic region of the AlN/GaN HEMT and was found to be 1.2 x107 cm/s.
By leveraging the allowable thickness window of the AlN barrier along with the high density 2DEGs that result, several novel HEMT devices have been designed and realized. High Al-content AlxGa1xN back barriers have been employed for improved 2DEG con finement in several new variations of the ultra-thin AlN/GaN HEMT. A dual, parallel-channel AlN/GaN-based HEMT structure is designed and realized for the first time as an epitaxial approach to mitigating DC-RF frequency dispersion. These structures emphasize the facilitation of new device designs that are made possible through the particular qualities the AlN/GaN heterostructure possesses.
In this work, we have developed a technique to circumvent the low-temperature limitations of conv... more In this work, we have developed a technique to circumvent the low-temperature limitations of conventional lift-off by using an inorganic bi-layer of silicon nitride (SiN) and Ge to replace conventional photoresist stacks. By using standard photolithography and anisotropic fluorine plasma etching, a lift-off profile was fabricated that has been exposed to temperatures as high as 670 °C with no failure in mechanical integrity. This paper documents the results from the initial proof-of-concept experiment and then shows the technique's application to patterning molecular-beam epitaxy (MBE) regrowth of n + GaN on GaN.