Substrate design optimization for high speed links (original) (raw)

Effect of wafer level packaging, silicon substrate and board material on gigabit board-silicon-board data transmission

Andrew Tay

2004 Proceedings. 54th Electronic Components and Technology Conference (IEEE Cat. No.04CH37546), 2004

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Electrical design of wafer level package on board for gigabit data transmission

Andrew Tay

Proceedings of the 5th Electronics Packaging Technology Conference (EPTC 2003), 2003

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Lessons learned: How to Make Predictable PCB Interconnects for Data Rates of 50 Gbps and Beyond, DesignCon 2014 - Presentation

Yuriy Shlepnev

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DesignCon 2014 Lessons learned: How to Make Predictable PCB Interconnects for Data Rates of 50 Gbps and Beyond

Wendem Beyene

2020

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Lessons learned: How to Make Predictable PCB Interconnects for Data Rates of 50 Gbps and Beyond, DesignCon 2014

Yuriy Shlepnev

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Design of High-Density Interconnects for High-Speed Transmission

Ken-ichi Okada

2007 Proceedings 57th Electronic Components and Technology Conference, 2007

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Signaling analysis of inter-chip I/O package routing for Multi-Chip Package

Mohd Ain

2012 4th Asia Symposium on Quality Electronic Design (ASQED), 2012

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Signaling scheme for high speed die-to-die interconnection in multi-chip package (MCP) technology

Mohd Ain

2013 IEEE 15th Electronics Packaging Technology Conference (EPTC 2013), 2013

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Modeling and analysis of high-speed links

Vladimir M. Stojanovic

2003

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Frequency-dependent losses on high-performance interconnections

Paul Coteus

IEEE Transactions on Electromagnetic Compatibility, 2001

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Simulation of Crosstalk in High-Speed Multi-Chip Modules

John Avaritsiotis

Active and Passive Electronic Components, 1995

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Design and modeling for chip-to-chip communication at 20 Gbps

Jianmin Zhang

2010

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Crosstalk analysis of high-speed interconnects and packages

Mani Soma

IEEE Proceedings of the Custom Integrated Circuits Conference

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High Speed On-Chip Interconnects : Trade offs in Passive Termination

Raj Parihar

2008

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A 900 Mb/s bidirectional signaling scheme

Charles Dike

IEEE Journal of Solid-State Circuits, 1995

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A design space exploration of transmission-line links for on-chip interconnect

Aaron Carpenter

2011

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Simulation of crosstalk in high-speed multilayer off-chip interconnections

John Avaritsiotis

Microelectronics Journal, 1993

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Analysis of inter-bundle crosstalk in multimode signaling for high-density interconnects

Paul Franzon

2008 58th Electronic Components and Technology Conference, 2008

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Quilt Packaging: High-Density, High-Speed Interchip Communications

G. Snider

IEEE Transactions on Advanced Packaging, 2000

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Design and fabrication of low-loss horizontal and vertical interconnect links using air-clad transmission lines and through silicon vias

xinyi yeow

2012

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3.125 Gbps multichannel electrical transmission line design for CWDM

Teck Lee Lim

Photonics Packaging, Integration, and Interconnects VIII, 2008

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Electrical Characterization of High Performance Fine Pitch Interconnects in Silicon-Interconnect Fabric

Subramanian S Iyer

2018 IEEE 68th Electronic Components and Technology Conference (ECTC), 2018

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High-Speed Digital System Design—A Handbook of Interconnect Theory and Design Practices

ALI MOULAEI NEJAD

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Crosstalk analysis of interconnection lines and packages in high-speed integrated circuits

Mani Soma

IEEE Transactions on Circuits and Systems

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The viability of 25 Gb/s on-board signalling

Dong Gun Kam, Christian Schuster

2008 58th Electronic Components and Technology Conference, 2008

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Dielectric and Conductor Roughness Models Identification for Successful PCB and Packaging Interconnect Design up to 50 GHz

Yuriy Shlepnev

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Enhancement of Signal Integrity and Power Integrity with Embedded Capacitors in High-Speed Packages

Joey Choi

7th International Symposium on Quality Electronic Design (ISQED'06), 2006

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Terabit/s-Class Optical PCB Links Incorporating 360Gb/s Bidirectional 850 nm Parallel Optical Transceivers

Benson Chan

IEEE/OSA Journal of Lightwave Technology, 2012

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Transmission line modelling for multi-gigabit serial interfaces

Gerard Edwards

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400 Gb/s Silicon Photonic Transmitter and Routing WDM Technologies for Glueless 8-Socket Chip-to-Chip Interconnects

Peter De Heyn

Journal of Lightwave Technology, 2020

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