A high accuracy high throughput jitter test solution on ATE for 3GBPS and 6gbps serial-ata (original) (raw)
Related papers
Accelerating jitter tolerance qualification for high speed serial interfaces
2009 10th International Symposium on Quality of Electronic Design, 2009
An Accelerated Jitter Tolerance Test Technique on Ate for 1.5GB/S and 3GB/S Serial-ATA
2006 IEEE International Test Conference
Modeling and Reducing Spatial Jitter caused by Asynchronous Input and Output Rates
Proceedings of the 33rd Annual ACM Symposium on User Interface Software and Technology, 2020
Jitter tolerance calibration for high-speed serial interfaces
Integration, 2017
Signal integrity evaluation of a 10 Gbits/sec optoelectronic interconnect
IEEE MTT-S International Microwave Symposium Digest, 2003
A Low Jitter Phase Locked Loop for High Speed Serial Interfaces
International Conference on Microelectronics, 2014
Serializer/Deserializer Component Design and Test
Removing JTAG bottlenecks in system interconnect test
2004 International Conferce on Test, 2004
Architecture and Experimental Validation of a Low-Latency Phasor Data Concentrator
IEEE Transactions on Smart Grid, 2016
Crosstalk Bounded Uncorrelated Jitter (BUJ) for High-Speed Interconnects
IEEE Transactions on Instrumentation and Measurement, 2005
Measuring the timing jitter of ATE in the frequency domain
IEEE Transactions on Instrumentation and Measurement, 2006
IEEE International Conference on Test, 2005.
Reduction of Gordon-Haus jitter in a dispersion compensated optical transmission system: analysis
Optics Communications, 1998
Assessment of gigabit Ethernet technology for the LOFAR multi-terabit network
Proceedings URSI GA, July, 2002
Design Exploration With Imprecise Latency and Register Constraints
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2006
Practical methods for extending ATE to 40 and 50Gbps
2013 IEEE International Test Conference (ITC), 2013
Verifying jitter in an analog and mixed signal design using dynamic time warping
2012 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2012
AN10007 Jitter and measurement
Testing Gbps interfaces without a gigahertz tester
IEEE Design and Test of Computers, 2004
2004
Damaris: Leveraging Multicore Parallelism to Mask I/O Jitter
2012
High-Speed Mode-I Delamination
Springer eBooks, 2020
Exploratory Study on the Linux OS Jitter
2012 Brazilian Symposium on Computing System Engineering, 2012
AC IO loopback design for high speed μprocessor IO test
2004 International Conferce on Test, 2004
Testing for arbitrary interference on experimentation platforms
Biometrika, 2019
A novel random jitter algorithm for high speed links
2011 IEEE 15th International Symposium on Consumer Electronics (ISCE), 2011
Modeling and Analysis Techniques of Jitter Enhancement Across High-Speed Interconnect Systems
2007 IEEE Electrical Performance of Electronic Packaging, 2007
Reproducibility of the Jitter Measurement
Reduction of arrival time jitter or energy spread with arclike variable bunch compressors
2024
Loopback Design for High Speed uProcessor IO Test
2004
Multi-rate phase interpolator for high speed serial interfaces
Microelectronics Journal, 2016
The Effect of Timing Jitter on a 160-Gb/s Demultiplexer
IEEE Photonics Technology Letters, 2000