Implementation of Optimized Reversible Sequential and Combinational Circuits for VLSI Applications (original) (raw)
Related papers
Implementation of High Speed Low Power Combinational and Sequential Circuits using Reversible logic
A LOW POWER ADDER USING REVERSIBLE LOGIC GATES
IJRET, 2012
Vlsi Implementation of Optimized Reversible BCD Adder
Proceedings of the Conference on Advances in Communication and Control Systems-2013, 2013
Efficient Design Of 4-Bit Binary Adder Using Reversible Logic Gates
DESIGN AND SYNTHESIS OF COMBINATIONAL CIRCUITS USING REVERSIBLE LOGIC
Low power Optimum Design of BCD Adder in Reversible Logic
VHDL Implementation of 4-Bit Full Adder Using Reversible Logic Gates
IJSRD - International Journal for Scientific Research and Development
IJSRD, 2014
Quantum Cost Optimization for Reversible Carry Skip BCD Adder
International Journal of Science and Technology
BCD Adder and Multiplier Using Reversible Logic Design
TJPRC, 2013
IJERT-Design and Analysis of Low Power Reversible Adder/Subtractor Circuits
International Journal of Engineering Research and Technology (IJERT), 2020
Design of Digital Adder Using Reversible Logic
New approach to Design of Reversible BCD Adder
Efficient adder circuits based on a conservative reversible logic gate
Proceedings IEEE Computer Society Annual Symposium on VLSI. New Paradigms for VLSI Systems Design. ISVLSI 2002, 2002
Design of Optimal Reversible Carry Look-Ahead Adder with Optimal Garbage and Quantum Cost
Design of High-speed low power Reversible Logic BCD Adder Using HNG gate
2009
A Design and Implementation of Reversible Logic Based Combinational Circuit with
Transistor Realization of Reversible Carry Skip Adder Circuits
International Journal of Computer Applications, 2017
A Novel Design and Simulation of 2 Digit BCD Adders Using Reversible Gates
2012
Optimized Carry Look-Ahead BCD Adder Using Reversible Logic
Realization of BCD adder using ReversibleLogic
International Journal of Computer Theory and Engineering, 2010
An Optimized Design of Reversible Sequential Digital Circuits
Proceedings of NCECST-2013, Bareily, 2013
Performance Analysis and Hardware Implementation of Digital Circuit Design Using Reversible Logic
2008
Design High Speed Low Power Combinational and Sequential Circuits Using Reversible Decoder
Efficient carry skip Adder design using full adder and carry skip block based on reversible Logic
American journal of Engineering Research (AJER)
Implementation of a Fast and Power Efficient Carry Select Adder using Reversible Gates
International Journal of Computer Applications, 2015
IJERT-VHDL Implementation of Reversible Full Adder using PERES Gate
International Journal of Engineering Research and Technology (IJERT), 2014
A More Effective Realization Of BCD Adder By Using A New Reversible Logic BBCDC
2014
EFFICIENT APPROACH TO OPTIMIZE QUANTUM COST FOR COMBINATIONAL REVERSIBLE CIRCUITS
IJRCAR, 2014
Full Adder using Reversible Logic
International Journal for Research in Applied Science and Engineering Technology IJRASET, 2020
An Extended Review on Reversible Logic Gates and their Implementation
An Extensive Literature Review on Reversible Logic Gates
2015
A Review on Reversible Computing and it’s applications on combinational circuits
International Journal of Emerging Trends in Engineering Research