MipsAsmPrinter.cpp Source File (original) (raw)

62#include

63#include

64#include

65#include

66#include

67#include

69using namespace llvm;

71#define DEBUG_TYPE "mips-asm-printer"

77}

84 for (const auto &I : MipsFI->StubsNeeded)

85 StubsNeeded.insert(I);

86 MCP = MF.getConstantPool();

92 return true;

93}

98}

100#include "MipsGenMCPseudoLowering.inc"

101

102

103

104void MipsAsmPrinter::emitPseudoIndirectBranch(MCStreamer &OutStreamer,

106 bool HasLinkReg = false;

109

111

112 TmpInst0.setOpcode(Mips::JALR64);

113 HasLinkReg = true;

114 } else if (Subtarget->hasMips32r6()) {

115

116 if (InMicroMipsMode)

117 TmpInst0.setOpcode(Mips::JRC16_MMR6);

118 else {

120 HasLinkReg = true;

121 }

122 } else if (Subtarget->inMicroMipsMode())

123

125 else {

126

128 }

129

130 MCOperand MCOp;

131

132 if (HasLinkReg) {

133 unsigned ZeroReg = Subtarget->isGP64bit() ? Mips::ZERO_64 : Mips::ZERO;

135 }

136

137 lowerOperand(MI->getOperand(0), MCOp);

139

141}

142

143

144

145

146

147

148

149

159 if (Callee && !Callee->getName().empty()) {

161 const MCExpr *OffsetExpr =

163 const MCExpr *CaleeExpr =

166 *OffsetExpr,

167 Subtarget.inMicroMipsMode() ? "R_MICROMIPS_JALR" : "R_MIPS_JALR",

168 CaleeExpr);

169 OutStreamer.emitLabel(OffsetLabel);

170 return;

171 }

172 }

173 }

174}

175

177

178

179

180

182 unsigned Opc = MI->getOpcode();

184

185 if (MI->isDebugValue()) {

188

190 return;

191 }

192 if (MI->isDebugLabel())

193 return;

194

195

196 if (InConstantPool && Opc != Mips::CONSTPOOL_ENTRY) {

198 InConstantPool = false;

199 }

200 if (Opc == Mips::CONSTPOOL_ENTRY) {

201

202

203

204

205

206

207

208 unsigned LabelId = (unsigned)MI->getOperand(0).getImm();

209 unsigned CPIdx = (unsigned)MI->getOperand(1).getIndex();

210

211

212 if (!InConstantPool) {

214 InConstantPool = true;

215 }

216

218

222 else

224 return;

225 }

226

227 switch (Opc) {

228 case Mips::PATCHABLE_FUNCTION_ENTER:

230 return;

231 case Mips::PATCHABLE_FUNCTION_EXIT:

233 return;

234 case Mips::PATCHABLE_TAIL_CALL:

236 return;

237 }

238

240 (MI->isReturn() || MI->isCall() || MI->isIndirectBranch())) {

242 }

243

246

247 do {

248

249 if (MCInst OutInst; lowerPseudoInstExpansion(&*I, OutInst)) {

251 continue;

252 }

253

254

255 if (I->isBundle())

256 continue;

257

258 if (I->getOpcode() == Mips::PseudoReturn ||

259 I->getOpcode() == Mips::PseudoReturn64 ||

260 I->getOpcode() == Mips::PseudoIndirectBranch ||

261 I->getOpcode() == Mips::PseudoIndirectBranch64 ||

262 I->getOpcode() == Mips::TAILCALLREG ||

263 I->getOpcode() == Mips::TAILCALLREG64) {

265 continue;

266 }

267

268

269

270

271

272

273

274

275 if (I->isPseudo() && Subtarget ->inMips16Mode()

276 && !isLongBranchPseudo(I->getOpcode()))

277 llvm_unreachable("Pseudo opcode found in emitInstruction()");

278

282 } while ((++I != E) && I->isInsideBundle());

283}

284

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324 unsigned CPUBitmask = 0, FPUBitmask = 0;

325 int CPUTopSavedRegOff, FPUTopSavedRegOff;

326

327

331

332 unsigned CPURegSize = TRI->getRegSizeInBits(Mips::GPR32RegClass) / 8;

333 unsigned FGR32RegSize = TRI->getRegSizeInBits(Mips::FGR32RegClass) / 8;

334 unsigned AFGR64RegSize = TRI->getRegSizeInBits(Mips::AFGR64RegClass) / 8;

335 bool HasAFGR64Reg = false;

336 unsigned CSFPRegsSize = 0;

337

338 for (const auto &I : CSI) {

340 unsigned RegNum = TRI->getEncodingValue(Reg);

341

342

343

344 if (Mips::FGR32RegClass.contains(Reg)) {

345 FPUBitmask |= (1 << RegNum);

346 CSFPRegsSize += FGR32RegSize;

347 } else if (Mips::AFGR64RegClass.contains(Reg)) {

348 FPUBitmask |= (3 << RegNum);

349 CSFPRegsSize += AFGR64RegSize;

350 HasAFGR64Reg = true;

351 } else if (Mips::GPR32RegClass.contains(Reg))

352 CPUBitmask |= (1 << RegNum);

353 }

354

355

356 FPUTopSavedRegOff = FPUBitmask ?

357 (HasAFGR64Reg ? -AFGR64RegSize : -FGR32RegSize) : 0;

358

359

360 CPUTopSavedRegOff = CPUBitmask ? -CSFPRegsSize - CPURegSize : 0;

361

363

364 TS.emitMask(CPUBitmask, CPUTopSavedRegOff);

365

366

367 TS.emitFMask(FPUBitmask, FPUTopSavedRegOff);

368}

369

370

371

372

373

374

377

380 unsigned stackSize = MF->getFrameInfo().getStackSize();

381

382 getTargetStreamer().emitFrame(stackReg, stackSize, returnReg);

383}

384

385

394

397

398 if (Subtarget->inMicroMipsMode()) {

402 } else

404

407 else

409

412}

413

414

415

418

420

421 bool IsNakedFunction = MF->getFunction().hasFnAttribute(Attribute::Naked);

422 if (!IsNakedFunction)

424

425 if (!IsNakedFunction)

427

428 if ( Subtarget ->inMips16Mode()) {

432 }

433}

434

435

436

439

440

441

442

443 if ( Subtarget ->inMips16Mode()) {

447 }

449

450

451 if (!InConstantPool)

452 return;

453 InConstantPool = false;

455}

456

460 if (MBB.empty())

462}

463

464

467

468 if (ExtraCode && ExtraCode[0]) {

469 if (ExtraCode[1] != 0) return true;

470

472 switch (ExtraCode[0]) {

473 default:

474

476 case 'X':

478 return true;

480 return false;

481 case 'x':

483 return true;

485 return false;

486 case 'd':

488 return true;

490 return false;

491 case 'm':

493 return true;

494 O << MO.getImm() - 1;

495 return false;

496 case 'y':

498 return true;

500 return true;

502 return false;

503 case 'z':

504

506 O << "$0";

507 return false;

508 }

509

510 break;

511 case 'D':

512 case 'L':

513 case 'M':

514 {

515 if (OpNum == 0)

516 return true;

518 if (!FlagsOP.isImm())

519 return true;

521 const unsigned NumVals = Flags.getNumOperandRegisters();

522

523

524 if (NumVals != 2) {

525 if (Subtarget->isGP64bit() && NumVals == 1 && MO.isReg()) {

528 return false;

529 }

530 return true;

531 }

532

533 unsigned RegOp = OpNum;

535

536

537 switch(ExtraCode[0]) {

538 case 'M':

539 RegOp = (Subtarget->isLittle()) ? OpNum + 1 : OpNum;

540 break;

541 case 'L':

542 RegOp = (Subtarget->isLittle()) ? OpNum : OpNum + 1;

543 break;

544 case 'D':

545 RegOp = OpNum + 1;

546 }

547 if (RegOp >= MI->getNumOperands())

548 return true;

551 return true;

554 return false;

555 }

556 break;

557 }

558 case 'w': {

560 if (w != Mips::NoRegister) {

562 return false;

563 }

564 break;

565 }

566 }

567 }

568

570 return false;

571}

572

574 unsigned OpNum,

575 const char *ExtraCode,

577 assert(OpNum + 1 < MI->getNumOperands() && "Insufficient operands");

581 "Unexpected base pointer for inline asm memory operand.");

583 "Unexpected offset for inline asm memory operand.");

585

586

587 if (ExtraCode) {

588 switch (ExtraCode[0]) {

589 case 'D':

591 break;

592 case 'M':

595 break;

596 case 'L':

599 break;

600 default:

601 return true;

602 }

603 }

604

606 << ")";

607

608 return false;

609}

610

614 bool closeP = false;

615

617 closeP = true;

618

636 }

637

640 O << '$'

642 break;

643

646 break;

647

650 return;

651

654 break;

655

659 break;

660 }

661

667 break;

668

669 default:

671 }

672

673 if (closeP) O << ")";

674}

675

678

679

680

681

682

683

684 switch (MI->getOpcode()) {

685 default:

686 break;

687 case Mips::SWM32_MM:

688 case Mips::LWM32_MM:

689 opNum = MI->getNumOperands() - 2;

690 break;

691 }

692

694 O << "(";

696 O << ")";

697}

698

701

702

704 O << ", ";

706}

707

713

716 for (int i = opNum, e = MI->getNumOperands(); i != e; ++i) {

717 if (i != opNum) O << ", ";

719 }

720}

721

723 const Triple &TT = TM.getTargetTriple();

724

725 if (TT.isOSBinFormatELF()) {

727

728

729

730

731 TS.setPic(OutContext.getObjectFileInfo()->isPositionIndependent());

732

733

734 StringRef FS = TM.getTargetFeatureString();

736 if (FS.empty() && M.size() && F->hasFnAttribute("target-features"))

737 FS = F->getFnAttribute("target-features").getValueAsString();

738

739 std::string strFS = FS.str();

740 if (M.size() && F->getFnAttribute("use-soft-float").getValueAsBool())

741 strFS += strFS.empty() ? "+soft-float" : ",+soft-float";

742

743

744

745

746

750 MTM, std::nullopt);

751

754 if (IsABICalls) {

756

757

758

759

762 }

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790

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793 }

794}

795

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810}

811

812void MipsAsmPrinter::emitInlineAsmEnd(const MCSubtargetInfo &StartInfo,

816}

817

820 unsigned uid) const {

826 break;

828

829 getTargetStreamer().emitGPRel32Value(

831 break;

833 getTargetStreamer().emitGPRel64Value(

835 break;

836 default:

838 }

839}

840

842 MCInst I;

843 I.setOpcode(Mips::JAL);

844 I.addOperand(

847}

848

849void MipsAsmPrinter::EmitInstrReg(const MCSubtargetInfo &STI, unsigned Opcode,

850 unsigned Reg) {

851 MCInst I;

852 I.setOpcode(Opcode);

855}

856

857void MipsAsmPrinter::EmitInstrRegReg(const MCSubtargetInfo &STI,

858 unsigned Opcode, unsigned Reg1,

859 unsigned Reg2) {

860 MCInst I;

861

862

863

864

865

866 if (Opcode == Mips::MTC1) {

867 unsigned Temp = Reg1;

868 Reg1 = Reg2;

869 Reg2 = Temp;

870 }

871 I.setOpcode(Opcode);

875}

876

877void MipsAsmPrinter::EmitInstrRegRegReg(const MCSubtargetInfo &STI,

878 unsigned Opcode, unsigned Reg1,

879 unsigned Reg2, unsigned Reg3) {

880 MCInst I;

881 I.setOpcode(Opcode);

886}

887

888void MipsAsmPrinter::EmitMovFPIntPair(const MCSubtargetInfo &STI,

889 unsigned MovOpc, unsigned Reg1,

890 unsigned Reg2, unsigned FPReg1,

891 unsigned FPReg2, bool LE) {

892 if (!LE) {

893 unsigned temp = Reg1;

894 Reg1 = Reg2;

895 Reg2 = temp;

896 }

897 EmitInstrRegReg(STI, MovOpc, Reg1, FPReg1);

898 EmitInstrRegReg(STI, MovOpc, Reg2, FPReg2);

899}

900

901void MipsAsmPrinter::EmitSwapFPIntParams(const MCSubtargetInfo &STI,

903 bool LE, bool ToFP) {

904 using namespace Mips16HardFloatInfo;

905

906 unsigned MovOpc = ToFP ? Mips::MTC1 : Mips::MFC1;

907 switch (PV) {

909 EmitInstrRegReg(STI, MovOpc, Mips::A0, Mips::F12);

910 break;

912 EmitMovFPIntPair(STI, MovOpc, Mips::A0, Mips::A1, Mips::F12, Mips::F14, LE);

913 break;

915 EmitInstrRegReg(STI, MovOpc, Mips::A0, Mips::F12);

916 EmitMovFPIntPair(STI, MovOpc, Mips::A2, Mips::A3, Mips::F14, Mips::F15, LE);

917 break;

919 EmitMovFPIntPair(STI, MovOpc, Mips::A0, Mips::A1, Mips::F12, Mips::F13, LE);

920 break;

922 EmitMovFPIntPair(STI, MovOpc, Mips::A0, Mips::A1, Mips::F12, Mips::F13, LE);

923 EmitMovFPIntPair(STI, MovOpc, Mips::A2, Mips::A3, Mips::F14, Mips::F15, LE);

924 break;

926 EmitMovFPIntPair(STI, MovOpc, Mips::A0, Mips::A1, Mips::F12, Mips::F13, LE);

927 EmitInstrRegReg(STI, MovOpc, Mips::A2, Mips::F14);

928 break;

930 return;

931 }

932}

933

934void MipsAsmPrinter::EmitSwapFPIntRetval(

936 bool LE) {

937 using namespace Mips16HardFloatInfo;

938

939 unsigned MovOpc = Mips::MFC1;

940 switch (RV) {

942 EmitInstrRegReg(STI, MovOpc, Mips::V0, Mips::F0);

943 break;

945 EmitMovFPIntPair(STI, MovOpc, Mips::V0, Mips::V1, Mips::F0, Mips::F1, LE);

946 break;

948 EmitMovFPIntPair(STI, MovOpc, Mips::V0, Mips::V1, Mips::F0, Mips::F1, LE);

949 break;

951 EmitMovFPIntPair(STI, MovOpc, Mips::V0, Mips::V1, Mips::F0, Mips::F1, LE);

952 EmitMovFPIntPair(STI, MovOpc, Mips::A0, Mips::A1, Mips::F2, Mips::F3, LE);

953 break;

955 break;

956 }

957}

958

959void MipsAsmPrinter::EmitFPCallStub(

961 using namespace Mips16HardFloatInfo;

962

965

966

967

968

969 std::unique_ptr STI(TM.getTarget().createMCSubtargetInfo(

970 TM.getTargetTriple(), TM.getTargetCPU(), TM.getTargetFeatureString()));

971

972

973

974

976 const char *RetType;

977

978

979

980

981

982 switch (Signature->RetSig) {

984 RetType = "float";

985 break;

987 RetType = "double";

988 break;

990 RetType = "complex";

991 break;

993 RetType = "double complex";

994 break;

996 RetType = "";

997 break;

998 }

999 const char *Parms;

1000 switch (Signature->ParamSig) {

1002 Parms = "float";

1003 break;

1005 Parms = "float, float";

1006 break;

1008 Parms = "float, double";

1009 break;

1011 Parms = "double";

1012 break;

1014 Parms = "double, double";

1015 break;

1017 Parms = "double, float";

1018 break;

1020 Parms = "";

1021 break;

1022 }

1023 OutStreamer->AddComment("\t# Stub function to call " + Twine(RetType) + " " +

1024 Twine(Symbol) + " (" + Twine(Parms) + ")");

1025

1026

1027

1029

1030

1031

1032 MCSectionELF *M = OutContext.getELFSection(

1036

1037

1038

1040 MipsTargetStreamer &TS = getTargetStreamer();

1041

1042

1043

1044

1047

1048

1049

1050

1051

1052 std::string x = "__call_stub_fp_" + std::string(Symbol);

1056 OutContext.getOrCreateSymbol("__call_stub_fp_" + Twine(Symbol));

1059

1060

1062 "should not be here if we are compiling pic");

1064

1065

1066

1067

1068

1069

1070

1071

1072

1073

1074

1075

1076

1077

1078

1079 EmitInstrRegRegReg(*STI, Mips::OR, Mips::S2, Mips::RA, Mips::ZERO);

1080

1081 EmitSwapFPIntParams(*STI, Signature->ParamSig, LE, true);

1082

1083

1084

1085 EmitJal(*STI, MSymbol);

1086

1087

1088 EmitSwapFPIntRetval(*STI, Signature->RetSig, LE);

1089

1090

1091

1092

1093

1094 EmitInstrReg(*STI, Mips::JR, Mips::S2);

1095

1101 OutStreamer->emitELFSize(Stub, T_min_E);

1104}

1105

1107

1108

1109 for (std::map<

1110 const char *,

1112 it = StubsNeeded.begin();

1113 it != StubsNeeded.end(); ++it) {

1114 const char *Symbol = it->first;

1116 EmitFPCallStub(Symbol, Signature);

1117 }

1118

1120}

1121

1122void MipsAsmPrinter::EmitSled(const MachineInstr &MI, SledKind Kind) {

1124

1125

1126

1127

1128

1129

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1186

1191

1192

1193

1196 .addReg(Mips::ZERO)

1197 .addReg(Mips::ZERO)

1198 .addExpr(TargetExpr));

1199

1200 for (int8_t I = 0; I < NoopsInSledCount; I++)

1202 .addReg(Mips::ZERO)

1203 .addReg(Mips::ZERO)

1204 .addImm(0));

1205

1207

1211 .addReg(Mips::T9)

1212 .addReg(Mips::T9)

1213 .addImm(0x34));

1214 }

1215

1217}

1218

1222

1226

1230

1235

1236

1237

1240 if (MipsExpr && MipsExpr->getSpecifier() == Mips::S_DTPREL) {

1241 switch (Size) {

1242 case 4:

1243 getTargetStreamer().emitDTPRel32Value(MipsExpr->getSubExpr());

1244 break;

1245 case 8:

1246 getTargetStreamer().emitDTPRel64Value(MipsExpr->getSubExpr());

1247 break;

1248 default:

1250 }

1251 return;

1252 }

1253 }

1255}

1256

1257bool MipsAsmPrinter::isLongBranchPseudo(int Opcode) const {

1258 return (Opcode == Mips::LONG_BRANCH_LUi

1259 || Opcode == Mips::LONG_BRANCH_LUi2Op

1260 || Opcode == Mips::LONG_BRANCH_LUi2Op_64

1261 || Opcode == Mips::LONG_BRANCH_ADDiu

1262 || Opcode == Mips::LONG_BRANCH_ADDiu2Op

1263 || Opcode == Mips::LONG_BRANCH_DADDiu

1264 || Opcode == Mips::LONG_BRANCH_DADDiu2Op);

1265}

1266

1268

1270 false, false)

1271

1272

1274LLVMInitializeMipsAsmPrinter() {

1279}

assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")

This file contains the simple types necessary to represent the attributes associated with functions a...

static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")

static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")

static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")

#define LLVM_EXTERNAL_VISIBILITY

Module.h This file contains the declarations for the Module class.

This file declares the MachineConstantPool class which is an abstract constant pool to keep track of ...

cl::opt< bool > EmitJalrReloc

static void emitDirectiveRelocJalr(const MachineInstr &MI, MCContext &OutContext, TargetMachine &TM, MCStreamer &OutStreamer, const MipsSubtarget &Subtarget)

Definition MipsAsmPrinter.cpp:150

#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)

static bool contains(SmallPtrSetImpl< ConstantExpr * > &Cache, ConstantExpr *Expr, Constant *C)

This file defines the SmallString class.

static TableGen::Emitter::Opt Y("gen-skeleton-entry", EmitSkeleton, "Generate example skeleton entry")

static TableGen::Emitter::OptClass< SkeletonEmitter > X("gen-skeleton-class", "Generate example skeleton class")

const TargetLoweringObjectFile & getObjFileLowering() const

Return information about object file lowering.

virtual void emitDebugValue(const MCExpr *Value, unsigned Size) const

Emit the directive and value for debug thread local expression.

void EmitToStreamer(MCStreamer &S, const MCInst &Inst)

TargetMachine & TM

Target machine description.

void emitXRayTable()

Emit a table with all XRay instrumentation points.

virtual void emitBasicBlockEnd(const MachineBasicBlock &MBB)

Targets can override this to emit stuff at the end of a basic block.

virtual MCSymbol * GetCPISymbol(unsigned CPID) const

Return the symbol for the specified constant pool entry.

virtual void PrintSymbolOperand(const MachineOperand &MO, raw_ostream &OS)

Print the MachineOperand as a symbol.

const MCAsmInfo * MAI

Target Asm Printer information.

MachineFunction * MF

The current machine function.

virtual void emitMachineConstantPoolValue(MachineConstantPoolValue *MCPV)

void recordSled(MCSymbol *Sled, const MachineInstr &MI, SledKind Kind, uint8_t Version=0)

unsigned getFunctionNumber() const

Return a unique ID for the current function.

void emitGlobalConstant(const DataLayout &DL, const Constant *CV, AliasMapTy *AliasList=nullptr)

EmitGlobalConstant - Print a general LLVM constant to the .s file.

MCSymbol * CurrentFnSym

The symbol for the current function.

MCContext & OutContext

This is the context for the output file that we are streaming.

bool isPositionIndependent() const

bool runOnMachineFunction(MachineFunction &MF) override

Emit the specified function out to the OutStreamer.

std::unique_ptr< MCStreamer > OutStreamer

This is the MCStreamer object for the file we are generating.

unsigned getPointerSize() const

Return the pointer size from the TargetMachine.

MCSymbol * GetBlockAddressSymbol(const BlockAddress *BA) const

Return the MCSymbol used to satisfy BlockAddress uses of the specified basic block.

const DataLayout & getDataLayout() const

Return information about data layout.

const MCSubtargetInfo & getSubtargetInfo() const

Return information about subtarget.

virtual void emitInlineAsmStart() const

Let the target do anything it needs to do before emitting inlineasm.

virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, const char *ExtraCode, raw_ostream &OS)

Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant.

bool isLittleEndian() const

Layout endianness...

StringRef getPrivateGlobalPrefix() const

static const MCBinaryExpr * createSub(const MCExpr *LHS, const MCExpr *RHS, MCContext &Ctx)

Context object for machine code objects.

LLVM_ABI MCSymbol * createTempSymbol()

Create a temporary symbol with a unique name.

Base class for the full range of assembler expressions which are needed for parsing.

Instances of this class represent a single low-level machine instruction.

void addOperand(const MCOperand Op)

void setOpcode(unsigned Op)

Instances of this class represent operands of the MCInst class.

static MCOperand createExpr(const MCExpr *Val)

static MCOperand createReg(MCRegister Reg)

MCRegister getRARegister() const

This method should return the register where the return address can be found.

Wrapper class representing physical registers. Should be passed by value.

Streaming machine code generation interface.

virtual void emitRelocDirective(const MCExpr &Offset, StringRef Name, const MCExpr *Expr, SMLoc Loc={})

Record a relocation described by the .reloc directive.

virtual void emitLabel(MCSymbol *Symbol, SMLoc Loc=SMLoc())

Emit a label for Symbol into the current section.

Generic base class for all target subtargets.

static const MCSymbolRefExpr * create(const MCSymbol *Symbol, MCContext &Ctx, SMLoc Loc=SMLoc())

MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...

LLVM_ABI void print(raw_ostream &OS, const MCAsmInfo *MAI) const

print - Print the value to the stream OS.

StringRef getName() const

getName - Get the symbol name.

LLVM_ABI MCSymbol * getSymbol() const

Return the MCSymbol for this basic block.

Instructions::const_iterator const_instr_iterator

This class is a data container for one entry in a MachineConstantPool.

union llvm::MachineConstantPoolEntry::@004270020304201266316354007027341142157160323045 Val

The constant itself.

bool isMachineConstantPoolEntry() const

isMachineConstantPoolEntry - Return true if the MachineConstantPoolEntry is indeed a target specific ...

MachineConstantPoolValue * MachineCPVal

const Constant * ConstVal

The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.

const std::vector< CalleeSavedInfo > & getCalleeSavedInfo() const

Returns a reference to call saved info vector for the current function.

Representation of each machine instruction.

@ EK_GPRel32BlockAddress

EK_GPRel32BlockAddress - Each entry is an address of block, encoded with a relocation as gp-relative,...

@ EK_BlockAddress

EK_BlockAddress - Each entry is a plain address of block, e.g.: .word LBB123.

@ EK_GPRel64BlockAddress

EK_GPRel64BlockAddress - Each entry is an address of block, encoded with a relocation as gp-relative,...

JTEntryKind getEntryKind() const

MachineOperand class - Representation of each machine instruction operand.

bool isReg() const

isReg - Tests if this is a MO_Register operand.

MachineBasicBlock * getMBB() const

bool isImm() const

isImm - Tests if this is a MO_Immediate operand.

const BlockAddress * getBlockAddress() const

unsigned getTargetFlags() const

MachineOperandType getType() const

getType - Returns the MachineOperandType for this operand.

getReg - Returns the register number.

MCSymbol * getMCSymbol() const

@ MO_Immediate

Immediate operand.

@ MO_ConstantPoolIndex

Address of indexed Constant in Constant Pool.

@ MO_GlobalAddress

Address of a global value.

@ MO_BlockAddress

Address of a basic block.

@ MO_MachineBasicBlock

MachineBasicBlock reference.

@ MO_Register

int64_t getOffset() const

Return the offset from the symbol in this operand.

void emitFunctionBodyStart() override

EmitFunctionBodyStart - Targets can override this to emit stuff before the first basic block in the f...

Definition MipsAsmPrinter.cpp:416

void emitDebugValue(const MCExpr *Value, unsigned Size) const override

Emit the directive and value for debug thread local expression.

Definition MipsAsmPrinter.cpp:1238

bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, const char *ExtraCode, raw_ostream &O) override

Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant.

Definition MipsAsmPrinter.cpp:465

void printSavedRegsBitmask()

Definition MipsAsmPrinter.cpp:322

void emitBasicBlockEnd(const MachineBasicBlock &MBB) override

Targets can override this to emit stuff at the end of a basic block.

Definition MipsAsmPrinter.cpp:457

void LowerPATCHABLE_FUNCTION_ENTER(const MachineInstr &MI)

Definition MipsAsmPrinter.cpp:1219

const char * getCurrentABIString() const

Emit Set directives.

Definition MipsAsmPrinter.cpp:386

void printFCCOperand(const MachineInstr *MI, int opNum, raw_ostream &O)

Definition MipsAsmPrinter.cpp:708

void printRegisterList(const MachineInstr *MI, int opNum, raw_ostream &O)

Definition MipsAsmPrinter.cpp:715

void PrintDebugValueComment(const MachineInstr *MI, raw_ostream &OS)

Definition MipsAsmPrinter.cpp:1231

bool runOnMachineFunction(MachineFunction &MF) override

Emit the specified function out to the OutStreamer.

Definition MipsAsmPrinter.cpp:79

void emitFunctionBodyEnd() override

EmitFunctionBodyEnd - Targets can override this to emit stuff after the last basic block in the funct...

Definition MipsAsmPrinter.cpp:437

MipsMCInstLower MCInstLowering

void printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O)

Definition MipsAsmPrinter.cpp:677

void LowerPATCHABLE_TAIL_CALL(const MachineInstr &MI)

Definition MipsAsmPrinter.cpp:1227

const MipsSubtarget * Subtarget

const MipsFunctionInfo * MipsFI

void emitEndOfAsmFile(Module &M) override

This virtual method can be overridden by targets that want to emit something at the end of their file...

Definition MipsAsmPrinter.cpp:1106

bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum, const char *ExtraCode, raw_ostream &O) override

Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant as...

Definition MipsAsmPrinter.cpp:573

void LowerPATCHABLE_FUNCTION_EXIT(const MachineInstr &MI)

Definition MipsAsmPrinter.cpp:1223

void emitFrameDirective()

Frame Directive.

Definition MipsAsmPrinter.cpp:375

void emitStartOfAsmFile(Module &M) override

This virtual method can be overridden by targets that want to emit something at the start of their fi...

Definition MipsAsmPrinter.cpp:722

void printMemOperandEA(const MachineInstr *MI, int opNum, raw_ostream &O)

Definition MipsAsmPrinter.cpp:700

void printOperand(const MachineInstr *MI, int opNum, raw_ostream &O)

Definition MipsAsmPrinter.cpp:611

void emitFunctionEntryLabel() override

EmitFunctionEntryLabel - Emit the label that is the entrypoint for the function.

Definition MipsAsmPrinter.cpp:395

void emitInstruction(const MachineInstr *MI) override

Targets should implement this to emit instructions.

Definition MipsAsmPrinter.cpp:176

MipsFunctionInfo - This class is derived from MachineFunction private Mips target-specific informatio...

static const char * getRegisterName(MCRegister Reg)

MCOperand LowerOperand(const MachineOperand &MO, int64_t offset=0) const

bool inMicroMipsMode() const

bool useSoftFloat() const

const MipsABIInfo & getABI() const

bool isLittleEndian() const

virtual void emitDirectiveSetAt()

virtual void emitDirectiveSetReorder()

void forbidModuleDirective()

virtual void emitDirectiveSetNoMicroMips()

virtual void emitDirectiveNaN2008()

virtual void emitDirectiveEnd(StringRef Name)

virtual void emitDirectiveSetMacro()

virtual void setUsesMicroMips()

virtual void emitDirectiveEnt(const MCSymbol &Symbol)

virtual void emitDirectiveSetNoMips16()

virtual void emitDirectiveSetPush()

virtual void setPic(bool Value)

virtual void emitDirectiveSetNoAt()

void updateABIInfo(const PredicateLibrary &P)

virtual void emitDirectiveNaNLegacy()

virtual void emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff)

virtual void emitDirectiveSetPop()

virtual void emitDirectiveSetMicroMips()

virtual void emitDirectiveSetNoMacro()

virtual void emitDirectiveModuleOddSPReg()

virtual void emitDirectiveInsn()

virtual void emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff)

virtual void emitDirectiveSetNoReorder()

virtual void emitDirectiveOptionPic0()

virtual void emitDirectiveSetMips16()

virtual void emitDirectiveAbiCalls()

virtual void emitDirectiveModuleFP()

A Module instance is used to store all the information related to an LLVM module.

FunctionListType::iterator iterator

The Function iterators.

Wrapper class representing virtual and physical registers.

SmallString - A SmallString is just a SmallVector with methods and accessors that make it work better...

StringRef - Represent a constant reference to a string, i.e.

LLVM_ABI std::string lower() const

Primary interface to the complete machine description for the target machine.

TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...

virtual Register getFrameRegister(const MachineFunction &MF) const =0

Debug information queries.

Target - Wrapper for Target specific information.

Triple - Helper class for working with autoconf configuration names.

static Twine utohexstr(uint64_t Val)

LLVM Value Representation.

This class implements an extremely fast bulk output stream that can only output to a stream.

A raw_ostream that writes to an SmallVector or SmallString.

#define llvm_unreachable(msg)

Marks that the current location is not supposed to be reachable.

constexpr char Align[]

Key for Kernel::Arg::Metadata::mAlign.

StringRef selectMipsCPU(const Triple &TT, StringRef CPU)

Select the Mips CPU for the given triple and cpu name.

const char * MipsFCCToString(Mips::CondCode CC)

This is an optimization pass for GlobalISel generic memory operations.

auto drop_begin(T &&RangeOrContainer, size_t N=1)

Return a range covering RangeOrContainer with the first N elements excluded.

Target & getTheMips64Target()

decltype(auto) dyn_cast(const From &Val)

dyn_cast - Return the argument parameter cast to the specified type.

constexpr bool isPowerOf2_64(uint64_t Value)

Return true if the argument is a power of two > 0 (64 bit edition.)

unsigned Log2_64(uint64_t Value)

Return the floor log base 2 of the specified value, -1 if the value is zero.

@ MCDR_DataRegionEnd

.end_data_region

@ MCDR_DataRegion

.data_region

static MCRegister getMSARegFromFReg(MCRegister Reg)

Target & getTheMips64elTarget()

Target & getTheMipselTarget()

Target & getTheMipsTarget()

@ MCSA_Global

.type _foo, @gnu_unique_object

@ MCSA_ELF_TypeFunction

.type _foo, STT_FUNC # aka @function

This struct is a compact representation of a valid (non-zero power of two) alignment.

RegisterAsmPrinter - Helper template for registering a target specific assembly printer,...