MipsAsmPrinter.cpp Source File (original) (raw)

62#include

63#include

64#include

65#include

66#include

67#include

69using namespace llvm;

71#define DEBUG_TYPE "mips-asm-printer"

77}

85 StubsNeeded.insert(I);

90 NaClAlignIndirectJumpTargets(MF);

96 return true;

97}

102}

103

104#include "MipsGenMCPseudoLowering.inc"

105

106

107

108void MipsAsmPrinter::emitPseudoIndirectBranch(MCStreamer &OutStreamer,

110 bool HasLinkReg = false;

113

115

116 TmpInst0.setOpcode(Mips::JALR64);

117 HasLinkReg = true;

119

120 if (InMicroMipsMode)

121 TmpInst0.setOpcode(Mips::JRC16_MMR6);

122 else {

124 HasLinkReg = true;

125 }

127

129 else {

130

132 }

133

135

136 if (HasLinkReg) {

137 unsigned ZeroReg = Subtarget->isGP64bit() ? Mips::ZERO_64 : Mips::ZERO;

139 }

140

141 lowerOperand(MI->getOperand(0), MCOp);

143

145}

146

147

148

149

150

151

152

153

163 if (Callee && !Callee->getName().empty()) {

165 const MCExpr *OffsetExpr =

167 const MCExpr *CaleeExpr =

170 *OffsetExpr,

171 Subtarget.inMicroMipsMode() ? "R_MICROMIPS_JALR" : "R_MIPS_JALR",

172 CaleeExpr, SMLoc(), *TM.getMCSubtargetInfo());

173 OutStreamer.emitLabel(OffsetLabel);

174 return;

175 }

176 }

177 }

178}

179

181

182

183

184

186 unsigned Opc = MI->getOpcode();

188

189 if (MI->isDebugValue()) {

192

194 return;

195 }

196 if (MI->isDebugLabel())

197 return;

198

199

200 if (InConstantPool && Opc != Mips::CONSTPOOL_ENTRY) {

202 InConstantPool = false;

203 }

204 if (Opc == Mips::CONSTPOOL_ENTRY) {

205

206

207

208

209

210

211

212 unsigned LabelId = (unsigned)MI->getOperand(0).getImm();

213 unsigned CPIdx = (unsigned)MI->getOperand(1).getIndex();

214

215

216 if (!InConstantPool) {

218 InConstantPool = true;

219 }

220

222

226 else

228 return;

229 }

230

231 switch (Opc) {

232 case Mips::PATCHABLE_FUNCTION_ENTER:

234 return;

235 case Mips::PATCHABLE_FUNCTION_EXIT:

237 return;

238 case Mips::PATCHABLE_TAIL_CALL:

240 return;

241 }

242

244 (MI->isReturn() || MI->isCall() || MI->isIndirectBranch())) {

246 }

247

250

251 do {

252

253 if (MCInst OutInst; lowerPseudoInstExpansion(&*I, OutInst)) {

255 continue;

256 }

257

258

259 if (I->isBundle())

260 continue;

261

262 if (I->getOpcode() == Mips::PseudoReturn ||

263 I->getOpcode() == Mips::PseudoReturn64 ||

264 I->getOpcode() == Mips::PseudoIndirectBranch ||

265 I->getOpcode() == Mips::PseudoIndirectBranch64 ||

266 I->getOpcode() == Mips::TAILCALLREG ||

267 I->getOpcode() == Mips::TAILCALLREG64) {

269 continue;

270 }

271

272

273

274

275

276

277

278

280 && !isLongBranchPseudo(I->getOpcode()))

281 llvm_unreachable("Pseudo opcode found in emitInstruction()");

282

286 } while ((++I != E) && I->isInsideBundle());

287}

288

289

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328 unsigned CPUBitmask = 0, FPUBitmask = 0;

329 int CPUTopSavedRegOff, FPUTopSavedRegOff;

330

331

335

336 unsigned CPURegSize = TRI->getRegSizeInBits(Mips::GPR32RegClass) / 8;

337 unsigned FGR32RegSize = TRI->getRegSizeInBits(Mips::FGR32RegClass) / 8;

338 unsigned AFGR64RegSize = TRI->getRegSizeInBits(Mips::AFGR64RegClass) / 8;

339 bool HasAFGR64Reg = false;

340 unsigned CSFPRegsSize = 0;

341

342 for (const auto &I : CSI) {

344 unsigned RegNum = TRI->getEncodingValue(Reg);

345

346

347

348 if (Mips::FGR32RegClass.contains(Reg)) {

349 FPUBitmask |= (1 << RegNum);

350 CSFPRegsSize += FGR32RegSize;

351 } else if (Mips::AFGR64RegClass.contains(Reg)) {

352 FPUBitmask |= (3 << RegNum);

353 CSFPRegsSize += AFGR64RegSize;

354 HasAFGR64Reg = true;

355 } else if (Mips::GPR32RegClass.contains(Reg))

356 CPUBitmask |= (1 << RegNum);

357 }

358

359

360 FPUTopSavedRegOff = FPUBitmask ?

361 (HasAFGR64Reg ? -AFGR64RegSize : -FGR32RegSize) : 0;

362

363

364 CPUTopSavedRegOff = CPUBitmask ? -CSFPRegsSize - CPURegSize : 0;

365

367

368 TS.emitMask(CPUBitmask, CPUTopSavedRegOff);

369

370

371 TS.emitFMask(FPUBitmask, FPUTopSavedRegOff);

372}

373

374

375

376

377

378

381

385

386 getTargetStreamer().emitFrame(stackReg, stackSize, returnReg);

387}

388

389

396 }

397}

398

401

402

403

406

411 } else

413

416 else

418

421}

422

423

424

427

429

431 if (!IsNakedFunction)

433

434 if (!IsNakedFunction)

436

441 }

442}

443

444

445

448

449

450

451

456 }

458

459

460 if (!InConstantPool)

461 return;

462 InConstantPool = false;

464}

465

471}

472

473

476

477 if (ExtraCode && ExtraCode[0]) {

478 if (ExtraCode[1] != 0) return true;

479

481 switch (ExtraCode[0]) {

482 default:

483

485 case 'X':

487 return true;

489 return false;

490 case 'x':

492 return true;

494 return false;

495 case 'd':

497 return true;

499 return false;

500 case 'm':

502 return true;

503 O << MO.getImm() - 1;

504 return false;

505 case 'y':

507 return true;

509 return true;

511 return false;

512 case 'z':

513

515 O << "$0";

516 return false;

517 }

518

519 break;

520 case 'D':

521 case 'L':

522 case 'M':

523 {

524 if (OpNum == 0)

525 return true;

527 if (!FlagsOP.isImm())

528 return true;

530 const unsigned NumVals = Flags.getNumOperandRegisters();

531

532

533 if (NumVals != 2) {

537 return false;

538 }

539 return true;

540 }

541

542 unsigned RegOp = OpNum;

544

545

546 switch(ExtraCode[0]) {

547 case 'M':

549 break;

550 case 'L':

552 break;

553 case 'D':

554 RegOp = OpNum + 1;

555 }

556 if (RegOp >= MI->getNumOperands())

557 return true;

560 return true;

563 return false;

564 }

565 break;

566 }

567 case 'w': {

569 if (w != Mips::NoRegister) {

571 return false;

572 }

573 break;

574 }

575 }

576 }

577

579 return false;

580}

581

583 unsigned OpNum,

584 const char *ExtraCode,

586 assert(OpNum + 1 < MI->getNumOperands() && "Insufficient operands");

590 "Unexpected base pointer for inline asm memory operand.");

592 "Unexpected offset for inline asm memory operand.");

594

595

596 if (ExtraCode) {

597 switch (ExtraCode[0]) {

598 case 'D':

600 break;

601 case 'M':

604 break;

605 case 'L':

608 break;

609 default:

610 return true;

611 }

612 }

613

615 << ")";

616

617 return false;

618}

619

623 bool closeP = false;

624

626 closeP = true;

627

645 }

646

649 O << '$'

651 break;

652

655 break;

656

659 return;

660

663 break;

664

668 break;

669 }

670

676 break;

677

678 default:

680 }

681

682 if (closeP) O << ")";

683}

684

687

688

689

690

691

692

693 switch (MI->getOpcode()) {

694 default:

695 break;

696 case Mips::SWM32_MM:

697 case Mips::LWM32_MM:

698 opNum = MI->getNumOperands() - 2;

699 break;

700 }

701

703 O << "(";

705 O << ")";

706}

707

710

711

713 O << ", ";

715}

716

719 const char *Modifier) {

722}

723

726 for (int i = opNum, e = MI->getNumOperands(); i != e; ++i) {

727 if (i != opNum) O << ", ";

729 }

730}

731

734

735 if (TT.isOSBinFormatELF()) {

737

738

739

740

742

743

746 if (FS.empty() && M.size() && F->hasFnAttribute("target-features"))

747 FS = F->getFnAttribute("target-features").getValueAsString();

748

749

750

751

752

756 std::nullopt);

757

760 if (IsABICalls) {

762

763

764

765

768 }

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786

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796

797

799 }

800}

801

802void MipsAsmPrinter::emitInlineAsmStart() const {

804

805

806

807

808

809

810

816}

817

818void MipsAsmPrinter::emitInlineAsmEnd(const MCSubtargetInfo &StartInfo,

822}

823

826 I.setOpcode(Mips::JAL);

827 I.addOperand(

830}

831

832void MipsAsmPrinter::EmitInstrReg(const MCSubtargetInfo &STI, unsigned Opcode,

833 unsigned Reg) {

835 I.setOpcode(Opcode);

838}

839

840void MipsAsmPrinter::EmitInstrRegReg(const MCSubtargetInfo &STI,

841 unsigned Opcode, unsigned Reg1,

842 unsigned Reg2) {

844

845

846

847

848

849 if (Opcode == Mips::MTC1) {

850 unsigned Temp = Reg1;

851 Reg1 = Reg2;

852 Reg2 = Temp;

853 }

854 I.setOpcode(Opcode);

858}

859

860void MipsAsmPrinter::EmitInstrRegRegReg(const MCSubtargetInfo &STI,

861 unsigned Opcode, unsigned Reg1,

862 unsigned Reg2, unsigned Reg3) {

864 I.setOpcode(Opcode);

869}

870

871void MipsAsmPrinter::EmitMovFPIntPair(const MCSubtargetInfo &STI,

872 unsigned MovOpc, unsigned Reg1,

873 unsigned Reg2, unsigned FPReg1,

874 unsigned FPReg2, bool LE) {

875 if (!LE) {

876 unsigned temp = Reg1;

877 Reg1 = Reg2;

878 Reg2 = temp;

879 }

880 EmitInstrRegReg(STI, MovOpc, Reg1, FPReg1);

881 EmitInstrRegReg(STI, MovOpc, Reg2, FPReg2);

882}

883

884void MipsAsmPrinter::EmitSwapFPIntParams(const MCSubtargetInfo &STI,

886 bool LE, bool ToFP) {

887 using namespace Mips16HardFloatInfo;

888

889 unsigned MovOpc = ToFP ? Mips::MTC1 : Mips::MFC1;

890 switch (PV) {

892 EmitInstrRegReg(STI, MovOpc, Mips::A0, Mips::F12);

893 break;

895 EmitMovFPIntPair(STI, MovOpc, Mips::A0, Mips::A1, Mips::F12, Mips::F14, LE);

896 break;

898 EmitInstrRegReg(STI, MovOpc, Mips::A0, Mips::F12);

899 EmitMovFPIntPair(STI, MovOpc, Mips::A2, Mips::A3, Mips::F14, Mips::F15, LE);

900 break;

902 EmitMovFPIntPair(STI, MovOpc, Mips::A0, Mips::A1, Mips::F12, Mips::F13, LE);

903 break;

905 EmitMovFPIntPair(STI, MovOpc, Mips::A0, Mips::A1, Mips::F12, Mips::F13, LE);

906 EmitMovFPIntPair(STI, MovOpc, Mips::A2, Mips::A3, Mips::F14, Mips::F15, LE);

907 break;

909 EmitMovFPIntPair(STI, MovOpc, Mips::A0, Mips::A1, Mips::F12, Mips::F13, LE);

910 EmitInstrRegReg(STI, MovOpc, Mips::A2, Mips::F14);

911 break;

913 return;

914 }

915}

916

917void MipsAsmPrinter::EmitSwapFPIntRetval(

919 bool LE) {

920 using namespace Mips16HardFloatInfo;

921

922 unsigned MovOpc = Mips::MFC1;

923 switch (RV) {

925 EmitInstrRegReg(STI, MovOpc, Mips::V0, Mips::F0);

926 break;

928 EmitMovFPIntPair(STI, MovOpc, Mips::V0, Mips::V1, Mips::F0, Mips::F1, LE);

929 break;

931 EmitMovFPIntPair(STI, MovOpc, Mips::V0, Mips::V1, Mips::F0, Mips::F1, LE);

932 break;

934 EmitMovFPIntPair(STI, MovOpc, Mips::V0, Mips::V1, Mips::F0, Mips::F1, LE);

935 EmitMovFPIntPair(STI, MovOpc, Mips::A0, Mips::A1, Mips::F2, Mips::F3, LE);

936 break;

938 break;

939 }

940}

941

942void MipsAsmPrinter::EmitFPCallStub(

944 using namespace Mips16HardFloatInfo;

945

948

949

950

951

955

956

957

958

960 const char *RetType;

961

962

963

964

965

966 switch (Signature->RetSig) {

968 RetType = "float";

969 break;

971 RetType = "double";

972 break;

974 RetType = "complex";

975 break;

977 RetType = "double complex";

978 break;

980 RetType = "";

981 break;

982 }

983 const char *Parms;

984 switch (Signature->ParamSig) {

986 Parms = "float";

987 break;

989 Parms = "float, float";

990 break;

992 Parms = "float, double";

993 break;

995 Parms = "double";

996 break;

998 Parms = "double, double";

999 break;

1001 Parms = "double, float";

1002 break;

1004 Parms = "";

1005 break;

1006 }

1007 OutStreamer->AddComment("\t# Stub function to call " + Twine(RetType) + " " +

1008 Twine(Symbol) + " (" + Twine(Parms) + ")");

1009

1010

1011

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1020

1021

1022

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1028

1031

1032

1033

1034

1035

1036 std::string x = "__call_stub_fp_" + std::string(Symbol);

1044

1045

1047 "should not be here if we are compiling pic");

1049

1050

1051

1052

1053

1054

1055

1056

1057

1058

1059

1060

1061

1062

1063

1064 EmitInstrRegRegReg(*STI, Mips::OR, Mips::S2, Mips::RA, Mips::ZERO);

1065

1066 EmitSwapFPIntParams(*STI, Signature->ParamSig, LE, true);

1067

1068

1069

1070 EmitJal(*STI, MSymbol);

1071

1072

1073 EmitSwapFPIntRetval(*STI, Signature->RetSig, LE);

1074

1075

1076

1077

1078

1079 EmitInstrReg(*STI, Mips::JR, Mips::S2);

1080

1086 OutStreamer->emitELFSize(Stub, T_min_E);

1089}

1090

1092

1093

1094 for (std::map<

1095 const char *,

1097 it = StubsNeeded.begin();

1098 it != StubsNeeded.end(); ++it) {

1099 const char *Symbol = it->first;

1101 EmitFPCallStub(Symbol, Signature);

1102 }

1103

1105}

1106

1107void MipsAsmPrinter::EmitSled(const MachineInstr &MI, SledKind Kind) {

1109

1110

1111

1112

1113

1114

1115

1116

1117

1118

1119

1120

1121

1122

1123

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1128

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1177

1178

1182 .addReg(Mips::ZERO)

1183 .addReg(Mips::ZERO)

1184 .addExpr(TargetExpr));

1185

1186 for (int8_t I = 0; I < NoopsInSledCount; I++)

1188 .addReg(Mips::ZERO)

1189 .addReg(Mips::ZERO)

1190 .addImm(0));

1191

1193

1197 .addReg(Mips::T9)

1198 .addReg(Mips::T9)

1199 .addImm(0x34));

1200 }

1201

1203}

1204

1207}

1208

1211}

1212

1215}

1216

1219

1220}

1221

1222

1223

1225 if (auto *MipsExpr = dyn_cast(Value)) {

1227 switch (Size) {

1228 case 4:

1229 OutStreamer->emitDTPRel32Value(MipsExpr->getSubExpr());

1230 break;

1231 case 8:

1232 OutStreamer->emitDTPRel64Value(MipsExpr->getSubExpr());

1233 break;

1234 default:

1236 }

1237 return;

1238 }

1239 }

1241}

1242

1243

1244

1245void MipsAsmPrinter::NaClAlignIndirectJumpTargets(MachineFunction &MF) {

1246

1248 const std::vector &JT = JtInfo->getJumpTables();

1249 for (const auto &I : JT) {

1250 const std::vector<MachineBasicBlock *> &MBBs = I.MBBs;

1251

1254 }

1255 }

1256

1257

1258 for (auto &MBB : MF) {

1261 }

1262}

1263

1264bool MipsAsmPrinter::isLongBranchPseudo(int Opcode) const {

1265 return (Opcode == Mips::LONG_BRANCH_LUi

1266 || Opcode == Mips::LONG_BRANCH_LUi2Op

1267 || Opcode == Mips::LONG_BRANCH_LUi2Op_64

1268 || Opcode == Mips::LONG_BRANCH_ADDiu

1269 || Opcode == Mips::LONG_BRANCH_ADDiu2Op

1270 || Opcode == Mips::LONG_BRANCH_DADDiu

1271 || Opcode == Mips::LONG_BRANCH_DADDiu2Op);

1272}

1273

1274

1280}

This file contains the simple types necessary to represent the attributes associated with functions a...

static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")

static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")

#define LLVM_EXTERNAL_VISIBILITY

static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")

Module.h This file contains the declarations for the Module class.

This file declares the MachineConstantPool class which is an abstract constant pool to keep track of ...

unsigned const TargetRegisterInfo * TRI

cl::opt< bool > EmitJalrReloc

static void emitDirectiveRelocJalr(const MachineInstr &MI, MCContext &OutContext, TargetMachine &TM, MCStreamer &OutStreamer, const MipsSubtarget &Subtarget)

LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMipsAsmPrinter()

cl::opt< bool > EmitJalrReloc

static GCMetadataPrinterRegistry::Add< OcamlGCMetadataPrinter > Y("ocaml", "ocaml 3.10-compatible collector")

assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())

static bool contains(SmallPtrSetImpl< ConstantExpr * > &Cache, ConstantExpr *Expr, Constant *C)

This file defines the SmallString class.

const TargetLoweringObjectFile & getObjFileLowering() const

Return information about object file lowering.

virtual void emitDebugValue(const MCExpr *Value, unsigned Size) const

Emit the directive and value for debug thread local expression.

void EmitToStreamer(MCStreamer &S, const MCInst &Inst)

TargetMachine & TM

Target machine description.

void emitXRayTable()

Emit a table with all XRay instrumentation points.

virtual void emitBasicBlockEnd(const MachineBasicBlock &MBB)

Targets can override this to emit stuff at the end of a basic block.

virtual MCSymbol * GetCPISymbol(unsigned CPID) const

Return the symbol for the specified constant pool entry.

virtual void PrintSymbolOperand(const MachineOperand &MO, raw_ostream &OS)

Print the MachineOperand as a symbol.

const MCAsmInfo * MAI

Target Asm Printer information.

MachineFunction * MF

The current machine function.

virtual void emitMachineConstantPoolValue(MachineConstantPoolValue *MCPV)

void recordSled(MCSymbol *Sled, const MachineInstr &MI, SledKind Kind, uint8_t Version=0)

unsigned getFunctionNumber() const

Return a unique ID for the current function.

void emitGlobalConstant(const DataLayout &DL, const Constant *CV, AliasMapTy *AliasList=nullptr)

EmitGlobalConstant - Print a general LLVM constant to the .s file.

MCSymbol * CurrentFnSym

The symbol for the current function.

void emitAlignment(Align Alignment, const GlobalObject *GV=nullptr, unsigned MaxBytesToEmit=0) const

Emit an alignment directive to the specified power of two boundary.

MCContext & OutContext

This is the context for the output file that we are streaming.

bool isPositionIndependent() const

bool runOnMachineFunction(MachineFunction &MF) override

Emit the specified function out to the OutStreamer.

std::unique_ptr< MCStreamer > OutStreamer

This is the MCStreamer object for the file we are generating.

MCSymbol * GetBlockAddressSymbol(const BlockAddress *BA) const

Return the MCSymbol used to satisfy BlockAddress uses of the specified basic block.

const DataLayout & getDataLayout() const

Return information about data layout.

const MCSubtargetInfo & getSubtargetInfo() const

Return information about subtarget.

virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, const char *ExtraCode, raw_ostream &OS)

Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant.

bool isLittleEndian() const

Layout endianness...

StringRef getPrivateGlobalPrefix() const

bool hasFnAttribute(Attribute::AttrKind Kind) const

Return true if the function has the attribute.

static const MCBinaryExpr * createSub(const MCExpr *LHS, const MCExpr *RHS, MCContext &Ctx)

Context object for machine code objects.

const MCObjectFileInfo * getObjectFileInfo() const

MCSymbol * createTempSymbol()

Create a temporary symbol with a unique name.

MCSectionELF * getELFSection(const Twine &Section, unsigned Type, unsigned Flags)

MCSymbol * getOrCreateSymbol(const Twine &Name)

Lookup the symbol inside with the specified Name.

Base class for the full range of assembler expressions which are needed for parsing.

Instances of this class represent a single low-level machine instruction.

void addOperand(const MCOperand Op)

void setOpcode(unsigned Op)

bool isPositionIndependent() const

MCSection * getTextSection() const

Instances of this class represent operands of the MCInst class.

static MCOperand createExpr(const MCExpr *Val)

static MCOperand createReg(MCRegister Reg)

MCRegister getRARegister() const

This method should return the register where the return address can be found.

Wrapper class representing physical registers. Should be passed by value.

This represents a section on linux, lots of unix variants and some bare metal systems.

Streaming machine code generation interface.

virtual std::optional< std::pair< bool, std::string > > emitRelocDirective(const MCExpr &Offset, StringRef Name, const MCExpr *Expr, SMLoc Loc, const MCSubtargetInfo &STI)

Record a relocation described by the .reloc directive.

virtual void emitLabel(MCSymbol *Symbol, SMLoc Loc=SMLoc())

Emit a label for Symbol into the current section.

Generic base class for all target subtargets.

Represent a reference to a symbol from inside an expression.

static const MCSymbolRefExpr * create(const MCSymbol *Symbol, MCContext &Ctx)

MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...

void print(raw_ostream &OS, const MCAsmInfo *MAI) const

print - Print the value to the stream OS.

StringRef getName() const

getName - Get the symbol name.

MCSymbol * getSymbol() const

Return the MCSymbol for this basic block.

bool hasAddressTaken() const

Test whether this block is used as something other than the target of a terminator,...

void setAlignment(Align A)

Set alignment of the basic block.

Instructions::const_iterator const_instr_iterator

This class is a data container for one entry in a MachineConstantPool.

bool isMachineConstantPoolEntry() const

isMachineConstantPoolEntry - Return true if the MachineConstantPoolEntry is indeed a target specific ...

union llvm::MachineConstantPoolEntry::@204 Val

The constant itself.

MachineConstantPoolValue * MachineCPVal

const Constant * ConstVal

const std::vector< MachineConstantPoolEntry > & getConstants() const

The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.

uint64_t getStackSize() const

Return the number of bytes that must be allocated to hold all of the fixed size frame objects.

const std::vector< CalleeSavedInfo > & getCalleeSavedInfo() const

Returns a reference to call saved info vector for the current function.

const TargetSubtargetInfo & getSubtarget() const

getSubtarget - Return the subtarget for which this machine code is being compiled.

MachineFrameInfo & getFrameInfo()

getFrameInfo - Return the frame info object for the current function.

MCContext & getContext() const

const DataLayout & getDataLayout() const

Return the DataLayout attached to the Module associated to this MF.

Align getAlignment() const

getAlignment - Return the alignment of the function.

Function & getFunction()

Return the LLVM function that this machine code represents.

Ty * getInfo()

getInfo - Keep track of various per-function pieces of information for backends that would like to do...

MachineConstantPool * getConstantPool()

getConstantPool - Return the constant pool object for the current function.

const MachineJumpTableInfo * getJumpTableInfo() const

getJumpTableInfo - Return the jump table info object for the current function.

Representation of each machine instruction.

MachineOperand class - Representation of each machine instruction operand.

bool isReg() const

isReg - Tests if this is a MO_Register operand.

MachineBasicBlock * getMBB() const

bool isImm() const

isImm - Tests if this is a MO_Immediate operand.

const BlockAddress * getBlockAddress() const

unsigned getTargetFlags() const

MachineOperandType getType() const

getType - Returns the MachineOperandType for this operand.

getReg - Returns the register number.

MCSymbol * getMCSymbol() const

@ MO_Immediate

Immediate operand.

@ MO_ConstantPoolIndex

Address of indexed Constant in Constant Pool.

@ MO_GlobalAddress

Address of a global value.

@ MO_BlockAddress

Address of a basic block.

@ MO_MachineBasicBlock

MachineBasicBlock reference.

@ MO_Register

int64_t getOffset() const

Return the offset from the symbol in this operand.

void emitFunctionBodyStart() override

EmitFunctionBodyStart - Targets can override this to emit stuff before the first basic block in the f...

void emitDebugValue(const MCExpr *Value, unsigned Size) const override

Emit the directive and value for debug thread local expression.

bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, const char *ExtraCode, raw_ostream &O) override

Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant.

void printSavedRegsBitmask()

void emitBasicBlockEnd(const MachineBasicBlock &MBB) override

Targets can override this to emit stuff at the end of a basic block.

void LowerPATCHABLE_FUNCTION_ENTER(const MachineInstr &MI)

const char * getCurrentABIString() const

Emit Set directives.

void printRegisterList(const MachineInstr *MI, int opNum, raw_ostream &O)

void PrintDebugValueComment(const MachineInstr *MI, raw_ostream &OS)

bool runOnMachineFunction(MachineFunction &MF) override

Emit the specified function out to the OutStreamer.

void emitFunctionBodyEnd() override

EmitFunctionBodyEnd - Targets can override this to emit stuff after the last basic block in the funct...

MipsMCInstLower MCInstLowering

void printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O)

void LowerPATCHABLE_TAIL_CALL(const MachineInstr &MI)

void printFCCOperand(const MachineInstr *MI, int opNum, raw_ostream &O, const char *Modifier=nullptr)

const MipsSubtarget * Subtarget

const MipsFunctionInfo * MipsFI

void emitEndOfAsmFile(Module &M) override

This virtual method can be overridden by targets that want to emit something at the end of their file...

bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum, const char *ExtraCode, raw_ostream &O) override

Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant as...

void LowerPATCHABLE_FUNCTION_EXIT(const MachineInstr &MI)

void emitFrameDirective()

Frame Directive.

void emitStartOfAsmFile(Module &M) override

This virtual method can be overridden by targets that want to emit something at the start of their fi...

void printMemOperandEA(const MachineInstr *MI, int opNum, raw_ostream &O)

void printOperand(const MachineInstr *MI, int opNum, raw_ostream &O)

void emitFunctionEntryLabel() override

EmitFunctionEntryLabel - Emit the label that is the entrypoint for the function.

void emitInstruction(const MachineInstr *MI) override

Targets should implement this to emit instructions.

MipsFunctionInfo - This class is derived from MachineFunction private Mips target-specific informatio...

std::map< const char *, const Mips16HardFloatInfo::FuncSignature * > StubsNeeded

static const char * getRegisterName(MCRegister Reg)

void Lower(const MachineInstr *MI, MCInst &OutMI) const

MCOperand LowerOperand(const MachineOperand &MO, int64_t offset=0) const

void Initialize(MCContext *C)

bool inMicroMipsMode() const

bool useSoftFloat() const

bool inMips16Mode() const

bool isTargetNaCl() const

const MipsABIInfo & getABI() const

bool isLittleEndian() const

virtual void emitDirectiveSetAt()

virtual void emitDirectiveSetReorder()

void forbidModuleDirective()

virtual void emitDirectiveSetNoMicroMips()

virtual void emitDirectiveNaN2008()

virtual void emitDirectiveEnd(StringRef Name)

virtual void emitDirectiveSetMacro()

virtual void setUsesMicroMips()

virtual void emitDirectiveEnt(const MCSymbol &Symbol)

virtual void emitDirectiveSetNoMips16()

virtual void emitDirectiveSetPush()

virtual void setPic(bool Value)

virtual void emitFrame(unsigned StackReg, unsigned StackSize, unsigned ReturnReg)

virtual void emitDirectiveSetNoAt()

void updateABIInfo(const PredicateLibrary &P)

virtual void emitDirectiveNaNLegacy()

virtual void emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff)

virtual void emitDirectiveSetPop()

virtual void emitDirectiveSetMicroMips()

virtual void emitDirectiveSetNoMacro()

virtual void emitDirectiveModuleOddSPReg()

virtual void emitDirectiveInsn()

virtual void emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff)

virtual void emitDirectiveSetNoReorder()

virtual void emitDirectiveOptionPic0()

virtual void emitDirectiveSetMips16()

virtual void emitDirectiveAbiCalls()

virtual void emitDirectiveModuleFP()

A Module instance is used to store all the information related to an LLVM module.

FunctionListType::iterator iterator

The Function iterators.

Wrapper class representing virtual and physical registers.

Represents a location in source code.

SmallString - A SmallString is just a SmallVector with methods and accessors that make it work better...

StringRef - Represent a constant reference to a string, i.e.

std::string lower() const

Primary interface to the complete machine description for the target machine.

const Triple & getTargetTriple() const

StringRef getTargetFeatureString() const

StringRef getTargetCPU() const

const Target & getTarget() const

TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...

virtual Register getFrameRegister(const MachineFunction &MF) const =0

Debug information queries.

virtual const TargetRegisterInfo * getRegisterInfo() const

getRegisterInfo - If register information is available, return it.

Target - Wrapper for Target specific information.

MCSubtargetInfo * createMCSubtargetInfo(StringRef TheTriple, StringRef CPU, StringRef Features) const

createMCSubtargetInfo - Create a MCSubtargetInfo implementation.

Triple - Helper class for working with autoconf configuration names.

const std::string & str() const

Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...

static Twine utohexstr(const uint64_t &Val)

LLVM Value Representation.

This class implements an extremely fast bulk output stream that can only output to a stream.

A raw_ostream that writes to an SmallVector or SmallString.

#define llvm_unreachable(msg)

Marks that the current location is not supposed to be reachable.

StringRef selectMipsCPU(const Triple &TT, StringRef CPU)

Select the Mips CPU for the given triple and cpu name.

@ MO_GOT_CALL

MO_GOT_CALL - Represents the offset into the global offset table at which the address of a call site ...

@ MO_TPREL_HI

MO_TPREL_HI/LO - Represents the hi and low part of the offset from.

@ MO_GOT

MO_GOT - Represents the offset into the global offset table at which the address the relocation entry...

@ MO_JALR

Helper operand used to generate R_MIPS_JALR.

@ MO_GOTTPREL

MO_GOTTPREL - Represents the offset from the thread pointer (Initial.

@ MO_ABS_HI

MO_ABS_HI/LO - Represents the hi or low part of an absolute symbol address.

@ MO_TLSGD

MO_TLSGD - Represents the offset into the global offset table at which.

@ MO_GPREL

MO_GPREL - Represents the offset from the current gp value to be used for the relocatable object file...

@ MO_HIGHER

MO_HIGHER/HIGHEST - Represents the highest or higher half word of a 64-bit symbol address.

const char * MipsFCCToString(Mips::CondCode CC)

This is an optimization pass for GlobalISel generic memory operations.

auto drop_begin(T &&RangeOrContainer, size_t N=1)

Return a range covering RangeOrContainer with the first N elements excluded.

Target & getTheMips64Target()

constexpr bool isPowerOf2_64(uint64_t Value)

Return true if the argument is a power of two > 0 (64 bit edition.)

unsigned Log2_64(uint64_t Value)

Return the floor log base 2 of the specified value, -1 if the value is zero.

@ MCDR_DataRegionEnd

.end_data_region

@ MCDR_DataRegion

.data_region

static MCRegister getMSARegFromFReg(MCRegister Reg)

Target & getTheMips64elTarget()

static const Align MIPS_NACL_BUNDLE_ALIGN

Target & getTheMipselTarget()

Target & getTheMipsTarget()

@ MCSA_Global

.type _foo, @gnu_unique_object

@ MCSA_ELF_TypeFunction

.type _foo, STT_FUNC # aka @function

This struct is a compact representation of a valid (non-zero power of two) alignment.

RegisterAsmPrinter - Helper template for registering a target specific assembly printer,...