LLVM: llvm::MipsSubtarget Class Reference (original) (raw)

#include "[Target/Mips/MipsSubtarget.h](MipsSubtarget%5F8h%5Fsource.html)"

Public Member Functions
bool	isPositionIndependent () const

bool	enablePostRAScheduler () const override
	This overrides the PostRAScheduler bit in the SchedModel for each CPU.

void	getCriticalPathRCs (RegClassVector &CriticalPathRCs) const override

CodeGenOptLevel	getOptLevelToEnablePostRAScheduler () const override

bool	isABI_N64 () const

bool	isABI_N32 () const

bool	isABI_O32 () const

const MipsABIInfo &	getABI () const

bool	isABI_FPXX () const

	MipsSubtarget (const Triple &TT, StringRef CPU, StringRef FS, bool little, const MipsTargetMachine &TM, MaybeAlign StackAlignOverride)
	This constructor initializes the data members to match that of the specified triple.

	~MipsSubtarget () override

void	ParseSubtargetFeatures (StringRef CPU, StringRef TuneCPU, StringRef FS)
	ParseSubtargetFeatures - Parses features string setting specified subtarget options.

bool	hasMips1 () const

bool	hasMips2 () const

bool	hasMips3 () const

bool	hasMips4 () const

bool	hasMips5 () const

bool	hasMips4_32 () const

bool	hasMips4_32r2 () const

bool	hasMips32 () const

bool	hasMips32r2 () const

bool	hasMips32r3 () const

bool	hasMips32r5 () const

bool	hasMips32r6 () const

bool	hasMips64 () const

bool	hasMips64r2 () const

bool	hasMips64r3 () const

bool	hasMips64r5 () const

bool	hasMips64r6 () const

bool	hasCnMips () const

bool	hasCnMipsP () const

bool	isLittle () const

bool	isABICalls () const

bool	isFPXX () const

bool	isFP64bit () const

bool	useOddSPReg () const

bool	noOddSPReg () const

bool	isNaN2008 () const

bool	inAbs2008Mode () const

bool	isGP64bit () const

bool	isGP32bit () const

unsigned	getGPRSizeInBytes () const

bool	isPTR64bit () const

bool	isPTR32bit () const

bool	hasSym32 () const

bool	isSingleFloat () const

bool	isTargetCOFF () const

bool	isTargetELF () const

bool	hasVFPU () const

bool	inMips16Mode () const

bool	inMips16ModeDefault () const

bool	inMips16HardFloat () const

bool	inMicroMipsMode () const

bool	inMicroMips32r6Mode () const

bool	hasDSP () const

bool	hasDSPR2 () const

bool	hasDSPR3 () const

bool	has3D () const

bool	hasMSA () const

bool	disableMadd4 () const

bool	hasEVA () const

bool	hasMT () const

bool	hasCRC () const

bool	hasVirt () const

bool	hasGINV () const

bool	useIndirectJumpsHazard () const

bool	useSmallSection () const

bool	hasStandardEncoding () const

bool	useSoftFloat () const

bool	useLongCalls () const

bool	useXGOT () const

bool	enableLongBranchPass () const

bool	hasExtractInsert () const
	Features related to the presence of specific instructions.

bool	hasMTHC1 () const

bool	allowMixed16_32 () const

bool	os16 () const

bool	isTargetNaCl () const

bool	isTargetWindows () const

bool	isXRaySupported () const override

Align	getStackAlignment () const

Reloc::Model	getRelocationModel () const

MipsSubtarget &	initializeSubtargetDependencies (StringRef CPU, StringRef FS, const TargetMachine &TM)

bool	systemSupportsUnalignedAccess () const
	Does the system support unaligned memory access.

void	setHelperClassesMips16 ()

void	setHelperClassesMipsSE ()

const SelectionDAGTargetInfo *	getSelectionDAGInfo () const override

const MipsInstrInfo *	getInstrInfo () const override

const TargetFrameLowering *	getFrameLowering () const override

const MipsRegisterInfo *	getRegisterInfo () const override

const MipsTargetLowering *	getTargetLowering () const override

const InstrItineraryData *	getInstrItineraryData () const override

const CallLowering *	getCallLowering () const override

const LegalizerInfo *	getLegalizerInfo () const override

const RegisterBankInfo *	getRegBankInfo () const override

InstructionSelector *	getInstructionSelector () const override

Protected Attributes
std::unique_ptr< CallLowering >	CallLoweringInfo

std::unique_ptr< LegalizerInfo >	Legalizer

std::unique_ptr< RegisterBankInfo >	RegBankInfo

std::unique_ptr< InstructionSelector >	InstSelector

Definition at line 37 of file MipsSubtarget.h.

This constructor initializes the data members to match that of the specified triple.

Definition at line 71 of file MipsSubtarget.cpp.

References assert(), CallLoweringInfo, llvm::createMipsInstructionSelector(), llvm::errs(), getRegisterInfo(), getTargetLowering(), GPOpt, hasCRC(), hasDSP(), hasDSPR2(), hasGINV(), hasMips32(), hasMips32r2(), hasMips32r5(), hasMips32r6(), hasMips64(), hasMips64r2(), hasMips64r6(), hasMSA(), hasSym32(), hasVirt(), inAbs2008Mode(), InstSelector, isABI_N32(), isABI_N64(), isABI_O32(), isFP64bit(), isGP64bit(), isNaN2008(), Mips16HardFloat, RegBankInfo, llvm::report_fatal_error(), and useOddSPReg().

◆ ~MipsSubtarget()

MipsSubtarget::~MipsSubtarget ( )	overridedefault

◆ allowMixed16_32()

bool llvm::MipsSubtarget::allowMixed16_32 ( ) const	inline

◆ disableMadd4()

bool llvm::MipsSubtarget::disableMadd4 ( ) const	inline

◆ enableLongBranchPass()

bool llvm::MipsSubtarget::enableLongBranchPass ( ) const	inline

◆ enablePostRAScheduler()

bool MipsSubtarget::enablePostRAScheduler ( ) const	override

This overrides the PostRAScheduler bit in the SchedModel for each CPU.

This overrides the PostRAScheduler bit in the SchedModel for any CPU.

Definition at line 233 of file MipsSubtarget.cpp.

◆ getABI()

Definition at line 287 of file MipsSubtarget.cpp.

References llvm::MipsTargetMachine::getABI().

Referenced by llvm::MipsSEInstrInfo::adjustStackPtr(), llvm::MipsSEFrameLowering::determineCalleeSaves(), llvm::MipsFrameLowering::eliminateCallFramePseudoInstr(), llvm::MipsSEFrameLowering::emitEpilogue(), llvm::MipsSEFrameLowering::emitPrologue(), llvm::MipsInstrInfo::getEquivalentCompactForm(), llvm::MipsSEFrameLowering::getFrameIndexReference(), isABI_N32(), isABI_N64(), isABI_O32(), llvm::MipsSEInstrInfo::loadRegFromStack(), and llvm::MipsSEFrameLowering::spillCalleeSavedRegisters().

◆ getCallLowering()

◆ getCriticalPathRCs()

void MipsSubtarget::getCriticalPathRCs ( RegClassVector & CriticalPathRCs) const	override

◆ getFrameLowering()

◆ getGPRSizeInBytes()

unsigned llvm::MipsSubtarget::getGPRSizeInBytes ( ) const	inline

◆ getInstrInfo()

◆ getInstrItineraryData()

◆ getInstructionSelector()

◆ getLegalizerInfo()

◆ getOptLevelToEnablePostRAScheduler()

CodeGenOptLevel MipsSubtarget::getOptLevelToEnablePostRAScheduler ( ) const	override

◆ getRegBankInfo()

◆ getRegisterInfo()

◆ getRelocationModel()

◆ getSelectionDAGInfo()

◆ getStackAlignment()

Align llvm::MipsSubtarget::getStackAlignment ( ) const	inline

◆ getTargetLowering()

◆ has3D()

bool llvm::MipsSubtarget::has3D ( ) const	inline

◆ hasCnMips()

bool llvm::MipsSubtarget::hasCnMips ( ) const	inline

◆ hasCnMipsP()

bool llvm::MipsSubtarget::hasCnMipsP ( ) const	inline

◆ hasCRC()

bool llvm::MipsSubtarget::hasCRC ( ) const	inline

◆ hasDSP()

bool llvm::MipsSubtarget::hasDSP ( ) const	inline

◆ hasDSPR2()

bool llvm::MipsSubtarget::hasDSPR2 ( ) const	inline

◆ hasDSPR3()

bool llvm::MipsSubtarget::hasDSPR3 ( ) const	inline

◆ hasEVA()

bool llvm::MipsSubtarget::hasEVA ( ) const	inline

◆ hasExtractInsert()

bool llvm::MipsSubtarget::hasExtractInsert ( ) const	inline

◆ hasGINV()

bool llvm::MipsSubtarget::hasGINV ( ) const	inline

◆ hasMips1()

bool llvm::MipsSubtarget::hasMips1 ( ) const	inline

◆ hasMips2()

bool llvm::MipsSubtarget::hasMips2 ( ) const	inline

◆ hasMips3()

bool llvm::MipsSubtarget::hasMips3 ( ) const	inline

◆ hasMips32()

bool llvm::MipsSubtarget::hasMips32 ( ) const	inline

◆ hasMips32r2()

bool llvm::MipsSubtarget::hasMips32r2 ( ) const	inline

◆ hasMips32r3()

bool llvm::MipsSubtarget::hasMips32r3 ( ) const	inline

◆ hasMips32r5()

bool llvm::MipsSubtarget::hasMips32r5 ( ) const	inline

◆ hasMips32r6()

bool llvm::MipsSubtarget::hasMips32r6 ( ) const	inline

Definition at line 274 of file MipsSubtarget.h.

References hasMips64r6().

Referenced by llvm::MipsSETargetLowering::allowsMisalignedMemoryAccesses(), llvm::MipsTargetLowering::createFastISel(), llvm::MipsRegisterInfo::getCalleeSavedRegs(), llvm::MipsInstrInfo::getEquivalentCompactForm(), getLoadStoreOffsetSizeInBits(), inMicroMips32r6Mode(), llvm::MipsInstrInfo::insertNop(), llvm::MipsSETargetLowering::MipsSETargetLowering(), MipsSubtarget(), llvm::MipsTargetLowering::MipsTargetLowering(), performADDCombine(), performSUBCombine(), and systemSupportsUnalignedAccess().

◆ hasMips4()

bool llvm::MipsSubtarget::hasMips4 ( ) const	inline

◆ hasMips4_32()

bool llvm::MipsSubtarget::hasMips4_32 ( ) const	inline

◆ hasMips4_32r2()

bool llvm::MipsSubtarget::hasMips4_32r2 ( ) const	inline

◆ hasMips5()

bool llvm::MipsSubtarget::hasMips5 ( ) const	inline

◆ hasMips64()

bool llvm::MipsSubtarget::hasMips64 ( ) const	inline

◆ hasMips64r2()

bool llvm::MipsSubtarget::hasMips64r2 ( ) const	inline

◆ hasMips64r3()

bool llvm::MipsSubtarget::hasMips64r3 ( ) const	inline

◆ hasMips64r5()

bool llvm::MipsSubtarget::hasMips64r5 ( ) const	inline

◆ hasMips64r6()

bool llvm::MipsSubtarget::hasMips64r6 ( ) const	inline

◆ hasMSA()

bool llvm::MipsSubtarget::hasMSA ( ) const	inline

◆ hasMT()

bool llvm::MipsSubtarget::hasMT ( ) const	inline

◆ hasMTHC1()

bool llvm::MipsSubtarget::hasMTHC1 ( ) const	inline

◆ hasStandardEncoding()

bool llvm::MipsSubtarget::hasStandardEncoding ( ) const	inline

◆ hasSym32()

bool llvm::MipsSubtarget::hasSym32 ( ) const	inline

◆ hasVFPU()

bool llvm::MipsSubtarget::hasVFPU ( ) const	inline

◆ hasVirt()

bool llvm::MipsSubtarget::hasVirt ( ) const	inline

◆ inAbs2008Mode()

bool llvm::MipsSubtarget::inAbs2008Mode ( ) const	inline

◆ initializeSubtargetDependencies()

◆ inMicroMips32r6Mode()

bool llvm::MipsSubtarget::inMicroMips32r6Mode ( ) const	inline

◆ inMicroMipsMode()

bool llvm::MipsSubtarget::inMicroMipsMode ( ) const	inline

Definition at line 318 of file MipsSubtarget.h.

Referenced by llvm::MipsSEInstrInfo::copyPhysReg(), llvm::MipsTargetLowering::createFastISel(), emitDirectiveRelocJalr(), llvm::MipsAsmPrinter::emitFunctionEntryLabel(), enableLongBranchPass(), llvm::MipsSEInstrInfo::expandPostRAPseudo(), llvm::MipsInstrInfo::getEquivalentCompactForm(), getLoadStoreOffsetSizeInBits(), getUnconditionalBranch(), inMicroMips32r6Mode(), llvm::MipsInstrInfo::insertNop(), and llvm::MipsTargetLowering::MipsTargetLowering().

◆ inMips16HardFloat()

bool llvm::MipsSubtarget::inMips16HardFloat ( ) const	inline

◆ inMips16Mode()

bool llvm::MipsSubtarget::inMips16Mode ( ) const	inline

Definition at line 307 of file MipsSubtarget.h.

Referenced by llvm::MipsTargetLowering::AdjustInstrPostInstrSelection(), llvm::MipsRegisterInfo::canRealignStack(), llvm::MipsTargetLowering::create(), llvm::MipsInstrInfo::create(), llvm::MipsTargetLowering::createFastISel(), llvm::MipsAsmPrinter::emitConstantPool(), llvm::MipsAsmPrinter::emitFunctionBodyEnd(), llvm::MipsAsmPrinter::emitFunctionBodyStart(), llvm::MipsAsmPrinter::emitFunctionEntryLabel(), llvm::MipsAsmPrinter::emitInstruction(), llvm::MipsRegisterInfo::getFrameRegister(), llvm::MipsRegisterInfo::getReservedRegs(), hasExtractInsert(), inMips16HardFloat(), llvm::MipsInstrInfo::insertNop(), llvm::MipsTargetLowering::MipsTargetLowering(), performADDCombine(), performSUBCombine(), and llvm::MipsAsmPrinter::runOnMachineFunction().

◆ inMips16ModeDefault()

bool llvm::MipsSubtarget::inMips16ModeDefault ( ) const	inline

◆ isABI_FPXX()

bool llvm::MipsSubtarget::isABI_FPXX ( ) const	inline

◆ isABI_N32()

bool MipsSubtarget::isABI_N32	(	)	const

◆ isABI_N64()

bool MipsSubtarget::isABI_N64	(	)	const

◆ isABI_O32()

bool MipsSubtarget::isABI_O32	(	)	const

◆ isABICalls()

bool llvm::MipsSubtarget::isABICalls ( ) const	inline

◆ isFP64bit()

bool llvm::MipsSubtarget::isFP64bit ( ) const	inline

◆ isFPXX()

bool llvm::MipsSubtarget::isFPXX ( ) const	inline

◆ isGP32bit()

bool llvm::MipsSubtarget::isGP32bit ( ) const	inline

◆ isGP64bit()

bool llvm::MipsSubtarget::isGP64bit ( ) const	inline

◆ isLittle()

bool llvm::MipsSubtarget::isLittle ( ) const	inline

◆ isNaN2008()

bool llvm::MipsSubtarget::isNaN2008 ( ) const	inline

◆ isPositionIndependent()

bool MipsSubtarget::isPositionIndependent	(	)	const

◆ isPTR32bit()

bool llvm::MipsSubtarget::isPTR32bit ( ) const	inline

◆ isPTR64bit()

bool llvm::MipsSubtarget::isPTR64bit ( ) const	inline

◆ isSingleFloat()

bool llvm::MipsSubtarget::isSingleFloat ( ) const	inline

◆ isTargetCOFF()

bool llvm::MipsSubtarget::isTargetCOFF ( ) const	inline

◆ isTargetELF()

bool llvm::MipsSubtarget::isTargetELF ( ) const	inline

◆ isTargetNaCl()

bool llvm::MipsSubtarget::isTargetNaCl ( ) const	inline

◆ isTargetWindows()

bool llvm::MipsSubtarget::isTargetWindows ( ) const	inline

◆ isXRaySupported()

bool llvm::MipsSubtarget::isXRaySupported ( ) const	inlineoverride

◆ noOddSPReg()

bool llvm::MipsSubtarget::noOddSPReg ( ) const	inline

◆ os16()

bool llvm::MipsSubtarget::os16 ( ) const	inline

◆ ParseSubtargetFeatures()

ParseSubtargetFeatures - Parses features string setting specified subtarget options.

Definition of function is auto generated by tblgen.

Referenced by initializeSubtargetDependencies().

◆ setHelperClassesMips16()

void llvm::MipsSubtarget::setHelperClassesMips16	(	)

◆ setHelperClassesMipsSE()

void llvm::MipsSubtarget::setHelperClassesMipsSE	(	)

◆ systemSupportsUnalignedAccess()

bool llvm::MipsSubtarget::systemSupportsUnalignedAccess ( ) const	inline

◆ useConstantIslands()

bool MipsSubtarget::useConstantIslands ( )	static

◆ useIndirectJumpsHazard()

bool llvm::MipsSubtarget::useIndirectJumpsHazard ( ) const	inline

◆ useLongCalls()

bool llvm::MipsSubtarget::useLongCalls ( ) const	inline

◆ useOddSPReg()

bool llvm::MipsSubtarget::useOddSPReg ( ) const	inline

◆ useSmallSection()

bool llvm::MipsSubtarget::useSmallSection ( ) const	inline

◆ useSoftFloat()

bool llvm::MipsSubtarget::useSoftFloat ( ) const	inline

◆ useXGOT()

bool llvm::MipsSubtarget::useXGOT ( ) const	inline

◆ CallLoweringInfo

std::unique_ptr<CallLowering> llvm::MipsSubtarget::CallLoweringInfo	protected