LLVM: lib/Target/RISCV/RISCVInsertReadWriteCSR.cpp File Reference (original) (raw)
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| Macros | |
|---|---|
| #define | DEBUG_TYPE "riscv-insert-read-write-csr" |
| #define | RISCV_INSERT_READ_WRITE_CSR_NAME "RISC-V Insert Read/Write CSR Pass" |
| Variables | |
|---|---|
| static cl::opt< bool > | DisableFRMInsertOpt ("riscv-disable-frm-insert-opt", cl::init(false), cl::Hidden, cl::desc("Disable optimized frm insertion.")) |
◆ DEBUG_TYPE
#define DEBUG_TYPE "riscv-insert-read-write-csr"
◆ RISCV_INSERT_READ_WRITE_CSR_NAME
#define RISCV_INSERT_READ_WRITE_CSR_NAME "RISC-V Insert Read/Write CSR Pass"
◆ INITIALIZE_PASS()
| INITIALIZE_PASS | ( | RISCVInsertReadWriteCSR | , |
|---|---|---|---|
| DEBUG_TYPE | , | ||
| RISCV_INSERT_READ_WRITE_CSR_NAME | , | ||
| false | , | ||
| false | ) |
Definition at line 61 of file RISCVInsertReadWriteCSR.cpp.
References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), Changed, llvm::MachineOperand::CreateReg(), DEBUG_TYPE, llvm::RISCVFPRndMode::DYN, llvm::RISCVII::getFRMOpNum(), llvm::Register::isValid(), MBB, MI, MRI, Register, RISCV_INSERT_READ_WRITE_CSR_NAME, and TII.
◆ DisableFRMInsertOpt
| cl::opt< bool > DisableFRMInsertOpt("riscv-disable-frm-insert-opt", cl::init(false), cl::Hidden, cl::desc("Disable optimized frm insertion.")) ( "riscv-disable-frm-insert-opt" , cl::init(false) , cl::Hidden , cl::desc("Disable optimized frm insertion.") ) | static |
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