X86AsmBackend.cpp File Reference (original) (raw)

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Functions
static bool	isRelaxableBranch (unsigned Opcode)

static unsigned	getRelaxedOpcodeBranch (unsigned Opcode, bool Is16BitMode=false)

static unsigned	getRelaxedOpcode (const MCInst &MI, bool Is16BitMode)

static X86::CondCode	getCondFromBranch (const MCInst &MI, const MCInstrInfo &MCII)

static X86::SecondMacroFusionInstKind	classifySecondInstInMacroFusion (const MCInst &MI, const MCInstrInfo &MCII)

static bool	isRIPRelative (const MCInst &MI, const MCInstrInfo &MCII)
	Check if the instruction uses RIP relative addressing.

static bool	isPrefix (unsigned Opcode, const MCInstrInfo &MCII)
	Check if the instruction is a prefix.

static bool	isFirstMacroFusibleInst (const MCInst &Inst, const MCInstrInfo &MCII)
	Check if the instruction is valid as the first instruction in macro fusion.

static bool	hasVariantSymbol (const MCInst &MI)
	Check if the instruction has a variant symbol operand.

static bool	mayHaveInterruptDelaySlot (unsigned InstOpcode)
	X86 has certain instructions which enable interrupts exactly one instruction after the instruction which stores to SS.

static bool	isRightAfterData (MCFragment CurrentFragment, const std::pair< MCFragment , size_t > &PrevInstPosition)
	Check if the instruction to be emitted is right after any data.

static size_t	getSizeForInstFragment (const MCFragment *F)

static unsigned	getFixupKindSize (unsigned Kind)

◆ ELF_RELOC [1/2]

| #define ELF_RELOC | ( | | X, | | -------------------------------------------------------------------- | --------------------------------------------------------------------------------------------------------------------------------------------- | | ------------------------------------------------------------------- | | | Y | | | | | ) | .Case(#X, Y) | | |

◆ ELF_RELOC [2/2]

◆ classifySecondInstInMacroFusion()

◆ getCondFromBranch()

◆ getFixupKindSize()

Definition at line 667 of file X86AsmBackend.cpp.

References llvm::FK_Data_1, llvm::FK_Data_2, llvm::FK_Data_4, llvm::FK_Data_8, llvm::FK_NONE, llvm::FK_PCRel_1, llvm::FK_PCRel_2, llvm::FK_PCRel_4, llvm::FK_PCRel_8, llvm::FK_SecRel_1, llvm::FK_SecRel_2, llvm::FK_SecRel_4, llvm::FK_SecRel_8, llvm_unreachable, llvm::X86::reloc_branch_4byte_pcrel, llvm::X86::reloc_global_offset_table, llvm::X86::reloc_global_offset_table8, llvm::X86::reloc_riprel_4byte, llvm::X86::reloc_riprel_4byte_movq_load, llvm::X86::reloc_riprel_4byte_movq_load_rex2, llvm::X86::reloc_riprel_4byte_relax, llvm::X86::reloc_riprel_4byte_relax_evex, llvm::X86::reloc_riprel_4byte_relax_rex, llvm::X86::reloc_riprel_4byte_relax_rex2, llvm::X86::reloc_signed_4byte, and llvm::X86::reloc_signed_4byte_relax.

◆ getRelaxedOpcode()

◆ getRelaxedOpcodeBranch()

◆ getSizeForInstFragment()

◆ hasVariantSymbol()

◆ isFirstMacroFusibleInst()

◆ isPrefix()

◆ isRelaxableBranch()

◆ isRightAfterData()

Check if the instruction to be emitted is right after any data.

Definition at line 404 of file X86AsmBackend.cpp.

References DF, and F.

◆ isRIPRelative()

◆ mayHaveInterruptDelaySlot()

static bool mayHaveInterruptDelaySlot ( unsigned InstOpcode)	static

X86 has certain instructions which enable interrupts exactly one instruction after the instruction which stores to SS.

Return true if the given instruction may have such an interrupt delay slot.

Definition at line 384 of file X86AsmBackend.cpp.