The llvm-dev November 2017 Archive by date (original) (raw)

November 2017 Archives by date

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Starting: Wed Nov 1 00:30:26 PDT 2017
Ending: Thu Nov 30 23:54:00 PST 2017
Messages: 709

• [llvm-dev] shadow-stack and llvm_gc_root_chain linkage when using JIT Nikodemus Siivola via llvm-dev
• [llvm-dev] Using C++14 code in LLVM Dimitry Andric via llvm-dev
• [llvm-dev] llvm.gcroot trouble with non-i8* allocas Nikodemus Siivola via llvm-dev
• [llvm-dev] Cross compiling for Baremetal ARM without using GCC Jonathan Roelofs via llvm-dev
• [llvm-dev] Cross compiling for Baremetal ARM without using GCC Peter Smith via llvm-dev
• [llvm-dev] Using C++14 code in LLVM Mark Kettenis via llvm-dev
• [llvm-dev] Status of llvm.invariant.{start|end} Anna Thomas via llvm-dev
• [llvm-dev] [RFC] ASan: patches to support 32-byte shadow granularity Walter Lee via llvm-dev
• [llvm-dev] Using C++14 code in LLVM Zachary Turner via llvm-dev
• [llvm-dev] [lld] Flavour option purpose N via llvm-dev
• [llvm-dev] elf2yaml document structure, for dynamic symbols Dave Lee via llvm-dev
• [llvm-dev] elf2yaml document structure, for dynamic symbols Rui Ueyama via llvm-dev
• [llvm-dev] elf2yaml document structure, for dynamic symbols Dave Lee via llvm-dev
• [llvm-dev] [lld] Flavour option purpose Jonathan Roelofs via llvm-dev
• [llvm-dev] [lld] Flavour option purpose N via llvm-dev
• [llvm-dev] Help building compiler-rt for a new cross target? John C. Ruttenberg via llvm-dev
• [llvm-dev] [lld] Flavour option purpose Rui Ueyama via llvm-dev
• [llvm-dev] elf2yaml document structure, for dynamic symbols Rui Ueyama via llvm-dev
• [llvm-dev] Cross compiling for Baremetal ARM without using GCC Daniel Kang via llvm-dev
• [llvm-dev] Reaching definitions on Machine IR post register allocation Krzysztof Parzyszek via llvm-dev
• [llvm-dev] elf2yaml document structure, for dynamic symbols Dave Lee via llvm-dev
• [llvm-dev] [VIDEO] Yegor Derevenets - On Decompilation (LLVM Social Berlin #9, 27.07.2017) Stanislav Pankevich via llvm-dev
• [llvm-dev] llvm.gcroot trouble with non-i8* allocas Nikodemus Siivola via llvm-dev
• [llvm-dev] elf2yaml document structure, for dynamic symbols Rui Ueyama via llvm-dev
• [llvm-dev] Publication - Devirtualization in LLVM Hans Wennborg via llvm-dev
• [llvm-dev] Publication - Devirtualization in LLVM Piotr Padlewski via llvm-dev
• [llvm-dev] [lld] Flavour option purpose Michael Spencer via llvm-dev
• [llvm-dev] RFC: [X86] Introducing command line options to prefer narrower vector instructions even when wider instructions are available Craig Topper via llvm-dev
• [llvm-dev] RFC: [X86] Introducing command line options to prefer narrower vector instructions even when wider instructions are available Hal Finkel via llvm-dev
• [llvm-dev] Preserving Knowledge about Jump Tables Malhar Thakkar via llvm-dev
• [llvm-dev] An ambiguity in TBAA info format Hal Finkel via llvm-dev
• [llvm-dev] RFC: Generate plain !tbaa tags in place of !tbaa.struct ones Hal Finkel via llvm-dev
• [llvm-dev] Synopsys Hiring LLVM ARC Code Generation & Optimization Expert for backend compiler Shirley Wallace via llvm-dev
• [llvm-dev] Publication Request: The Design of a Custom 32-bit RISC CPU and LLVM Compiler Backend Connor Goldberg (RIT Student) via llvm-dev
• [llvm-dev] Why am I getting FrameIndex:i64<0> when I have no i64's? Robert Baruch via llvm-dev
• [llvm-dev] Help building compiler-rt for a new cross target? Peter Smith via llvm-dev
• [llvm-dev] Why am I getting FrameIndex:i64<0> when I have no i64's? Krzysztof Parzyszek via llvm-dev
• [llvm-dev] RFC: [X86] Introducing command line options to prefer narrower vector instructions even when wider instructions are available Tobias Grosser via llvm-dev
• [llvm-dev] Possible bugs in class ARMConstantIslands 章明 via llvm-dev
• [llvm-dev] 5.0.1-rc1 has been tagged Tom Stellard via llvm-dev
• [llvm-dev] An ambiguity in TBAA info format Ivan Kosarev via llvm-dev
• [llvm-dev] RFC: Generate plain !tbaa tags in place of !tbaa.struct ones Ivan Kosarev via llvm-dev
• [llvm-dev] Possible bugs in class ARMConstantIslands Sameer AbuAsal via llvm-dev
• [llvm-dev] [cfe-dev] 5.0.1-rc1 has been tagged Hans Wennborg via llvm-dev
• [llvm-dev] RFC: Splitting DAGISel.inc into declarations and definitions Krzysztof Parzyszek via llvm-dev
• [llvm-dev] [RFC] Enable Partial Inliner by default Graham Yiu via llvm-dev
• [llvm-dev] [RFC] Enable Partial Inliner by default Graham Yiu via llvm-dev
• [llvm-dev] [RFC] Enable Partial Inliner by default Evgeny Astigeevich via llvm-dev
• [llvm-dev] RFC: [X86] Introducing command line options to prefer narrower vector instructions even when wider instructions are available Craig Topper via llvm-dev
• [llvm-dev] [RFC] Enable Partial Inliner by default Graham Yiu via llvm-dev
• [llvm-dev] [RFC] Enable Partial Inliner by default Tobias Grosser via llvm-dev
• [llvm-dev] RFC: [X86] Introducing command line options to prefer narrower vector instructions even when wider instructions are available James Y Knight via llvm-dev
• [llvm-dev] llvm-dev Digest, Vol 161, Issue 7 章明 via llvm-dev
• [llvm-dev] RFC: [X86] Introducing command line options to prefer narrower vector instructions even when wider instructions are available Eric Christopher via llvm-dev
• [llvm-dev] Possible bugs in class ARMConstantIslands 章明 via llvm-dev
• [llvm-dev] ScaffCC (A Framework for Compilation and Analysis of Quantum Computing Programs) migrated to LLVM 6.0 Leslie Zhai via llvm-dev
• [llvm-dev] RFC: [X86] Introducing command line options to prefer narrower vector instructions even when wider instructions are available Craig Topper via llvm-dev
• [llvm-dev] ScaffCC (A Framework for Compilation and Analysis of Quantum Computing Programs) migrated to LLVM 6.0 Leslie Zhai via llvm-dev
• [llvm-dev] Why am I getting FrameIndex:i64<0> when I have no i64's? Robert Baruch via llvm-dev
• [llvm-dev] RFC: Splitting DAGISel.inc into declarations and definitions Craig Topper via llvm-dev
• [llvm-dev] slides from the LLVM October Meeting? Dennis Luehring via llvm-dev
• [llvm-dev] ARMConstantIslands: Can a basic block that ends with a conditional branch fall through to the next basic block? 章明 via llvm-dev
• [llvm-dev] [RFC] Enable Partial Inliner by default Florian Hahn via llvm-dev
• [llvm-dev] slides from the LLVM October Meeting? Florian Hahn via llvm-dev
• [llvm-dev] Publication Request: The Design of a Custom 32-bit RISC CPU and LLVM Compiler Backend Florian Hahn via llvm-dev
• [llvm-dev] [Release-testers] [cfe-dev] 5.0.1-rc1 has been tagged Diana Picus via llvm-dev
• [llvm-dev] Publication Request: The Design of a Custom 32-bit RISC CPU and LLVM Compiler Backend Florian Hahn via llvm-dev
• [llvm-dev] microbenchmark shows 3-6x perf loss w/ LLVM vs GCC at -O3, >1.5x w/ -flto Micah Villmow via llvm-dev
• [llvm-dev] RFC: [X86] Introducing command line options to prefer narrower vector instructions even when wider instructions are available Sanjay Patel via llvm-dev
• [llvm-dev] RFC: Splitting DAGISel.inc into declarations and definitions Krzysztof Parzyszek via llvm-dev
• [llvm-dev] [RFC] Enable Partial Inliner by default Evgeny Astigeevich via llvm-dev
• [llvm-dev] [RFC] Enable Partial Inliner by default Adrian Prantl via llvm-dev
• [llvm-dev] [RFC] Enable Partial Inliner by default Graham Yiu via llvm-dev
• [llvm-dev] [RFC] Enable Partial Inliner by default Graham Yiu via llvm-dev
• [llvm-dev] [RFC] Enable Partial Inliner by default River Riddle via llvm-dev
• [llvm-dev] [RFC] Enable Partial Inliner by default Xinliang David Li via llvm-dev
• [llvm-dev] [RFC] Enable Partial Inliner by default Graham Yiu via llvm-dev
• [llvm-dev] FW: clarification needed for the constrained fp implementation. Kaylor, Andrew via llvm-dev
• [llvm-dev] byval vs. explicitly coded copy Rodney M. Bates via llvm-dev
• [llvm-dev] PSA: debuginfo-tests workflow changing slightly Zachary Turner via llvm-dev
• [llvm-dev] FW: clarification needed for the constrained fp implementation. 陳韋任 via llvm-dev
• [llvm-dev] LLVM buildmaster will be updated and restarted tonight Galina Kistanova via llvm-dev
• [llvm-dev] byval vs. explicitly coded copy Friedman, Eli via llvm-dev
• [llvm-dev] returns_twice / noreturn Alexandre Isoard via llvm-dev
• [llvm-dev] returns_twice / noreturn Hal Finkel via llvm-dev
• [llvm-dev] FW: clarification needed for the constrained fp implementation. Hal Finkel via llvm-dev
• [llvm-dev] returns_twice / noreturn Alexandre Isoard via llvm-dev
• [llvm-dev] returns_twice / noreturn Yichao Yu via llvm-dev
• [llvm-dev] PSA: debuginfo-tests workflow changing slightly Vedant Kumar via llvm-dev
• [llvm-dev] returns_twice / noreturn Hal Finkel via llvm-dev
• [llvm-dev] PSA: debuginfo-tests workflow changing slightly Zachary Turner via llvm-dev
• [llvm-dev] PSA: debuginfo-tests workflow changing slightly Vedant Kumar via llvm-dev
• [llvm-dev] PSA: debuginfo-tests workflow changing slightly Chris Matthews via llvm-dev
• [llvm-dev] PSA: debuginfo-tests workflow changing slightly Zachary Turner via llvm-dev
• [llvm-dev] PSA: debuginfo-tests workflow changing slightly Adrian Prantl via llvm-dev
• [llvm-dev] [Sanitizer] Sanitizer does not identify violation Mahesh Attarde via llvm-dev
• [llvm-dev] [Sanitizer] Sanitizer does not identify violation Brian Cain via llvm-dev
• [llvm-dev] RFC: We need to explicitly state that some functions are reserved by LLVM Alex Bradbury via llvm-dev
• [llvm-dev] RFC: We need to explicitly state that some functions are reserved by LLVM Alex Bradbury via llvm-dev
• [llvm-dev] PSA: debuginfo-tests workflow changing slightly David Blaikie via llvm-dev
• [llvm-dev] PSA: debuginfo-tests workflow changing slightly Zachary Turner via llvm-dev
• [llvm-dev] RFC: We need to explicitly state that some functions are reserved by LLVM Chris Lattner via llvm-dev
• [llvm-dev] What pattern string corresponds to CopyToReg? Robert Baruch via llvm-dev
• [llvm-dev] What pattern string corresponds to CopyToReg? Craig Topper via llvm-dev
• [llvm-dev] What pattern string corresponds to CopyToReg? Robert Baruch via llvm-dev
• [llvm-dev] What pattern string corresponds to CopyToReg? Craig Topper via llvm-dev
• [llvm-dev] What pattern string corresponds to CopyToReg? Robert Baruch via llvm-dev
• [llvm-dev] What pattern string corresponds to CopyToReg? 陳韋任 via llvm-dev
• [llvm-dev] Two-stage build w/ ninja - Tests still use stage1 compiler / linker ? Dirk Schroetter via llvm-dev
• [llvm-dev] [Release-testers] 5.0.1-rc1 has been tagged Dimitry Andric via llvm-dev
• [llvm-dev] [Release-testers] 5.0.1-rc1 has been tagged Sylvestre Ledru via llvm-dev
• [llvm-dev] calling va_arg functions on win32 seems to require explicit stack alignment? Nikodemus Siivola via llvm-dev
• [llvm-dev] returns_twice / noreturn Sanjoy Das via llvm-dev
• [llvm-dev] What pattern string corresponds to CopyToReg? Robert Baruch via llvm-dev
• [llvm-dev] returns_twice / noreturn Yichao Yu via llvm-dev
• [llvm-dev] What pattern string corresponds to CopyToReg? Craig Topper via llvm-dev
• [llvm-dev] Two-stage build w/ ninja - Tests still use stage1 compiler / linker ? Nemanja Ivanovic via llvm-dev
• [llvm-dev] Two-stage build w/ ninja - Tests still use stage1 compiler / linker ? Dirk Schroetter via llvm-dev
• [llvm-dev] Two-stage build w/ ninja - Tests still use stage1 compiler / linker ? 陳韋任 via llvm-dev
• [llvm-dev] Conditional includes in TableGen? David Chisnall via llvm-dev
• [llvm-dev] Target Specific LTO Machine Pass Ben Simhon, Oren via llvm-dev
• [llvm-dev] Conditional includes in TableGen? 陳韋任 via llvm-dev
• [llvm-dev] Target Specific LTO Machine Pass Teresa Johnson via llvm-dev
• [llvm-dev] returns_twice / noreturn Serge Guelton via llvm-dev
• [llvm-dev] Conditional includes in TableGen? Krzysztof Parzyszek via llvm-dev
• [llvm-dev] Can we start using std::to_string? Pavel Labath via llvm-dev
• [llvm-dev] calling va_arg functions on win32 seems to require explicit stack alignment? Reid Kleckner via llvm-dev
• [llvm-dev] Target Specific LTO Machine Pass Ben Simhon, Oren via llvm-dev
• [llvm-dev] calling va_arg functions on win32 seems to require explicit stack alignment? Nikodemus Siivola via llvm-dev
• [llvm-dev] lld: sigbus error handling Ed Maste via llvm-dev
• [llvm-dev] returns_twice / noreturn Friedman, Eli via llvm-dev
• [llvm-dev] PowerPC64 Diassembler Ana Julia Pereira Caetano via llvm-dev
• [llvm-dev] RFC: Debug info for Cuda Alexey Bataev via llvm-dev
• [llvm-dev] PSA: debuginfo-tests workflow changing slightly Robinson, Paul via llvm-dev
• [llvm-dev] PSA: debuginfo-tests workflow changing slightly Zachary Turner via llvm-dev
• [llvm-dev] PSA: debuginfo-tests workflow changing slightly Chris Matthews via llvm-dev
• [llvm-dev] returns_twice / noreturn Johannes Doerfert via llvm-dev
• [llvm-dev] FW: clarification needed for the constrained fp implementation. Kaylor, Andrew via llvm-dev
• [llvm-dev] Debug info for Cuda Robinson, Paul via llvm-dev
• [llvm-dev] Debug info for Cuda Alexey Bataev via llvm-dev
• [llvm-dev] ORC JIT and multithreading Christian Schafmeister via llvm-dev
• [llvm-dev] LLVM Weekly - #201, Nov 6th 2017 Alex Bradbury via llvm-dev
• [llvm-dev] PSA: debuginfo-tests workflow changing slightly Mike Edwards via llvm-dev
• [llvm-dev] PSA: debuginfo-tests workflow changing slightly Zachary Turner via llvm-dev
• [llvm-dev] PSA: debuginfo-tests workflow changing slightly Mike Edwards via llvm-dev
• [llvm-dev] [RFC] Setting the current debug loc when the insertion point changes Vedant Kumar via llvm-dev
• [llvm-dev] [RFC] Setting the current debug loc when the insertion point changes Adrian Prantl via llvm-dev
• [llvm-dev] [RFC] Setting the current debug loc when the insertion point changes Davide Italiano via llvm-dev
• [llvm-dev] [RFC] Setting the current debug loc when the insertion point changes Vedant Kumar via llvm-dev
• [llvm-dev] [RFC] Setting the current debug loc when the insertion point changes Adrian Prantl via llvm-dev
• [llvm-dev] RFC: Debug info for Cuda Justin Lebar via llvm-dev
• [llvm-dev] [RFC] Setting the current debug loc when the insertion point changes Vedant Kumar via llvm-dev
• [llvm-dev] Does the ORC JIT on Linux eliminate frame pointers - if so - how does one disable this? Christian Schafmeister via llvm-dev
• [llvm-dev] RFC: [X86] Introducing command line options to prefer narrower vector instructions even when wider instructions are available Tobias Grosser via llvm-dev
• [llvm-dev] LLVM Compiler Social Zurich - November 9, 2017 - RISC-V @ETH Tech talk Tobias Grosser via llvm-dev
• [llvm-dev] Set InstrItinData for RegPair 陳韋任 via llvm-dev
• [llvm-dev] Mapping between instruction ins/outs to instruction bits-field Yaniv via llvm-dev
• [llvm-dev] FW: clarification needed for the constrained fp implementation. 陳韋任 via llvm-dev
• [llvm-dev] RFC: Debug info for Cuda Hal Finkel via llvm-dev
• [llvm-dev] RFC: Debug info for Cuda Alexey Bataev via llvm-dev
• [llvm-dev] [RFC] Enable Partial Inliner by default Graham Yiu via llvm-dev
• [llvm-dev] [RFC] Enable Partial Inliner by default Evgeny Astigeevich via llvm-dev
• [llvm-dev] Questions about code-size optimizations in ARM backend Gabor Ballabas via llvm-dev
• [llvm-dev] RFC: [X86] Introducing command line options to prefer narrower vector instructions even when wider instructions are available Sanjay Patel via llvm-dev
• [llvm-dev] FW: clarification needed for the constrained fp implementation. Kaylor, Andrew via llvm-dev
• [llvm-dev] Questions about code-size optimizations in ARM backend Momchil Velikov via llvm-dev
• [llvm-dev] Questions about code-size optimizations in ARM backend Friedman, Eli via llvm-dev
• [llvm-dev] PSA: debuginfo-tests workflow changing slightly Zachary Turner via llvm-dev
• [llvm-dev] Problem with 'sed' on one Windows bot? Robinson, Paul via llvm-dev
• [llvm-dev] Problem with 'sed' on one Windows bot? Justin Bogner via llvm-dev
• [llvm-dev] Problem with 'sed' on one Windows bot? Davide Italiano via llvm-dev
• [llvm-dev] Problem with 'sed' on one Windows bot? Davide Italiano via llvm-dev
• [llvm-dev] Problem with 'sed' on one Windows bot? Robinson, Paul via llvm-dev
• [llvm-dev] [GlobalISel][AArch64] Toward flipping the switch for O0: Please give it a try! Quentin Colombet via llvm-dev
• [llvm-dev] [RFC] ASan: patches to support 32-byte shadow granularity Walter Lee via llvm-dev
• [llvm-dev] A lot of -Wcast-qual warning when bootstrapping clang+compiler-rt on Mac. Dmitry Babokin via llvm-dev
• [llvm-dev] [RFC] lld: Dropping TLS relaxations in favor of TLSDESC Rui Ueyama via llvm-dev
• [llvm-dev] [RFC] lld: Dropping TLS relaxations in favor of TLSDESC Rafael Avila de Espindola via llvm-dev
• [llvm-dev] [RFC] lld: Dropping TLS relaxations in favor of TLSDESC Rui Ueyama via llvm-dev
• [llvm-dev] [RFC] lld: Dropping TLS relaxations in favor of TLSDESC Rafael Avila de Espindola via llvm-dev
• [llvm-dev] [RFC] lld: Dropping TLS relaxations in favor of TLSDESC Rui Ueyama via llvm-dev
• [llvm-dev] Can we start using std::to_string? Diana Picus via llvm-dev
• [llvm-dev] [PATCH for-next 7/9] coverage: introduce support for llvm profiling Jan Beulich via llvm-dev
• [llvm-dev] [PATCH for-next 7/9] coverage: introduce support for llvm profiling Roger Pau Monné via llvm-dev
• [llvm-dev] [RFC] lld: Dropping TLS relaxations in favor of TLSDESC Mark Kettenis via llvm-dev
• [llvm-dev] Debug info for Cuda Madhur Amilkanthwar via llvm-dev
• [llvm-dev] [PATCH for-next 7/9] coverage: introduce support for llvm profiling Jan Beulich via llvm-dev
• [llvm-dev] Debug info for Cuda Alexey Bataev via llvm-dev
• [llvm-dev] Debug info for Cuda Madhur Amilkanthwar via llvm-dev
• [llvm-dev] [RFC] lld: Dropping TLS relaxations in favor of TLSDESC Joerg Sonnenberger via llvm-dev
• [llvm-dev] Questions about code-size optimizations in ARM backend Gabor Ballabas via llvm-dev
• [llvm-dev] [RFC] lld: Dropping TLS relaxations in favor of TLSDESC Peter Smith via llvm-dev
• [llvm-dev] Debug info for Cuda Alexey Bataev via llvm-dev
• [llvm-dev] Questions about code-size optimizations in ARM backend Tim Northover via llvm-dev
• [llvm-dev] [RFC] lld: Dropping TLS relaxations in favor of TLSDESC James Henderson via llvm-dev
• [llvm-dev] Is it ok to allocate > half of address space? Nuno Lopes via llvm-dev
• [llvm-dev] [RFC] Setting the current debug loc when the insertion point changes Tobias Edler von Koch via llvm-dev
• [llvm-dev] [RFC] lld: Dropping TLS relaxations in favor of TLSDESC Rafael Avila de Espindola via llvm-dev
• [llvm-dev] [RFC] lld: Dropping TLS relaxations in favor of TLSDESC Rafael Avila de Espindola via llvm-dev
• [llvm-dev] Is it ok to allocate > half of address space? Björn Pettersson A via llvm-dev
• [llvm-dev] Is it ok to allocate > half of address space? Nuno Lopes via llvm-dev
• [llvm-dev] Is it ok to allocate > half of address space? Björn Pettersson A via llvm-dev
• [llvm-dev] Is it ok to allocate > half of address space? David Majnemer via llvm-dev
• [llvm-dev] [RFC] lld: Dropping TLS relaxations in favor of TLSDESC Rui Ueyama via llvm-dev
• [llvm-dev] Is it ok to allocate > half of address space? Alexander Cherepanov via llvm-dev
• [llvm-dev] [GreenDragon] Restart of Green Dragon at 12:05PST Today Mike Edwards via llvm-dev
• [llvm-dev] [RFC] lld: Dropping TLS relaxations in favor of TLSDESC Rui Ueyama via llvm-dev
• [llvm-dev] [RFC] ASan: patches to support 32-byte shadow granularity Evgenii Stepanov via llvm-dev
• [llvm-dev] Is it ok to allocate > half of address space? Friedman, Eli via llvm-dev
• [llvm-dev] [RFC] Enable Partial Inliner by default Evgeny Astigeevich via llvm-dev
• [llvm-dev] Phabricator "buildable" indication Robinson, Paul via llvm-dev
• [llvm-dev] getting nowhere with thinLTO Davis, Alan via llvm-dev
• [llvm-dev] [RFC] Enable Partial Inliner by default Graham Yiu via llvm-dev
• [llvm-dev] Is it ok to allocate > half of address space? Nuno Lopes via llvm-dev
• [llvm-dev] lld: sigbus error handling Rui Ueyama via llvm-dev
• [llvm-dev] OrcJIT + CUDA Prototype for Cling Lang Hames via llvm-dev
• [llvm-dev] [GlobalISel] [X86] unable to legalize instruction S. Bharadwaj Yadavalli via llvm-dev
• [llvm-dev] New LLVM License Anupama Chandrasekhar via llvm-dev
• [llvm-dev] [Release-testers] 5.0.1-rc1 has been tagged Brian Cain via llvm-dev
• [llvm-dev] Mapping between instruction ins/outs to instruction bits-field Yaniv via llvm-dev
• [llvm-dev] [GlobalISel] [X86] unable to legalize instruction Breger, Igor via llvm-dev
• [llvm-dev] [RFC] Making .eh_frame more linker-friendly Igor Kudrin via llvm-dev
• [llvm-dev] Get basic-block cycle cost from LLVM Rick Veens via llvm-dev
• [llvm-dev] [RFC] lld: Dropping TLS relaxations in favor of TLSDESC Joerg Sonnenberger via llvm-dev
• [llvm-dev] Phabricator "buildable" indication Nemanja Ivanovic via llvm-dev
• [llvm-dev] Is it ok to allocate > half of address space? John Regehr via llvm-dev
• [llvm-dev] getting nowhere with thinLTO Teresa Johnson via llvm-dev
• [llvm-dev] Is it ok to allocate > half of address space? John Regehr via llvm-dev
• [llvm-dev] svn checkout error on Windows Zhen Cao via llvm-dev
• [llvm-dev] Problem with 'sed' on one Windows bot? Galina Kistanova via llvm-dev
• [llvm-dev] Problem with 'sed' on one Windows bot? Robinson, Paul via llvm-dev
• [llvm-dev] [RFC] lld: Dropping TLS relaxations in favor of TLSDESC UE US via llvm-dev
• [llvm-dev] [RFC] Setting the current debug loc when the insertion point changes Vedant Kumar via llvm-dev
• [llvm-dev] Problem with 'sed' on one Windows bot? Galina Kistanova via llvm-dev
• [llvm-dev] Problem with 'sed' on one Windows bot? Robinson, Paul via llvm-dev
• [llvm-dev] Phabricator "buildable" indication Lang Hames via llvm-dev
• [llvm-dev] Phabricator "buildable" indication Brian Cain via llvm-dev
• [llvm-dev] New LLVM License Anupama Chandrasekhar via llvm-dev
• [llvm-dev] svn checkout error on Windows Zhen Cao via llvm-dev
• [llvm-dev] Experiment on how to improve our temporary file handing. Rafael Avila de Espindola via llvm-dev
• [llvm-dev] Experiment on how to improve our temporary file handing. Reid Kleckner via llvm-dev
• [llvm-dev] PSA: debuginfo-tests workflow changing slightly Zachary Turner via llvm-dev
• [llvm-dev] Experiment on how to improve our temporary file handing. Rafael Avila de Espindola via llvm-dev
• [llvm-dev] PSA: debuginfo-tests workflow changing slightly Mike Edwards via llvm-dev
• [llvm-dev] RFC: [X86] Introducing command line options to prefer narrower vector instructions even when wider instructions are available Craig Topper via llvm-dev
• [llvm-dev] CFG normalization: avoiding `br i1 false` Ariel Ben-Yehuda via llvm-dev
• [llvm-dev] CFG normalization: avoiding `br i1 false` Davide Italiano via llvm-dev
• [llvm-dev] PSA: debuginfo-tests workflow changing slightly Zachary Turner via llvm-dev
• [llvm-dev] [RFC] Making .eh_frame more linker-friendly Evgeny Astigeevich via llvm-dev
• [llvm-dev] [RFC] Making .eh_frame more linker-friendly Igor Kudrin via llvm-dev
• [llvm-dev] Update control flow graph when splitting a machine basic block? 章明 via llvm-dev
• [llvm-dev] Less aggressive on the first allocation of CSR if detecting an early exit Nemanja Ivanovic via llvm-dev
• [llvm-dev] Reaching definitions on Machine IR post register allocation Raghavan, Venugopal via llvm-dev
• [llvm-dev] [RFC] Making .eh_frame more linker-friendly Evgeny Astigeevich via llvm-dev
• [llvm-dev] Get basic-block cycle cost from LLVM 陳韋任 via llvm-dev
• [llvm-dev] [RFC] Making .eh_frame more linker-friendly Igor Kudrin via llvm-dev
• [llvm-dev] RFC: [X86] Introducing command line options to prefer narrower vector instructions even when wider instructions are available Sanjay Patel via llvm-dev
• [llvm-dev] Compiling LLC into one huge binary Rick Veens via llvm-dev
• [llvm-dev] [RFC] Enable Partial Inliner by default Graham Yiu via llvm-dev
• [llvm-dev] Experiment on how to improve our temporary file handing. Mark Kettenis via llvm-dev
• [llvm-dev] Experiment on how to improve our temporary file handing. Nikodemus Siivola via llvm-dev
• [llvm-dev] getting nowhere with thinLTO Davis, Alan via llvm-dev
• [llvm-dev] RFC: [GlobalISel] Towards a generic MI combiner framework Amara Emerson via llvm-dev
• [llvm-dev] [RFC] ASan: patches to support 32-byte shadow granularity Walter Lee via llvm-dev
• [llvm-dev] RFC: [GlobalISel] Towards a generic MI combiner framework Hal Finkel via llvm-dev
• [llvm-dev] Update control flow graph when splitting a machine basic block? Friedman, Eli via llvm-dev
• [llvm-dev] [GlobalISel] [X86] unable to legalize instruction S. Bharadwaj Yadavalli via llvm-dev
• [llvm-dev] getting nowhere with thinLTO Teresa Johnson via llvm-dev
• [llvm-dev] [GlobalISel] [X86] unable to legalize instruction Friedman, Eli via llvm-dev
• [llvm-dev] Less aggressive on the first allocation of CSR if detecting an early exit via llvm-dev
• [llvm-dev] [GlobalISel][AArch64] Toward flipping the switch for O0: Please give it a try! via llvm-dev
• [llvm-dev] PSA: debuginfo-tests workflow changing slightly Zachary Turner via llvm-dev
• [llvm-dev] unable to vectorize copy statement hameeza ahmed via llvm-dev
• [llvm-dev] [RFC] Enable Partial Inliner by default Evgeny Astigeevich via llvm-dev
• [llvm-dev] Experiment on how to improve our temporary file handing. Rafael Avila de Espindola via llvm-dev
• [llvm-dev] Experiment on how to improve our temporary file handing. Rafael Avila de Espindola via llvm-dev
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• [llvm-dev] PSA: debuginfo-tests workflow changing slightly Zachary Turner via llvm-dev
• [llvm-dev] unable to vectorize copy statement Craig Topper via llvm-dev
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• [llvm-dev] Experiment on how to improve our temporary file handing. UE US via llvm-dev
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• [llvm-dev] Update control flow graph when splitting a machine basic block? 章明 via llvm-dev
• [llvm-dev] Update control flow graph when splitting a machine basic block? Friedman, Eli via llvm-dev
• [llvm-dev] RFC: We need to explicitly state that some functions are reserved by LLVM Chandler Carruth via llvm-dev
• [llvm-dev] Update control flow graph when splitting a machine basic block? 章明 via llvm-dev
• [llvm-dev] RFC: [X86] Introducing command line options to prefer narrower vector instructions even when wider instructions are available Sanjay Patel via llvm-dev
• [llvm-dev] [RFC] Enable Partial Inliner by default Evgeny Astigeevich via llvm-dev
• [llvm-dev] unable to vectorize copy statement Stephen Checkoway via llvm-dev
• [llvm-dev] New LLVM License Chris Lattner via llvm-dev
• [llvm-dev] RFC: [GlobalISel] Towards a generic MI combiner framework Amara Emerson via llvm-dev
• [llvm-dev] RFC: We need to explicitly state that some functions are reserved by LLVM Chris Lattner via llvm-dev
• [llvm-dev] RFC: [GlobalISel] Towards a generic MI combiner framework Hal Finkel via llvm-dev
• [llvm-dev] RFC: We need to explicitly state that some functions are reserved by LLVM Chandler Carruth via llvm-dev
• [llvm-dev] RFC: We need to explicitly state that some functions are reserved by LLVM Chris Lattner via llvm-dev
• [llvm-dev] RFC: We need to explicitly state that some functions are reserved by LLVM Chandler Carruth via llvm-dev
• [llvm-dev] RFC: [X86] Introducing command line options to prefer narrower vector instructions even when wider instructions are available UE US via llvm-dev
• [llvm-dev] RFC: [X86] Introducing command line options to prefer narrower vector instructions even when wider instructions are available Hal Finkel via llvm-dev
• [llvm-dev] RFC: [GlobalISel] Towards a generic MI combiner framework Quentin Colombet via llvm-dev
• [llvm-dev] RFC: [GlobalISel] Towards a generic MI combiner framework Aditya Nandakumar via llvm-dev
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• [llvm-dev] How to objcopy via LLVM toolchain for armv7e-m ELF32LE? Leslie Zhai via llvm-dev
• [llvm-dev] How to objcopy via LLVM toolchain for armv7e-m ELF32LE? Leslie Zhai via llvm-dev
• [llvm-dev] Experiment on how to improve our temporary file handing. Rui Ueyama via llvm-dev
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• [llvm-dev] [lld] Flavour option purpose N via llvm-dev
• [llvm-dev] How to objcopy via LLVM toolchain for armv7e-m ELF32LE? James Henderson via llvm-dev
• [llvm-dev] [RFC] Enable Partial Inliner by default Evgeny Astigeevich via llvm-dev
• [llvm-dev] Reaching definitions on Machine IR post register allocation Krzysztof Parzyszek via llvm-dev
• [llvm-dev] [GlobalISel][AArch64] Toward flipping the switch for O0: Please give it a try! Kristof Beyls via llvm-dev
• [llvm-dev] Using C++14 code in LLVM Zachary Turner via llvm-dev
• [llvm-dev] Experiment on how to improve our temporary file handing. Rafael Avila de Espindola via llvm-dev
• [llvm-dev] [GlobalISel][AArch64] Toward flipping the switch for O0: Please give it a try! Quentin Colombet via llvm-dev
• [llvm-dev] Experiment on how to improve our temporary file handing. Davide Italiano via llvm-dev
• [llvm-dev] RFC: We need to explicitly state that some functions are reserved by LLVM Friedman, Eli via llvm-dev
• [llvm-dev] Experiment on how to improve our temporary file handing. Rafael Avila de Espindola via llvm-dev
• [llvm-dev] RFC: [GlobalISel] Towards a generic MI combiner framework Vedant Kumar via llvm-dev
• [llvm-dev] Update control flow graph when splitting a machine basic block? Friedman, Eli via llvm-dev
• [llvm-dev] LLVM Weekly - #202, Nov 13th 2017 Alex Bradbury via llvm-dev
• [llvm-dev] RFC: We need to explicitly state that some functions are reserved by LLVM Chandler Carruth via llvm-dev
• [llvm-dev] Experiment on how to improve our temporary file handing. Davide Italiano via llvm-dev
• [llvm-dev] RFC: We need to explicitly state that some functions are reserved by LLVM Xinliang David Li via llvm-dev
• [llvm-dev] RFC: [X86] Introducing command line options to prefer narrower vector instructions even when wider instructions are available Craig Topper via llvm-dev
• [llvm-dev] PSA: debuginfo-tests workflow changing slightly Adrian Prantl via llvm-dev
• [llvm-dev] Experiment on how to improve our temporary file handing. Konstantin Belousov via llvm-dev
• [llvm-dev] PSA: debuginfo-tests workflow changing slightly Zachary Turner via llvm-dev
• [llvm-dev] PSA: debuginfo-tests workflow changing slightly Zachary Turner via llvm-dev
• [llvm-dev] PSA: debuginfo-tests workflow changing slightly Adrian Prantl via llvm-dev
• [llvm-dev] PSA: debuginfo-tests workflow changing slightly Adrian Prantl via llvm-dev
• [llvm-dev] PSA: debuginfo-tests workflow changing slightly Zachary Turner via llvm-dev
• [llvm-dev] Experiment on how to improve our temporary file handing. Rafael Avila de Espindola via llvm-dev
• [llvm-dev] PSA: debuginfo-tests workflow changing slightly Zachary Turner via llvm-dev
• [llvm-dev] RFC: [X86] Introducing command line options to prefer narrower vector instructions even when wider instructions are available Sanjay Patel via llvm-dev
• [llvm-dev] RFC: [X86] Introducing command line options to prefer narrower vector instructions even when wider instructions are available Eric Christopher via llvm-dev
• [llvm-dev] RFC: [X86] Introducing command line options to prefer narrower vector instructions even when wider instructions are available Hal Finkel via llvm-dev
• [llvm-dev] Correctly linking against libLLVM (single shared library build) Chris Bieneman via llvm-dev
• [llvm-dev] PSA: debuginfo-tests workflow changing slightly Adrian Prantl via llvm-dev
• [llvm-dev] PSA: debuginfo-tests workflow changing slightly Adrian Prantl via llvm-dev
• [llvm-dev] PSA: debuginfo-tests workflow changing slightly Zachary Turner via llvm-dev
• [llvm-dev] PSA: debuginfo-tests workflow changing slightly Adrian Prantl via llvm-dev
• [llvm-dev] PSA: debuginfo-tests workflow changing slightly Zachary Turner via llvm-dev
• [llvm-dev] [lld] Flavour option purpose Rui Ueyama via llvm-dev
• [llvm-dev] How to objcopy via LLVM toolchain for armv7e-m ELF32LE? Leslie Zhai via llvm-dev
• [llvm-dev] Update control flow graph when splitting a machine basic block? 章明 via llvm-dev
• [llvm-dev] Reaching definitions on Machine IR post register allocation Venugopal Raghavan via llvm-dev
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• [llvm-dev] Cross compiling for Baremetal ARM without using GCC Leslie Zhai via llvm-dev
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• [llvm-dev] [SCEV][ScalarEvolution] SE limitation impacting LV Caballero, Diego via llvm-dev
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• [llvm-dev] [GlobalISel][AArch64] Toward flipping the switch for O0: Please give it a try! Quentin Colombet via llvm-dev
• [llvm-dev] RFC: [X86] Introducing command line options to prefer narrower vector instructions even when wider instructions are available Sanjay Patel via llvm-dev
• [llvm-dev] RFC: [X86] Introducing command line options to prefer narrower vector instructions even when wider instructions are available Craig Topper via llvm-dev
• [llvm-dev] Update control flow graph when splitting a machine basic block? Friedman, Eli via llvm-dev
• [llvm-dev] RFC: [X86] Introducing command line options to prefer narrower vector instructions even when wider instructions are available Eric Christopher via llvm-dev
• [llvm-dev] OrcJIT + CUDA Prototype for Cling Simeon Ehrig via llvm-dev
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• [llvm-dev] [GlobalISel][AArch64] Toward flipping the switch for O0: Please give it a try! Quentin Colombet via llvm-dev
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• [llvm-dev] Propagating noalias annotation Alexandre Isoard via llvm-dev
• [llvm-dev] ORC JIT and multithreading Christian Schafmeister via llvm-dev
• [llvm-dev] hi, Is there any solution about how to add some dwarf info to the IR bitcode file. Wuweijia via llvm-dev
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• [llvm-dev] hi, Is there any solution about how to add some dwarf info to the IR bitcode file. Andrew Kelley via llvm-dev
• [llvm-dev] workaround for debug info bug? 陳韋任 via llvm-dev
• [llvm-dev] 答复: hi, Is there any solution about how to add some dwarf info to the IR bitcode file. Wuweijia via llvm-dev
• [llvm-dev] workaround for debug info bug? Nemanja Ivanovic via llvm-dev
• [llvm-dev] 答复: hi, Is there any solution about how to add some dwarf info to the IR bitcode file. 陳韋任 via llvm-dev
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• [llvm-dev] 答复: hi, Is there any solution about how to add some dwarf info to the IR bitcode file. Siddharth Bhat via llvm-dev
• [llvm-dev] workaround for debug info bug? UE US via llvm-dev
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• [llvm-dev] workaround for debug info bug? Andrew Kelley via llvm-dev
• [llvm-dev] ORC JIT and multithreading David Blaikie via llvm-dev
• [llvm-dev] Collecting address ranges in DWARFUnit::collectAddressRanges. George Rimar via llvm-dev
• [llvm-dev] RFC: Adding a JSON library to LLVM Support Patrick Boettcher via llvm-dev
• [llvm-dev] CFG normalization: avoiding `br i1 false` Davide Italiano via llvm-dev
• [llvm-dev] Vectorizing "hybrid" SOA Tom Chen via llvm-dev
• [llvm-dev] workaround for debug info bug? Robinson, Paul via llvm-dev
• [llvm-dev] Elves, Orcs, and the Memory Growth Alex Denisov via llvm-dev
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• [llvm-dev] RFC MachineLICM to hoist invariant stores Zaara Syeda via llvm-dev
• [llvm-dev] [lld] Flavour option purpose Rui Ueyama via llvm-dev
• [llvm-dev] [lld] Flavour option purpose Rui Ueyama via llvm-dev
• [llvm-dev] Correctly linking against libLLVM (single shared library build) Jiri Slaby via llvm-dev
• [llvm-dev] Correctly linking against libLLVM (single shared library build) Michal Srb via llvm-dev
• [llvm-dev] About mismatching calling conventions serge guelton via llvm-dev
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• [llvm-dev] Looking for tests for class ARMConstantIslands Tim Northover via llvm-dev
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• [llvm-dev] Propagating noalias annotation via llvm-dev
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• [llvm-dev] About mismatching calling conventions Reid Kleckner via llvm-dev
• [llvm-dev] Collecting address ranges in DWARFUnit::collectAddressRanges. David Blaikie via llvm-dev
• [llvm-dev] Vectorizing "hybrid" SOA via llvm-dev
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• [llvm-dev] Declined: RISC-V LLVM sync-up conference call Carlo Bertolli via llvm-dev
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• [llvm-dev] Collecting address ranges in DWARFUnit::collectAddressRanges. David Blaikie via llvm-dev
• [llvm-dev] Collecting address ranges in DWARFUnit::collectAddressRanges. Robinson, Paul via llvm-dev
• [llvm-dev] Less aggressive on the first allocation of CSR if detecting an early exit via llvm-dev
• [llvm-dev] Collecting address ranges in DWARFUnit::collectAddressRanges. Rafael Avila de Espindola via llvm-dev
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• [llvm-dev] Propagating noalias annotation Hal Finkel via llvm-dev
• [llvm-dev] Propagating noalias annotation Hongbin Zheng via llvm-dev
• [llvm-dev] Propagating noalias annotation Hongbin Zheng via llvm-dev
• [llvm-dev] Propagating noalias annotation Hal Finkel via llvm-dev
• [llvm-dev] Propagating noalias annotation Hongbin Zheng via llvm-dev
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• [llvm-dev] [GlobalISel][AArch64] Toward flipping the switch for O0: Please give it a try! Oliver Stannard via llvm-dev
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• [llvm-dev] [GlobalISel][AArch64] Toward flipping the switch for O0: Please give it a try! Quentin Colombet via llvm-dev
• [llvm-dev] Less aggressive on the first allocation of CSR if detecting an early exit Quentin Colombet via llvm-dev
• [llvm-dev] Less aggressive on the first allocation of CSR if detecting an early exit via llvm-dev
• [llvm-dev] X86 llvm.frameaddress/returnaddress Reid Kleckner via llvm-dev
• [llvm-dev] Signed or unsigned EQ/NEQ Dounia Khaldi via llvm-dev
• [llvm-dev] [GlobalISel][AArch64] Toward flipping the switch for O0: Please give it a try! Daniel Sanders via llvm-dev
• [llvm-dev] [GlobalISel][AArch64] Toward flipping the switch for O0: Please give it a try! Justin Bogner via llvm-dev
• [llvm-dev] RFC: [GlobalISel] Towards a generic MI combiner framework Gerolf Hoflehner via llvm-dev
• [llvm-dev] [GlobalISel][AArch64] Toward flipping the switch for O0: Please give it a try! Quentin Colombet via llvm-dev
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• [llvm-dev] Signed or unsigned EQ/NEQ David Chisnall via llvm-dev
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• [llvm-dev] How and where optimizing of undefined behavior happens John Regehr via llvm-dev
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• [llvm-dev] [GlobalISel][AArch64] Toward flipping the switch for O0: Please give it a try! Kristof Beyls via llvm-dev
• [llvm-dev] [GlobalISel][AArch64] Toward flipping the switch for O0: Please give it a try! Oliver Stannard via llvm-dev
• [llvm-dev] Expanding SDNodes Liad Mordekoviz via llvm-dev
• [llvm-dev] Is llvm capable of doing loop interchange optimization? Florian Hahn via llvm-dev
• [llvm-dev] Is llvm capable of doing loop interchange optimization? Denis Bakhvalov via llvm-dev
• [llvm-dev] Expanding SDNodes Krzysztof Parzyszek via llvm-dev
• [llvm-dev] Meaning of loads/stores marked both atomic and volatile Paweł Batko via llvm-dev
• [llvm-dev] Meaning of loads/stores marked both atomic and volatile Tim Northover via llvm-dev
• [llvm-dev] [RFC] Making .eh_frame more linker-friendly George Rimar via llvm-dev
• [llvm-dev] Signed or unsigned EQ/NEQ Dounia Khaldi via llvm-dev
• [llvm-dev] [RFC] Making .eh_frame more linker-friendly George Rimar via llvm-dev
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• [llvm-dev] Meaning of loads/stores marked both atomic and volatile Reid Kleckner via llvm-dev
• [llvm-dev] LLVM Weekly - #203, Nov 20th 2017 Alex Bradbury via llvm-dev
• [llvm-dev] RFC: Replace usage of Alias Set Tracker with MemorySSA in LICM Alina Sbirlea via llvm-dev
• [llvm-dev] Meaning of loads/stores marked both atomic and volatile Paweł Batko via llvm-dev
• [llvm-dev] Meaning of loads/stores marked both atomic and volatile Paweł Batko via llvm-dev
• [llvm-dev] Meaning of loads/stores marked both atomic and volatile Reid Kleckner via llvm-dev
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• [llvm-dev] [RFC] ASan: patches to support 32-byte shadow granularity Walter Lee via llvm-dev
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• [llvm-dev] Meaning of loads/stores marked both atomic and volatile Tim Northover via llvm-dev
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• [llvm-dev] [CFP] LLVM toolchain devroom CFP at FOSDEM 2018 Kristof Beyls via llvm-dev
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• [llvm-dev] Meaning of loads/stores marked both atomic and volatile Paweł Batko via llvm-dev
• [llvm-dev] Meaning of loads/stores marked both atomic and volatile Tim Northover via llvm-dev
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• [llvm-dev] JIT and atexit crash Matt P. Dziubinski via llvm-dev
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• [llvm-dev] Reaching definitions on Machine IR post register allocation Venugopal Raghavan via llvm-dev
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• [llvm-dev] Need some help over here Osman Zakir via llvm-dev
• [llvm-dev] Get values from a given type 陳韋任 via llvm-dev
• [llvm-dev] mischeduler (pre-RA) experiments 陳韋任 via llvm-dev
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• [llvm-dev] PSA: debuginfo-tests workflow changing slightly Don Hinton via llvm-dev
• [llvm-dev] question: access IR class Instruction from DAG SDValue Jonathan via llvm-dev
• [llvm-dev] question: access IR class Instruction from DAG SDValue 陳韋任 via llvm-dev
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• [llvm-dev] question: access IR class Instruction from DAG SDValue Ryan Taylor via llvm-dev
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• [llvm-dev] Need some help over here Brian Cain via llvm-dev
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• [llvm-dev] Compilation issue "unsupported relocation on symbol" with clang 3.7.1 via llvm-dev
• [llvm-dev] Compilation issue "unsupported relocation on symbol" with clang 3.7.1 Peter Smith via llvm-dev
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• [llvm-dev] Get values from a given type Philip Pfaffe via llvm-dev
• [llvm-dev] Deadline extension: [CFP] LLVM toolchain devroom CFP at FOSDEM 2018 Kristof Beyls via llvm-dev
• [llvm-dev] [RFC] Making .eh_frame more linker-friendly George Rimar via llvm-dev
• [llvm-dev] question: access IR class Instruction from DAG SDValue Jonathan via llvm-dev
• [llvm-dev] Go Tsan check failure Csaba Raduly via llvm-dev
• [llvm-dev] question: access IR class Instruction from DAG SDValue Jatin Bhateja via llvm-dev
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• [llvm-dev] [LLD] Slow callstacks in gdb Martin Richtarsky via llvm-dev
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• [llvm-dev] [LLD] Slow callstacks in gdb Rui Ueyama via llvm-dev
• [llvm-dev] mischeduler (pre-RA) experiments Florian Hahn via llvm-dev
• [llvm-dev] [LLD] Slow callstacks in gdb Rafael Avila de Espindola via llvm-dev
• [llvm-dev] llvm compile too much memory when i userd global array mats petersson via llvm-dev
• [llvm-dev] mischeduler (pre-RA) experiments Andrew Trick via llvm-dev
• [llvm-dev] [cfe-dev] [Proposal] Automatically Cc: cfe-commits@ on Clang reviews Philip Pfaffe via llvm-dev
• [llvm-dev] [cfe-dev] [Proposal] Automatically Cc: cfe-commits@ on Clang reviews Ben Hamilton via llvm-dev
• [llvm-dev] [cfe-dev] [Proposal] Automatically Cc: cfe-commits@ on Clang reviews Ben Hamilton via llvm-dev
• [llvm-dev] Is it ok to allocate > half of address space? Marcus Johnson via llvm-dev
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• [llvm-dev] RFC: [GlobalISel] Towards a generic MI combiner framework Vedant Kumar via llvm-dev
• [llvm-dev] [RFC] Enable Partial Inliner by default Graham Yiu via llvm-dev
• [llvm-dev] Reaching definitions on Machine IR post register allocation Krzysztof Parzyszek via llvm-dev
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• [llvm-dev] Lowering operations using tablegen Liad Mordekoviz via llvm-dev
• [llvm-dev] Changing only the opcode of a SelectionDAG node Liad Mordekoviz via llvm-dev
• [llvm-dev] Go Tsan check failure Csaba Raduly via llvm-dev
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• [llvm-dev] Is it ok to allocate > half of address space? David Chisnall via llvm-dev
• [llvm-dev] question about xray tls data initialization Dean Michael Berris via llvm-dev
• [llvm-dev] Reaching definitions on Machine IR post register allocation Venugopal Raghavan via llvm-dev
• [llvm-dev] Compilation issue "unsupported relocation on symbol" with clang 3.7.1 Peter Smith via llvm-dev
• [llvm-dev] [LLD] Slow callstacks in gdb Martin Richtarsky via llvm-dev
• [llvm-dev] storing MBB MCSymbol in custom section K Jelesnianski via llvm-dev
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• [llvm-dev] RFC: [GlobalISel] Towards a generic MI combiner framework Amara Emerson via llvm-dev
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• [llvm-dev] [LLD] Slow callstacks in gdb Rafael Avila de Espindola via llvm-dev
• [llvm-dev] RFC: [GlobalISel] Towards a generic MI combiner framework Daniel Sanders via llvm-dev
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• [llvm-dev] TargetSelect.h and layering David Blaikie via llvm-dev
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• [llvm-dev] TargetSelect.h and layering Reid Kleckner via llvm-dev
• [llvm-dev] TargetSelect.h and layering David Blaikie via llvm-dev
• [llvm-dev] Combining install-distribution with binary stripping Shoaib Meenai via llvm-dev
• [llvm-dev] storing MBB MCSymbol in custom section K Jelesnianski via llvm-dev
• [llvm-dev] LLVM buildmaster is back to work now but two builders remain OFF Galina Kistanova via llvm-dev
• [llvm-dev] ABI Breaking Checks David Blaikie via llvm-dev
• [llvm-dev] Expose aliasing information in getModRefInfo (or viceversa?) Alina Sbirlea via llvm-dev
• [llvm-dev] Retrieving DbgInfoIntrinsics for a given value Hongbin Zheng via llvm-dev
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• [llvm-dev] CodeExtractor buggy? Bekket McClane via llvm-dev
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• [llvm-dev] [RFC] Making .eh_frame more linker-friendly Cary Coutant via llvm-dev
• [llvm-dev] Do I need to implement CCAssignFnForCall for porting GlobalISel to AVR target? Leslie Zhai via llvm-dev
• [llvm-dev] CUDA kernel call with template parameters not appearing in Clang AST Justin Lebar via llvm-dev
• [llvm-dev] ABI Breaking Checks Mehdi AMINI via llvm-dev
• [llvm-dev] Compilation issue "unsupported relocation on symbol" with clang 3.7.1 via llvm-dev
• [llvm-dev] ABI Breaking Checks David Blaikie via llvm-dev
• [llvm-dev] Compilation issue "unsupported relocation on symbol" with clang 3.7.1 via llvm-dev
• [llvm-dev] [RFC] Making .eh_frame more linker-friendly George Rimar via llvm-dev
• [llvm-dev] RFC: Adding 'no-overflow' keyword to 'sdiv'\'udiv' instructions Agabaria, Mohammed via llvm-dev
• [llvm-dev] Do I need to implement CCAssignFnForCall for porting GlobalISel to AVR target? Diana Picus via llvm-dev
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• [llvm-dev] question: access IR class Instruction from DAG SDValue Jonathan via llvm-dev
• [llvm-dev] CUDA kernel call with template parameters not appearing in Clang AST Michael Ehmke via llvm-dev
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• [llvm-dev] CUDA kernel call with template parameters not appearing in Clang AST Michael Ehmke via llvm-dev
• [llvm-dev] Version of LLVM used in Xcode 9.1 Adrian Prantl via llvm-dev
• [llvm-dev] CFG normalization: avoiding `br i1 false` Philip Reames via llvm-dev
• [llvm-dev] Ensuring that dead allocations from a custom allocator are killed by LLVM Philip Reames via llvm-dev
• [llvm-dev] CFG normalization: avoiding `br i1 false` Davide Italiano via llvm-dev
• [llvm-dev] Less aggressive on the first allocation of CSR if detecting an early exit Quentin Colombet via llvm-dev
• [llvm-dev] Version of LLVM used in Xcode 9.1 Oleksii Vilchanskyi via llvm-dev
• [llvm-dev] PPC64 Disassembler Leonardo Bianconi via llvm-dev
• [llvm-dev] Version of LLVM used in Xcode 9.1 Anton Malyshev via llvm-dev
• [llvm-dev] LLVM buildmaster is back to work now but two builders remain OFF Greg Bedwell via llvm-dev
• [llvm-dev] [SCEV][ScalarEvolution] SE limitation impacting LV Caballero, Diego via llvm-dev
• [llvm-dev] How to count instructions in a function? Zubin Pahuja via llvm-dev
• [llvm-dev] Get values from a given type Gerion Entrup via llvm-dev
• [llvm-dev] Ensuring that dead allocations from a custom allocator are killed by LLVM Siddharth Bhat via llvm-dev
• [llvm-dev] 5.0.1-rc2 has been tagged Tom Stellard via llvm-dev
• [llvm-dev] Publication: Counterexample-Guided Bit-Precision Selection Zvonimir Rakamaric via llvm-dev
• [llvm-dev] PPC64 Disassembler Sean Fertile via llvm-dev
• [llvm-dev] [cfe-dev] 5.0.1-rc2 has been tagged Hans Wennborg via llvm-dev
• [llvm-dev] libclang API to access static array initializer Andrew Kelley via llvm-dev
• [llvm-dev] Do I need to implement CCAssignFnForCall for porting GlobalISel to AVR target? Leslie Zhai via llvm-dev
• [llvm-dev] PPC64 Disassembler Leonardo Bianconi via llvm-dev
• [llvm-dev] PPC64 Disassembler Nemanja Ivanovic via llvm-dev
• [llvm-dev] Question about visibility analysis for whole program devirtualization pass Gainullin, Artur via llvm-dev
• [llvm-dev] Lowering operations using tablegen Nemanja Ivanovic via llvm-dev
• [llvm-dev] getCacheSize() implementation (retrieving subtarget id) Nemanja Ivanovic via llvm-dev
• [llvm-dev] SystemZ intrinsics definitions / memory flags Jonas Paulsson via llvm-dev
• [llvm-dev] TwoAddressInstructionPass bug? Jonas Paulsson via llvm-dev
• [llvm-dev] SystemZ intrinsics definitions / memory flags Ulrich Weigand via llvm-dev
• [llvm-dev] RISC-V LLVM sync-up conference calls Alex Bradbury via llvm-dev
• [llvm-dev] overloading single argument intrinsics Mohamed Shafi via llvm-dev
• [llvm-dev] getCacheSize() implementation (retrieving subtarget id) Jonas Paulsson via llvm-dev
• [llvm-dev] PPC64 Disassembler Leonardo Bianconi via llvm-dev
• [llvm-dev] Adding MPX Intrinsics to X86 codegen Przemek Leśniak via llvm-dev
• [llvm-dev] discrepancy between include/llvm/ADT/Triple.h and lib/Target/ARM/ARMGenSubtargetInfo.inc? Andrew Kelley via llvm-dev
• [llvm-dev] overloading single argument intrinsics Nemanja Ivanovic via llvm-dev
• [llvm-dev] How to count instructions in a function? John Criswell via llvm-dev
• [llvm-dev] TwoAddressInstructionPass bug? Quentin Colombet via llvm-dev
• [llvm-dev] [Release-testers] 5.0.1-rc2 has been tagged Michał Górny via llvm-dev
• [llvm-dev] How to count instructions in a function? Zubin Pahuja via llvm-dev
• [llvm-dev] PPC64 Disassembler Sean Fertile via llvm-dev
• [llvm-dev] Call for Speakers for the second LLVM Performance Workshop at CGO 2018 Sebastian Pop via llvm-dev
• [llvm-dev] [Release-testers] 5.0.1-rc2 has been tagged Brian Cain via llvm-dev
• [llvm-dev] Using Scalar Evolution to Identify Expressions Evolving in terms of Loop induction variables Sharif, Hashim via llvm-dev
• [llvm-dev] Using Scalar Evolution to Identify Expressions Evolving in terms of Loop induction variables Jatin Bhateja via llvm-dev
• [llvm-dev] Some strange i64 behavior with arm 32bit. (Raspberry Pi) Moritz Angermann via llvm-dev

Last message date: Thu Nov 30 23:54:00 PST 2017
Archived on: Thu Nov 30 23:53:48 PST 2017

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