On fault tolerance techniques towards nanoscale circuits and systems (original) (raw)

Fault tolerant structures for nanoscale gates

Ferran Martorell

2007 7th IEEE Conference on Nanotechnology (IEEE NANO), 2007

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Analysis of reliability for fault tolerant design in NANO CMOS logic circuit

Pradipkumar Dixit

Experimental and Theoretical NANOTECHNOLOGY

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Physical Fault Tolerance of Nanoelectronics

Vwani Roychowdhury

Physical Review Letters, 2011

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Comparison of fault-tolerance techniques for massively defective fine-and coarse-grained nanochips

Andrzej Napieralski

2009

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Fault and Defect Tolerant Architectures for Nano-computing

Sandeep K Shukla

2009

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Fault Tolerance Issues in Nanoelectronics

Stefano M Spagocci

PhD thesis, University College London, 2008

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Reliable circuit analysis and design using nanoscale devices

Vineet Sahula

International Conference on Communication & Electronic System Design, 2013

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Developing Fault Models for Nanowire Logic Circuits

Daniel esteban Mendez Gil

… at IEEE Int. Conf. on Dependable …

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Fault Rates in Nanochip Devices

Stefano M Spagocci

Electrochemical Society Proceedings, 1999

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Fault-tolerance and noise modelling in nanoscale circuit design

M.Ahmad Fayyaz

Signals Systems and …

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Fault-Tolerant Nanoscale Processors on Semiconductor Nanowire Grids

Teng Wang

IEEE Transactions on Circuits and Systems I-regular Papers, 2007

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Fault-tolerant nanoscale architecture based on linear threshold gates with redundancy

Nivard Aymerich

Microprocessors and Microsystems, 2012

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Transistor-Level Defect Tolerant Digital System Design at the Nanoscale

Aiman H. El-Maleh

faculty.kfupm.edu.sa

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High-reliability fault tolerant digital systems in nanometric technologies: Characterization and design methodologies

Salvatore Pontarelli

Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2012

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NANOLAB - A tool for evaluating reliability of defect-tolerant nanoarchitectures

Sandeep Shukla

IEEE Transactions on Nanotechnology, 2005

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Reliability Evaluation of Redundancy based Fault Tolerant Techniques at Nanoscale

mahesh soni

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A clock-fault tolerant architecture and circuit for reliable nanoelectronics system

woontiong ang

2007 International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2007

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Fault Tolerant Nano-Computing

Saraju P Mohanty

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A system architecture solution for unreliable nanoelectronic devices

Pieter P Jonker

IEEE Transactions On Nanotechnology, 2002

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A defect- and fault-tolerant architecture for nanocomputers

pieter jonker

Nanotechnology, 2003

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Fault Rates in Nanochips

Stefano M Spagocci

Electrochemical Society Proceedings, 1998

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Tools and techniques for evaluating reliability of defect-tolerant nano architectures

Sandeep K Shukla

2004

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Towards Defect-Tolerant Nanoscale Architectures

Teng Wang

2006

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Reliability analysis of fault-tolerant reconfigurable nano-architectures

Sandeep Shukla

Workshop, Nov, 2004

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Toward Hardware-Redundant, Fault-Tolerant Logic for Nanoelectronics

pieter jonker

IEEE Design and Test of Computers, 2005

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Tools and Techniques for Evaluating Reliability Trade-Offs for Nano-Architectures

Sandeep Shukla

Nano, Quantum and Molecular Computing, 2004

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A strategy for reliability assessment of future nano-circuits

Valeriu Beiu

Proceedings of the 11th …, 2007

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