A Self-Testing Platform with a Foreground Digital Calibration Technique for SAR ADCs (original) (raw)
Related papers
A 16-bit 16MS/s SAR ADC with on-chip calibration in 55nm CMOS
2017 Symposium on VLSI Circuits, 2017
Single-Bin DFT-Based Digital Calibration Technique for CDAC in SAR ADCs
IEEE Transactions on Circuits and Systems I: Regular Papers, 2019
Built-in Self-Calibration and Digital-Trim Technique for 14-Bit SAR ADCs Achieving ±1 LSB INL
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2015
Non-binary digital calibration for split-capacitor DAC in SAR ADC
IEICE Electronics Express, 2015
Design for Testability That Reduces Linearity Testing Time of SAR ADCs
IEICE Transactions on Electronics, 2011
A 10bit 1MHZ SAR ADC for Automobile Electronics MCU with Rail-to-Rail Input Swing
Advanced Materials Research, 2013
IEEE Transactions on Circuits and Systems I-regular Papers, 2011
IEEE Access, 2021
A 70.7-dB SNDR 100-kS/s 14-b SAR ADC with attenuation capacitance calibration in 0.35-µm CMOS
Analog Integrated Circuits and Signal Processing, 2016
SAR ADC Architecture with Digital Error Correction
IEEJ Transactions on Electrical and Electronic Engineering, 2010
A Design of Low-Power 10-bit 1-MS/s Asynchronous SAR ADC for DSRC Application
Electronics, 2020
Experimental Comparison of Different Standards for Dynamic Characterization of ADCs
IEEE Transactions on Instrumentation and Measurement, 2000
Design And Implementation Of A 10-Bit Sar Adc With A Programmable Reference
2015
Design and Implementation of SAR ADC
Journal of Computers, 2011
A 12b 50MS/s 2.1mW SAR ADC with redundancy and digital background calibration
2013 Proceedings of the ESSCIRC (ESSCIRC), 2013
A 2GS/s 6-bit CMOS time-interleaved ADC for analysis of mixed-signal calibration techniques
Analog Integrated Circuits and Signal Processing, 2015
Reduced-Code Techniques for On-Chip Static Linearity Test of SAR ADCs
2019
2006
High Linearity SAR ADC for High Performance Sensor System
2018 IEEE International Symposium on Circuits and Systems (ISCAS), 2018
2020
Testing High-Resolution ADCs With Low-Resolution/Accuracy Deterministic Dynamic Element Matched DACs
IEEE Transactions on Instrumentation and Measurement, 2007
A 6-fJ/conversion-step 200-kSps asynchronous SAR ADC with attenuation capacitor in 130-nm CMOS
Analog Integrated Circuits and Signal Processing, 2014
Analog-to-digital converter testing—new proposals
Computer Standards & Interfaces, 2004
Introduction to special issue on ADC modelling and testing
Computer Standards & Interfaces, 2007
Design and Implementation of 10 Bit, 2MS/s Split SAR ADC Using 0.18um CMOS Technology
International Journal of VLSI Design & Communication Systems, 2015
A 10-bit 50-MS/s SAR ADC With a Monotonic Capacitor Switching Procedure
Low-Power Architectures and Self-Calibration Techniques of DAC for SAR-ADC
2014
A low-power 10-bit 0.01-to-12-MS/s asynchronous SAR ADC in 65-nm CMOS
João Navarro Soares Junior Navarro
Analog Integrated Circuits and Signal Processing, 2021
Journal of Integrated Circuits and Systems
A 12 bit 76MS/s SAR ADC with a Capacitor Merged Technique in 0.18µm CMOS Technology
Journal of Electrical and Computer Engineering Innovations
2017
Design of a Low Power 10-b 8-MS/s Asynchronous SAR ADC with On-Chip Reference Voltage Generator
MDPI Electronics, 2020
IEEE Transactions on Device and Materials Reliability, 2019