LLVM: lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp File Reference (original) (raw)

Go to the source code of this file.

Macros
#define DEBUG_TYPE "pre-RA-sched"
Functions
STATISTIC (LoadsClustered, "Number of loads clustered together")
static void CheckForPhysRegDependency (SDNode *Def, SDNode *User, unsigned Op, const TargetRegisterInfo *TRI, const TargetInstrInfo *TII, MCRegister &PhysReg, int &Cost)
CheckForPhysRegDependency - Check if the dependency between def and use of a specified operand is a physical register dependency.
static void CloneNodeWithValues (SDNode *N, SelectionDAG *DAG, ArrayRef< EVT > VTs, SDValue ExtraOper=SDValue())
static bool AddGlue (SDNode *N, SDValue Glue, bool AddGlue, SelectionDAG *DAG)
static void RemoveUnusedGlue (SDNode *N, SelectionDAG *DAG)
static void ProcessSDDbgValues (SDNode *N, SelectionDAG *DAG, InstrEmitter &Emitter, SmallVectorImpl< std::pair< unsigned, MachineInstr * > > &Orders, InstrEmitter::VRBaseMapType &VRBaseMap, unsigned Order)
ProcessSDDbgValues - Process SDDbgValues associated with this node.
static void ProcessSourceNode (SDNode *N, SelectionDAG *DAG, InstrEmitter &Emitter, InstrEmitter::VRBaseMapType &VRBaseMap, SmallVectorImpl< std::pair< unsigned, MachineInstr * > > &Orders, SmallSet< Register, 8 > &Seen, MachineInstr *NewInsn)

◆ DEBUG_TYPE

#define DEBUG_TYPE "pre-RA-sched"

◆ AddGlue()

◆ CheckForPhysRegDependency()

CheckForPhysRegDependency - Check if the dependency between def and use of a specified operand is a physical register dependency.

If so, returns the register and the cost of copying the register.

Definition at line 111 of file ScheduleDAGSDNodes.cpp.

References llvm::cast(), llvm::ISD::CopyFromReg, llvm::ISD::CopyToReg, llvm::TargetRegisterClass::expensiveOrImpossibleToCopy(), llvm::TargetRegisterClass::getCopyCost(), llvm::User::getOperand(), II, Reg, TII, and TRI.

◆ CloneNodeWithValues()

Definition at line 140 of file ScheduleDAGSDNodes.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, llvm::SmallVectorImpl< T >::assign(), llvm::dyn_cast(), llvm::SelectionDAG::getVTList(), llvm::MachineSDNode::memoperands_begin(), llvm::MachineSDNode::memoperands_end(), llvm::SelectionDAG::MorphNodeTo(), N, and llvm::SelectionDAG::setNodeMemRefs().

Referenced by AddGlue(), and RemoveUnusedGlue().

◆ ProcessSDDbgValues()

ProcessSDDbgValues - Process SDDbgValues associated with this node.

Returns true if DV has any VReg operand locations which don't exist in VRBaseMap.

Definition at line 732 of file ScheduleDAGSDNodes.cpp.

References llvm::ScheduleDAGSDNodes::BB, llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::count(), llvm::ScheduleDAGSDNodes::DAG, Emitter, llvm::SelectionDAG::GetDbgValues(), llvm::MachineBasicBlock::insert(), N, and llvm::SDDbgOperand::SDNODE.

Referenced by ProcessSourceNode().

◆ ProcessSourceNode()

◆ RemoveUnusedGlue()

◆ STATISTIC()

STATISTIC ( LoadsClustered ,
"Number of loads clustered together" )

◆ HighLatencyCycles

cl::opt< int > HighLatencyCycles("sched-high-latency-cycles", cl::Hidden, cl::init(10), cl::desc("Roughly estimate the number of cycles that 'long latency' " "instructions take for targets with no itinerary")) ( "sched-high-latency-cycles" , cl::Hidden , cl::init(10) , cl::desc("Roughly estimate the number of cycles that 'long latency' " "instructions take for targets with no itinerary") ) static