LLVM: lib/Target/VE/Disassembler/VEDisassembler.cpp File Reference (original) (raw)

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◆ BCm_kind

Value:

case NAME##rri: \

case NAME##rzi: \

case NAME##iri: \

case NAME##izi: \

case NAME##rri_nt: \

case NAME##rzi_nt: \

case NAME##iri_nt: \

case NAME##izi_nt: \

case NAME##rri_t: \

case NAME##rzi_t: \

case NAME##iri_t: \

case NAME##izi_t:

Referenced by isIntegerBCKind().

◆ BCRm_kind

Value:

case NAME##rr: \

case NAME##ir: \

case NAME##rr_nt: \

case NAME##ir_nt: \

case NAME##rr_t: \

case NAME##ir_t:

Referenced by isIntegerBCKind().

◆ DEBUG_TYPE

#define DEBUG_TYPE "ve-disassembler"

◆ DecodeFunc

◆ createVEDisassembler()

◆ DecodeAS()

◆ DecodeASX()

◆ DecodeBranchCondition()

◆ DecodeBranchConditionAlways()

◆ DecodeCall()

◆ DecodeCAS()

◆ DecodeCASI32()

◆ DecodeCASI64()

◆ DecodeCCOperand()

◆ DecodeF128RegisterClass()

◆ DecodeF32RegisterClass()

◆ DecodeI32RegisterClass()

◆ DecodeI64RegisterClass()

Definition at line 143 of file VEDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, I64RegDecoderTable, Reg, and llvm::MCDisassembler::Success.

Referenced by DecodeAS(), DecodeASX(), DecodeBranchCondition(), DecodeCall(), DecodeCASI64(), DecodeLoadASI64(), DecodeLoadI64(), DecodeStoreASI64(), DecodeStoreI64(), and DecodeTS1AMI64().

◆ DecodeLoadASI64()

◆ DecodeLoadF32()

◆ DecodeLoadI32()

◆ DecodeLoadI64()

◆ DecodeMem()

Definition at line 277 of file VEDisassembler.cpp.

References DecodeASX(), llvm::MCD::fieldFromInstruction(), isLoad(), MI, and llvm::MCDisassembler::Success.

Referenced by DecodeCall(), DecodeLoadF32(), DecodeLoadI32(), DecodeLoadI64(), DecodeStoreF32(), DecodeStoreI32(), and DecodeStoreI64().

◆ DecodeMemAS()

◆ DecodeMISCRegisterClass()

◆ DecodeRDOperand()

◆ DecodeSIMM32()

◆ DecodeSIMM7()

◆ DecodeStoreASI64()

◆ DecodeStoreF32()

◆ DecodeStoreI32()

◆ DecodeStoreI64()

◆ DecodeTS1AMI32()

◆ DecodeTS1AMI64()

◆ DecodeV64RegisterClass()

◆ DecodeVM512RegisterClass()

◆ DecodeVMRegisterClass()

◆ isIntegerBCKind()

◆ LLVMInitializeVEDisassembler()

◆ readInstruction64()

◆ F128RegDecoderTable

Initial value:

= {

VE::Q0, VE::Q1, VE::Q2, VE::Q3, VE::Q4, VE::Q5, VE::Q6, VE::Q7,

VE::Q8, VE::Q9, VE::Q10, VE::Q11, VE::Q12, VE::Q13, VE::Q14, VE::Q15,

VE::Q16, VE::Q17, VE::Q18, VE::Q19, VE::Q20, VE::Q21, VE::Q22, VE::Q23,

VE::Q24, VE::Q25, VE::Q26, VE::Q27, VE::Q28, VE::Q29, VE::Q30, VE::Q31}

Definition at line 97 of file VEDisassembler.cpp.

Referenced by DecodeF128RegisterClass().

◆ F32RegDecoderTable

Initial value:

= {

VE::SF0, VE::SF1, VE::SF2, VE::SF3, VE::SF4, VE::SF5, VE::SF6,

VE::SF7, VE::SF8, VE::SF9, VE::SF10, VE::SF11, VE::SF12, VE::SF13,

VE::SF14, VE::SF15, VE::SF16, VE::SF17, VE::SF18, VE::SF19, VE::SF20,

VE::SF21, VE::SF22, VE::SF23, VE::SF24, VE::SF25, VE::SF26, VE::SF27,

VE::SF28, VE::SF29, VE::SF30, VE::SF31, VE::SF32, VE::SF33, VE::SF34,

VE::SF35, VE::SF36, VE::SF37, VE::SF38, VE::SF39, VE::SF40, VE::SF41,

VE::SF42, VE::SF43, VE::SF44, VE::SF45, VE::SF46, VE::SF47, VE::SF48,

VE::SF49, VE::SF50, VE::SF51, VE::SF52, VE::SF53, VE::SF54, VE::SF55,

VE::SF56, VE::SF57, VE::SF58, VE::SF59, VE::SF60, VE::SF61, VE::SF62,

VE::SF63}

Definition at line 85 of file VEDisassembler.cpp.

Referenced by DecodeF32RegisterClass().

◆ I32RegDecoderTable

Initial value:

= {

VE::SW0, VE::SW1, VE::SW2, VE::SW3, VE::SW4, VE::SW5, VE::SW6,

VE::SW7, VE::SW8, VE::SW9, VE::SW10, VE::SW11, VE::SW12, VE::SW13,

VE::SW14, VE::SW15, VE::SW16, VE::SW17, VE::SW18, VE::SW19, VE::SW20,

VE::SW21, VE::SW22, VE::SW23, VE::SW24, VE::SW25, VE::SW26, VE::SW27,

VE::SW28, VE::SW29, VE::SW30, VE::SW31, VE::SW32, VE::SW33, VE::SW34,

VE::SW35, VE::SW36, VE::SW37, VE::SW38, VE::SW39, VE::SW40, VE::SW41,

VE::SW42, VE::SW43, VE::SW44, VE::SW45, VE::SW46, VE::SW47, VE::SW48,

VE::SW49, VE::SW50, VE::SW51, VE::SW52, VE::SW53, VE::SW54, VE::SW55,

VE::SW56, VE::SW57, VE::SW58, VE::SW59, VE::SW60, VE::SW61, VE::SW62,

VE::SW63}

Definition at line 61 of file VEDisassembler.cpp.

Referenced by DecodeI32RegisterClass().

◆ I64RegDecoderTable

Initial value:

= {

VE::SX0, VE::SX1, VE::SX2, VE::SX3, VE::SX4, VE::SX5, VE::SX6,

VE::SX7, VE::SX8, VE::SX9, VE::SX10, VE::SX11, VE::SX12, VE::SX13,

VE::SX14, VE::SX15, VE::SX16, VE::SX17, VE::SX18, VE::SX19, VE::SX20,

VE::SX21, VE::SX22, VE::SX23, VE::SX24, VE::SX25, VE::SX26, VE::SX27,

VE::SX28, VE::SX29, VE::SX30, VE::SX31, VE::SX32, VE::SX33, VE::SX34,

VE::SX35, VE::SX36, VE::SX37, VE::SX38, VE::SX39, VE::SX40, VE::SX41,

VE::SX42, VE::SX43, VE::SX44, VE::SX45, VE::SX46, VE::SX47, VE::SX48,

VE::SX49, VE::SX50, VE::SX51, VE::SX52, VE::SX53, VE::SX54, VE::SX55,

VE::SX56, VE::SX57, VE::SX58, VE::SX59, VE::SX60, VE::SX61, VE::SX62,

VE::SX63}

Definition at line 73 of file VEDisassembler.cpp.

Referenced by DecodeI64RegisterClass().

◆ MiscRegDecoderTable

Initial value:

= {

VE::USRCC, VE::PSW, VE::SAR, VE::NoRegister,

VE::NoRegister, VE::NoRegister, VE::NoRegister, VE::PMMR,

VE::PMCR0, VE::PMCR1, VE::PMCR2, VE::PMCR3,

VE::NoRegister, VE::NoRegister, VE::NoRegister, VE::NoRegister,

VE::PMC0, VE::PMC1, VE::PMC2, VE::PMC3,

VE::PMC4, VE::PMC5, VE::PMC6, VE::PMC7,

VE::PMC8, VE::PMC9, VE::PMC10, VE::PMC11,

VE::PMC12, VE::PMC13, VE::PMC14}

Definition at line 122 of file VEDisassembler.cpp.

Referenced by DecodeMISCRegisterClass().

◆ V64RegDecoderTable

Initial value:

= {

VE::V0, VE::V1, VE::V2, VE::V3, VE::V4, VE::V5, VE::V6, VE::V7,

VE::V8, VE::V9, VE::V10, VE::V11, VE::V12, VE::V13, VE::V14, VE::V15,

VE::V16, VE::V17, VE::V18, VE::V19, VE::V20, VE::V21, VE::V22, VE::V23,

VE::V24, VE::V25, VE::V26, VE::V27, VE::V28, VE::V29, VE::V30, VE::V31,

VE::V32, VE::V33, VE::V34, VE::V35, VE::V36, VE::V37, VE::V38, VE::V39,

VE::V40, VE::V41, VE::V42, VE::V43, VE::V44, VE::V45, VE::V46, VE::V47,

VE::V48, VE::V49, VE::V50, VE::V51, VE::V52, VE::V53, VE::V54, VE::V55,

VE::V56, VE::V57, VE::V58, VE::V59, VE::V60, VE::V61, VE::V62, VE::V63}

Definition at line 103 of file VEDisassembler.cpp.

Referenced by DecodeV64RegisterClass().

◆ VM512RegDecoderTable

◆ VMRegDecoderTable

Initial value:

= {

VE::VM0, VE::VM1, VE::VM2, VE::VM3, VE::VM4, VE::VM5,

VE::VM6, VE::VM7, VE::VM8, VE::VM9, VE::VM10, VE::VM11,

VE::VM12, VE::VM13, VE::VM14, VE::VM15}

Definition at line 113 of file VEDisassembler.cpp.

Referenced by DecodeVMRegisterClass().