LLVM: llvm::MipsMCCodeEmitter Class Reference (original) (raw)

#include "[Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h](MipsMCCodeEmitter%5F8h%5Fsource.html)"

Public Member Functions
MipsMCCodeEmitter (const MCInstrInfo &mcii, MCContext &Ctx_, bool IsLittle)
MipsMCCodeEmitter (const MipsMCCodeEmitter &)=delete
MipsMCCodeEmitter & operator= (const MipsMCCodeEmitter &)=delete
~MipsMCCodeEmitter () override=default
void EmitByte (unsigned char C, raw_ostream &OS) const
void encodeInstruction (const MCInst &MI, SmallVectorImpl< char > &CB, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const override
encodeInstruction - Emit the instruction.
uint64_t getBinaryCodeForInstr (const MCInst &MI, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getJumpTargetOpValue (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
getJumpTargetOpValue - Return binary encoding of the jump target operand.
unsigned getJumpTargetOpValueMM (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getUImm5Lsl2Encoding (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getSImm3Lsa2Value (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getUImm6Lsl2Encoding (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getSImm9AddiuspValue (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getBranchTargetOpValue (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
getBranchTargetOpValue - Return binary encoding of the branch target operand.
unsigned getBranchTargetOpValue1SImm16 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
getBranchTargetOpValue1SImm16 - Return binary encoding of the branch target operand.
unsigned getBranchTargetOpValueMMR6 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
getBranchTargetOpValueMMR6 - Return binary encoding of the branch target operand.
unsigned getBranchTargetOpValueLsl2MMR6 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
getBranchTargetOpValueLsl2MMR6 - Return binary encoding of the branch target operand.
unsigned getBranchTarget7OpValueMM (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
getBranchTarget7OpValueMM - Return binary encoding of the microMIPS branch target operand.
unsigned getBranchTargetOpValueMMPC10 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
getBranchTargetOpValueMMPC10 - Return binary encoding of the microMIPS 10-bit branch target operand.
unsigned getBranchTargetOpValueMM (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
getBranchTargetOpValue - Return binary encoding of the microMIPS branch target operand.
unsigned getBranchTarget21OpValue (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
getBranchTarget21OpValue - Return binary encoding of the branch target operand.
unsigned getBranchTarget21OpValueMM (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
getBranchTarget21OpValueMM - Return binary encoding of the branch target operand for microMIPS.
unsigned getBranchTarget26OpValue (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
getBranchTarget26OpValue - Return binary encoding of the branch target operand.
unsigned getBranchTarget26OpValueMM (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
getBranchTarget26OpValueMM - Return binary encoding of the branch target operand.
unsigned getJumpOffset16OpValue (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
getJumpOffset16OpValue - Return binary encoding of the jump target operand.
unsigned getMachineOpValue (const MCInst &MI, const MCOperand &MO, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
getMachineOpValue - Return binary encoding of operand.
unsigned getImmOpValue (const MCInst &MI, const MCOperand &MO, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getMSAMemEncoding (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
template<unsigned ShiftAmount = 0>
unsigned getMemEncoding (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Return binary encoding of memory related operand.
unsigned getMemEncodingMMImm4 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getMemEncodingMMImm4Lsl1 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getMemEncodingMMImm4Lsl2 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getMemEncodingMMSPImm5Lsl2 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getMemEncodingMMGPImm7Lsl2 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getMemEncodingMMImm9 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getMemEncodingMMImm11 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getMemEncodingMMImm12 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getMemEncodingMMImm16 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getMemEncodingMMImm4sp (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getSizeInsEncoding (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
template<unsigned Bits, int Offset>
unsigned getUImmWithOffsetEncoding (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Subtract Offset then encode as a N-bit unsigned integer.
unsigned getSimm19Lsl2Encoding (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getSimm18Lsl3Encoding (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getUImm3Mod8Encoding (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getUImm4AndValue (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getMovePRegPairOpValue (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getMovePRegSingleOpValue (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getSimm23Lsl2Encoding (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getExprOpValue (const MCExpr *Expr, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getRegisterListOpValue (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getRegisterListOpValue16 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Public Member Functions inherited from llvm::MCCodeEmitter
MCCodeEmitter (const MCCodeEmitter &)=delete
MCCodeEmitter & operator= (const MCCodeEmitter &)=delete
virtual ~MCCodeEmitter ()
virtual void reset ()
Lifetime management.
Additional Inherited Members
Protected Member Functions inherited from llvm::MCCodeEmitter
MCCodeEmitter ()
Static Protected Member Functions inherited from llvm::MCCodeEmitter
static void reportUnsupportedInst (const MCInst &Inst)
static void reportUnsupportedOperand (const MCInst &Inst, unsigned OpNum)

Definition at line 30 of file MipsMCCodeEmitter.h.

MipsMCCodeEmitter() [2/2]

~MipsMCCodeEmitter()

llvm::MipsMCCodeEmitter::~MipsMCCodeEmitter ( ) overridedefault

EmitByte()

encodeInstruction()

encodeInstruction - Emit the instruction.

Size the instruction with Desc.getSize().

Implements llvm::MCCodeEmitter.

Definition at line 157 of file MipsMCCodeEmitter.cpp.

References llvm::big, getBinaryCodeForInstr(), getMovePRegPairOpValue(), llvm::MCInst::getOpcode(), llvm::little, llvm_unreachable, LowerLargeShift(), MI, N, llvm::MCInst::setOpcode(), Size, and llvm::support::endian::write().

getBinaryCodeForInstr()

getBranchTarget21OpValue()

getBranchTarget21OpValue - Return binary encoding of the branch target operand.

If the machine operand requires relocation, record the relocation and return zero.

Definition at line 394 of file MipsMCCodeEmitter.cpp.

References llvm::addFixup(), assert(), llvm::MCConstantExpr::create(), llvm::MCBinaryExpr::createAdd(), llvm::Mips::fixup_MIPS_PC21_S2, llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.

getBranchTarget21OpValueMM()

getBranchTarget21OpValueMM - Return binary encoding of the branch target operand for microMIPS.

If the machine operand requires relocation, record the relocation and return zero.

Definition at line 415 of file MipsMCCodeEmitter.cpp.

References llvm::addFixup(), assert(), llvm::MCConstantExpr::create(), llvm::MCBinaryExpr::createAdd(), llvm::Mips::fixup_MICROMIPS_PC21_S1, llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.

getBranchTarget26OpValue()

getBranchTarget26OpValue - Return binary encoding of the branch target operand.

If the machine operand requires relocation, record the relocation and return zero.

Definition at line 436 of file MipsMCCodeEmitter.cpp.

References llvm::addFixup(), assert(), llvm::MCConstantExpr::create(), llvm::MCBinaryExpr::createAdd(), llvm::Mips::fixup_MIPS_PC26_S2, llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.

getBranchTarget26OpValueMM()

getBranchTarget26OpValueMM - Return binary encoding of the branch target operand.

If the machine operand requires relocation, record the relocation and return zero.

Definition at line 457 of file MipsMCCodeEmitter.cpp.

References llvm::addFixup(), assert(), llvm::MCConstantExpr::create(), llvm::MCBinaryExpr::createAdd(), llvm::Mips::fixup_MICROMIPS_PC26_S1, llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.

getBranchTarget7OpValueMM()

getBranchTargetOpValue()

getBranchTargetOpValue - Return binary encoding of the branch target operand.

If the machine operand requires relocation, record the relocation and return zero.

Definition at line 248 of file MipsMCCodeEmitter.cpp.

References llvm::addFixup(), assert(), llvm::MCConstantExpr::create(), llvm::MCBinaryExpr::createAdd(), llvm::Mips::fixup_Mips_PC16, llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.

getBranchTargetOpValue1SImm16()

getBranchTargetOpValue1SImm16 - Return binary encoding of the branch target operand.

If the machine operand requires relocation, record the relocation and return zero.

Definition at line 269 of file MipsMCCodeEmitter.cpp.

References llvm::addFixup(), assert(), llvm::MCConstantExpr::create(), llvm::MCBinaryExpr::createAdd(), llvm::Mips::fixup_Mips_PC16, llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.

getBranchTargetOpValueLsl2MMR6()

getBranchTargetOpValueLsl2MMR6 - Return binary encoding of the branch target operand.

If the machine operand requires relocation, record the relocation and return zero.

Definition at line 312 of file MipsMCCodeEmitter.cpp.

References llvm::addFixup(), assert(), llvm::MCConstantExpr::create(), llvm::MCBinaryExpr::createAdd(), llvm::Mips::fixup_Mips_PC16, llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.

getBranchTargetOpValueMM()

getBranchTargetOpValueMMPC10()

getBranchTargetOpValueMMR6()

getBranchTargetOpValueMMR6 - Return binary encoding of the branch target operand.

If the machine operand requires relocation, record the relocation and return zero.

Definition at line 290 of file MipsMCCodeEmitter.cpp.

References llvm::addFixup(), assert(), llvm::MCConstantExpr::create(), llvm::MCBinaryExpr::createAdd(), llvm::Mips::fixup_Mips_PC16, llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.

getExprOpValue()

Definition at line 588 of file MipsMCCodeEmitter.cpp.

References llvm::addFixup(), llvm::cast(), llvm::Mips::fixup_MICROMIPS_CALL16, llvm::Mips::fixup_MICROMIPS_GOT16, llvm::Mips::fixup_MICROMIPS_GOT_DISP, llvm::Mips::fixup_MICROMIPS_GOT_OFST, llvm::Mips::fixup_MICROMIPS_GOT_PAGE, llvm::Mips::fixup_MICROMIPS_GOTTPREL, llvm::Mips::fixup_MICROMIPS_GPOFF_HI, llvm::Mips::fixup_MICROMIPS_GPOFF_LO, llvm::Mips::fixup_MICROMIPS_HI16, llvm::Mips::fixup_MICROMIPS_HIGHER, llvm::Mips::fixup_MICROMIPS_HIGHEST, llvm::Mips::fixup_MICROMIPS_LO16, llvm::Mips::fixup_MICROMIPS_SUB, llvm::Mips::fixup_MICROMIPS_TLS_DTPREL_HI16, llvm::Mips::fixup_MICROMIPS_TLS_DTPREL_LO16, llvm::Mips::fixup_MICROMIPS_TLS_GD, llvm::Mips::fixup_MICROMIPS_TLS_LDM, llvm::Mips::fixup_MICROMIPS_TLS_TPREL_HI16, llvm::Mips::fixup_MICROMIPS_TLS_TPREL_LO16, llvm::Mips::fixup_Mips_CALL16, llvm::Mips::fixup_Mips_CALL_HI16, llvm::Mips::fixup_Mips_CALL_LO16, llvm::Mips::fixup_Mips_DTPREL_HI, llvm::Mips::fixup_Mips_DTPREL_LO, llvm::Mips::fixup_Mips_GOT, llvm::Mips::fixup_Mips_GOT_DISP, llvm::Mips::fixup_Mips_GOT_HI16, llvm::Mips::fixup_Mips_GOT_LO16, llvm::Mips::fixup_Mips_GOT_OFST, llvm::Mips::fixup_Mips_GOT_PAGE, llvm::Mips::fixup_Mips_GOTTPREL, llvm::Mips::fixup_Mips_GPOFF_HI, llvm::Mips::fixup_Mips_GPOFF_LO, llvm::Mips::fixup_Mips_GPREL16, llvm::Mips::fixup_Mips_HI16, llvm::Mips::fixup_Mips_HIGHER, llvm::Mips::fixup_Mips_HIGHEST, llvm::Mips::fixup_Mips_LO16, llvm::Mips::fixup_MIPS_PCHI16, llvm::Mips::fixup_MIPS_PCLO16, llvm::Mips::fixup_Mips_SUB, llvm::Mips::fixup_Mips_TLSGD, llvm::Mips::fixup_Mips_TLSLDM, llvm::Mips::fixup_Mips_TPREL_HI, llvm::Mips::fixup_Mips_TPREL_LO, llvm::FixupKind(), getExprOpValue(), llvm::MCExpr::getKind(), llvm::MCExpr::getLoc(), llvm::Mips::isGpOff(), llvm_unreachable, llvm::Mips::S_CALL_HI16, llvm::Mips::S_CALL_LO16, llvm::Mips::S_DTPREL, llvm::Mips::S_DTPREL_HI, llvm::Mips::S_DTPREL_LO, llvm::Mips::S_GOT, llvm::Mips::S_GOT_CALL, llvm::Mips::S_GOT_DISP, llvm::Mips::S_GOT_HI16, llvm::Mips::S_GOT_LO16, llvm::Mips::S_GOT_OFST, llvm::Mips::S_GOT_PAGE, llvm::Mips::S_GOTTPREL, llvm::Mips::S_GPREL, llvm::Mips::S_HI, llvm::Mips::S_HIGHER, llvm::Mips::S_HIGHEST, llvm::Mips::S_LO, llvm::Mips::S_NEG, llvm::Mips::S_None, llvm::Mips::S_PCREL_HI16, llvm::Mips::S_PCREL_LO16, llvm::Mips::S_Special, llvm::Mips::S_TLSGD, llvm::Mips::S_TLSLDM, llvm::Mips::S_TPREL_HI, llvm::Mips::S_TPREL_LO, and llvm::MCExpr::Specifier.

Referenced by getExprOpValue(), and getImmOpValue().

getImmOpValue()

Definition at line 734 of file MipsMCCodeEmitter.cpp.

References llvm::addFixup(), assert(), llvm::Mips::fixup_Mips_AnyImm16, llvm::MipsII::FrmI, llvm::MCOperand::getExpr(), getExprOpValue(), llvm::MipsII::getFormat(), llvm::MCOperand::getImm(), llvm::isa(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.

Referenced by getMachineOpValue().

getJumpOffset16OpValue()

getJumpOffset16OpValue - Return binary encoding of the jump target operand.

If the machine operand requires relocation, record the relocation and return zero.

Definition at line 478 of file MipsMCCodeEmitter.cpp.

References llvm::addFixup(), assert(), llvm::Mips::fixup_MICROMIPS_LO16, llvm::Mips::fixup_Mips_LO16, llvm::FixupKind(), llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and MI.

getJumpTargetOpValue()

getJumpTargetOpValueMM()

getMachineOpValue()

getMachineOpValue - Return binary encoding of operand.

If the machine operand requires relocation, record the relocation and return zero.

Definition at line 715 of file MipsMCCodeEmitter.cpp.

References assert(), llvm::bit_cast(), llvm::MCOperand::getDFPImm(), llvm::MCOperand::getImm(), getImmOpValue(), llvm::MCOperand::getReg(), llvm::MCOperand::isDFPImm(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), llvm::MCOperand::isReg(), and MI.

Referenced by getMemEncoding(), getMemEncodingMMGPImm7Lsl2(), getMemEncodingMMImm11(), getMemEncodingMMImm12(), getMemEncodingMMImm16(), getMemEncodingMMImm4(), getMemEncodingMMImm4Lsl1(), getMemEncodingMMImm4Lsl2(), getMemEncodingMMImm4sp(), getMemEncodingMMImm9(), getMemEncodingMMSPImm5Lsl2(), getSimm18Lsl3Encoding(), getSimm19Lsl2Encoding(), getSizeInsEncoding(), getUImm5Lsl2Encoding(), and getUImmWithOffsetEncoding().

getMemEncoding()

getMemEncodingMMGPImm7Lsl2()

getMemEncodingMMImm11()

getMemEncodingMMImm12()

getMemEncodingMMImm16()

getMemEncodingMMImm4()

getMemEncodingMMImm4Lsl1()

getMemEncodingMMImm4Lsl2()

getMemEncodingMMImm4sp()

getMemEncodingMMImm9()

getMemEncodingMMSPImm5Lsl2()

getMovePRegPairOpValue()

getMovePRegSingleOpValue()

getMSAMemEncoding()

getRegisterListOpValue()

getRegisterListOpValue16()

getSimm18Lsl3Encoding()

getSimm19Lsl2Encoding()

getSimm23Lsl2Encoding()

getSImm3Lsa2Value()

getSImm9AddiuspValue()

getSizeInsEncoding()

getUImm3Mod8Encoding()

getUImm4AndValue()

getUImm5Lsl2Encoding()

getUImm6Lsl2Encoding()

getUImmWithOffsetEncoding()

operator=()


The documentation for this class was generated from the following files: