LLVM: llvm::PPCPreRASchedStrategy Class Reference (original) (raw)

A MachineSchedStrategy implementation for PowerPC pre RA scheduling. More...

#include "[Target/PowerPC/PPCMachineScheduler.h](PPCMachineScheduler%5F8h%5Fsource.html)"

Public Member Functions
PPCPreRASchedStrategy (const MachineSchedContext *C)
Public Member Functions inherited from llvm::GenericScheduler
GenericScheduler (const MachineSchedContext *C)
void initPolicy (MachineBasicBlock::iterator Begin, MachineBasicBlock::iterator End, unsigned NumRegionInstrs) override
Initialize the per-region scheduling policy.
void dumpPolicy () const override
bool shouldTrackPressure () const override
Check if pressure tracking is needed before building the DAG and initializing this strategy.
bool shouldTrackLaneMasks () const override
Returns true if lanemasks should be tracked.
void initialize (ScheduleDAGMI *dag) override
Initialize the strategy after building the DAG for a new region.
SUnit * pickNode (bool &IsTopNode) override
Pick the best node to balance the schedule. Implements MachineSchedStrategy.
void schedNode (SUnit *SU, bool IsTopNode) override
Update the scheduler's state after scheduling a node.
void releaseTopNode (SUnit *SU) override
When all predecessor dependencies have been resolved, free this node for top-down scheduling.
void releaseBottomNode (SUnit *SU) override
When all successor dependencies have been resolved, free this node for bottom-up scheduling.
void registerRoots () override
Notify this strategy that all roots have been released (including those that depend on EntrySU or ExitSU).
Public Member Functions inherited from llvm::MachineSchedStrategy
virtual ~MachineSchedStrategy ()=default
virtual bool doMBBSchedRegionsTopDown () const
virtual void enterMBB (MachineBasicBlock *MBB)
Tell the strategy that MBB is about to be processed.
virtual void leaveMBB ()
Tell the strategy that current MBB is done.
virtual void scheduleTree (unsigned SubtreeID)
Scheduler callback to notify that a new subtree is scheduled.
Protected Member Functions
bool tryCandidate (SchedCandidate &Cand, SchedCandidate &TryCand, SchedBoundary *Zone) const override
Apply a set of heuristics to a new candidate.
Protected Member Functions inherited from llvm::GenericScheduler
void checkAcyclicLatency ()
Set IsAcyclicLatencyLimited if the acyclic path is longer than the cyclic critical path by more cycles than it takes to drain the instruction buffer.
void initCandidate (SchedCandidate &Cand, SUnit *SU, bool AtTop, const RegPressureTracker &RPTracker, RegPressureTracker &TempTracker)
SUnit * pickNodeBidirectional (bool &IsTopNode)
Pick the best candidate node from either the top or bottom queue.
void pickNodeFromQueue (SchedBoundary &Zone, const CandPolicy &ZonePolicy, const RegPressureTracker &RPTracker, SchedCandidate &Candidate)
Pick the best candidate from the queue.
void reschedulePhysReg (SUnit *SU, bool isTop)
Protected Member Functions inherited from llvm::GenericSchedulerBase
GenericSchedulerBase (const MachineSchedContext *C)
LLVM_ABI void setPolicy (CandPolicy &Policy, bool IsPostRA, SchedBoundary &CurrZone, SchedBoundary *OtherZone)
Set the CandPolicy given a scheduling zone given the current resources and latencies inside and outside the zone.
MachineSchedPolicy getPolicy () const override
void traceCandidate (const SchedCandidate &Cand)
Additional Inherited Members
Public Types inherited from llvm::GenericSchedulerBase
enum CandReason : uint8_t { NoCand, Only1, PhysReg, RegExcess, RegCritical, Stall, Cluster, Weak, RegMax, ResourceReduce, ResourceDemand, BotHeightReduce, BotPathReduce, TopDepthReduce, TopPathReduce, NodeOrder, FirstValid }
Represent the type of SchedCandidate found within a single queue. More...
Static Public Member Functions inherited from llvm::GenericSchedulerBase
static const char * getReasonStr (GenericSchedulerBase::CandReason Reason)
Protected Attributes inherited from llvm::GenericScheduler
ScheduleDAGMILive * DAG = nullptr
SchedBoundary Top
SchedBoundary Bot
unsigned TopClusterID
unsigned BotClusterID
SchedCandidate TopCand
Candidate last picked from Top boundary.
SchedCandidate BotCand
Candidate last picked from Bot boundary.
Protected Attributes inherited from llvm::GenericSchedulerBase
const MachineSchedContext * Context
const TargetSchedModel * SchedModel = nullptr
const TargetRegisterInfo * TRI = nullptr
unsigned TopIdx = 0
unsigned BotIdx = 0
unsigned NumRegionInstrs = 0
MachineSchedPolicy RegionPolicy
SchedRemainder Rem

A MachineSchedStrategy implementation for PowerPC pre RA scheduling.

Definition at line 21 of file PPCMachineScheduler.h.

tryCandidate()

Apply a set of heuristics to a new candidate.

Heuristics are currently hierarchical. This may be more efficient than a graduated cost model because we don't need to evaluate all aspects of the model for each node in the queue. But it's really done to make the heuristics easier to debug and statistically analyze.

Parameters

Cand provides the policy and current best candidate.
TryCand refers to the next SUnit candidate, otherwise uninitialized.
Zone describes the scheduled zone that we are extending, or nullptr if Cand is from a different zone than TryCand.

Returns

true if TryCand is better than Cand (Reason is NOT NoCand)

Reimplemented from llvm::GenericScheduler.

Definition at line 49 of file PPCMachineScheduler.cpp.

References llvm::GenericSchedulerBase::SchedCandidate::AtTop, llvm::biasPhysReg(), llvm::GenericScheduler::BotClusterID, llvm::GenericSchedulerBase::Cluster, llvm::RegPressureDelta::CriticalMax, llvm::GenericSchedulerBase::SchedResourceDelta::CritResources, llvm::RegPressureDelta::CurrentMax, llvm::GenericScheduler::DAG, llvm::GenericSchedulerBase::SchedResourceDelta::DemandedResources, llvm::RegPressureDelta::Excess, llvm::SchedBoundary::getCurrMOps(), llvm::SchedBoundary::getLatencyStallCycles(), llvm::getWeakLeft(), llvm::GenericSchedulerBase::SchedCandidate::initResourceDelta(), llvm::isTheSameCluster(), llvm::SchedBoundary::isTop(), llvm::GenericSchedulerBase::SchedCandidate::isValid(), llvm::GenericSchedulerBase::NoCand, llvm::SUnit::NodeNum, llvm::GenericSchedulerBase::NodeOrder, llvm::SUnit::ParentClusterIdx, llvm::GenericSchedulerBase::PhysReg, llvm::GenericSchedulerBase::SchedCandidate::Policy, llvm::GenericSchedulerBase::SchedCandidate::Reason, llvm::GenericSchedulerBase::CandPolicy::ReduceLatency, llvm::GenericSchedulerBase::RegCritical, llvm::GenericSchedulerBase::RegExcess, llvm::GenericSchedulerBase::RegionPolicy, llvm::GenericSchedulerBase::RegMax, llvm::GenericSchedulerBase::Rem, llvm::GenericSchedulerBase::SchedCandidate::ResDelta, llvm::GenericSchedulerBase::ResourceDemand, llvm::GenericSchedulerBase::ResourceReduce, llvm::GenericSchedulerBase::SchedCandidate::RPDelta, llvm::GenericSchedulerBase::SchedModel, llvm::GenericSchedulerBase::Stall, llvm::GenericSchedulerBase::SchedCandidate::SU, llvm::GenericScheduler::TopClusterID, llvm::GenericSchedulerBase::TRI, llvm::tryGreater(), llvm::tryLatency(), llvm::tryLess(), llvm::tryPressure(), and llvm::GenericSchedulerBase::Weak.


The documentation for this class was generated from the following files: