LLVM: lib/Target/AMDGPU/AMDGPUISelLowering.cpp File Reference (original) (raw)

This is the parent TargetLowering class for hardware code gen targets. More...

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Functions
static LLVM_READNONE bool fnegFoldsIntoOpcode (unsigned Opc)
static bool fnegFoldsIntoOp (const SDNode *N)
static LLVM_READONLY bool opMustUseVOP3Encoding (const SDNode *N, MVT VT)
returns true if the operation will definitely need to use a 64-bit encoding, and thus will use a VOP3 encoding regardless of the source modifiers.
static LLVM_READONLY bool selectSupportsSourceMods (const SDNode *N)
Return true if v_cndmask_b32 will support fabs/fneg source modifiers for the type for ISD::SELECT.
static LLVM_READONLY bool hasSourceMods (const SDNode *N)
static SDValue peekFNeg (SDValue Val)
static SDValue peekFPSignOps (SDValue Val)
static SDValue extractF64Exponent (SDValue Hi, const SDLoc &SL, SelectionDAG &DAG)
static bool valueIsKnownNeverF32Denorm (SDValue Src)
Return true if it's known that Src can never be an f32 denormal value.
static SDValue getMad (SelectionDAG &DAG, const SDLoc &SL, EVT VT, SDValue X, SDValue Y, SDValue C, SDNodeFlags Flags=SDNodeFlags())
static bool isCtlzOpc (unsigned Opc)
static bool isCttzOpc (unsigned Opc)
static bool isU24 (SDValue Op, SelectionDAG &DAG)
static bool isI24 (SDValue Op, SelectionDAG &DAG)
static SDValue simplifyMul24 (SDNode *Node24, TargetLowering::DAGCombinerInfo &DCI)
template
static SDValue constantFoldBFE (SelectionDAG &DAG, IntTy Src0, uint32_t Offset, uint32_t Width, const SDLoc &DL)
static bool hasVolatileUser (SDNode *Val)
static SDValue getMul24 (SelectionDAG &DAG, const SDLoc &SL, SDValue N0, SDValue N1, unsigned Size, bool Signed)
static SDValue getAddOneOp (const SDNode *V)
If V is an add of a constant 1, returns the other operand.
static SDValue distributeOpThroughSelect (TargetLowering::DAGCombinerInfo &DCI, unsigned Op, const SDLoc &SL, SDValue Cond, SDValue N1, SDValue N2)
static bool isInv2Pi (const APFloat &APF)
static unsigned inverseMinMax (unsigned Opc)
static int getOrCreateFixedStackObject (MachineFrameInfo &MFI, unsigned Size, int64_t Offset)
static unsigned workitemIntrinsicDim (unsigned ID)
Variables
static cl::opt< bool > AMDGPUBypassSlowDiv ("amdgpu-bypass-slow-div", cl::desc("Skip 64-bit divide for dynamic 32-bit values"), cl::init(true))

This is the parent TargetLowering class for hardware code gen targets.

Definition in file AMDGPUISelLowering.cpp.

◆ constantFoldBFE()

◆ distributeOpThroughSelect()

◆ extractF64Exponent()

◆ fnegFoldsIntoOp()

Definition at line 700 of file AMDGPUISelLowering.cpp.

References llvm::ISD::BUILD_VECTOR, fnegFoldsIntoOpcode(), llvm::SDValue::getNumOperands(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::SDValue::getValueSizeInBits(), llvm::SDValue::getValueType(), N, Opc, and llvm::ISD::SELECT.

Referenced by llvm::AMDGPUTargetLowering::foldFreeOpFromSelect(), llvm::AMDGPUTargetLowering::performFNegCombine(), and llvm::AMDGPUTargetLowering::shouldFoldFNegIntoSrc().

◆ fnegFoldsIntoOpcode()

◆ getAddOneOp()

◆ getMad()

◆ getMul24()

◆ getOrCreateFixedStackObject()

◆ hasSourceMods()

◆ hasVolatileUser()

◆ inverseMinMax()

◆ isCtlzOpc()

◆ isCttzOpc()

◆ isI24()

◆ isInv2Pi()

◆ isU24()

◆ opMustUseVOP3Encoding()

returns true if the operation will definitely need to use a 64-bit encoding, and thus will use a VOP3 encoding regardless of the source modifiers.

Definition at line 721 of file AMDGPUISelLowering.cpp.

References N, and llvm::ISD::SELECT.

◆ peekFNeg()

◆ peekFPSignOps()

◆ selectSupportsSourceMods()

◆ simplifyMul24()

Definition at line 3797 of file AMDGPUISelLowering.cpp.

References llvm::TargetLowering::DAGCombinerInfo::DAG, llvm::SDNode::getConstantOperandVal(), llvm::APInt::getLowBitsSet(), llvm::SelectionDAG::getNode(), llvm::SDNode::getOpcode(), llvm::SDNode::getOperand(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::SDNode::getVTList(), llvm::ISD::INTRINSIC_WO_CHAIN, LHS, llvm_unreachable, RHS, SDValue(), llvm::TargetLowering::SimplifyDemandedBits(), and llvm::TargetLowering::SimplifyMultipleUseDemandedBits().

Referenced by llvm::AMDGPUTargetLowering::PerformDAGCombine(), and llvm::AMDGPUTargetLowering::performIntrinsicWOChainCombine().

◆ valueIsKnownNeverF32Denorm()

◆ workitemIntrinsicDim()

◆ AMDGPUBypassSlowDiv

cl::opt< bool > AMDGPUBypassSlowDiv("amdgpu-bypass-slow-div", cl::desc("Skip 64-bit divide for dynamic 32-bit values"), cl::init(true)) ( "amdgpu-bypass-slow-div" , cl::desc("Skip 64-bit divide for dynamic 32-bit values") , cl::init(true) ) static