LLVM: lib/Target/Xtensa/Disassembler/XtensaDisassembler.cpp File Reference (original) (raw)

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◆ DEBUG_TYPE

#define DEBUG_TYPE "Xtensa-disassembler"

◆ createXtensaDisassembler()

◆ DecodeARRegisterClass()

◆ decodeB4constOperand()

◆ decodeB4constuOperand()

◆ decodeBranchOperand()

◆ DecodeBRRegisterClass()

◆ decodeCallOperand()

◆ decodeEntry_Imm12OpValue()

◆ DecodeFPRRegisterClass()

◆ decodeImm12Operand()

◆ decodeImm1_16Operand()

◆ decodeImm1n_15Operand()

◆ decodeImm32n_95Operand()

◆ decodeImm64n_4nOperand()

◆ decodeImm7_22Operand()

◆ decodeImm8_sh8Operand()

◆ decodeImm8n_7Operand()

◆ decodeImm8Operand()

◆ decodeJumpOperand()

◆ decodeL32ROperand()

◆ decodeLoopOperand()

◆ decodeMem16Operand()

◆ decodeMem32nOperand()

◆ decodeMem32Operand()

◆ decodeMem8Operand()

◆ DecodeMR01RegisterClass()

◆ DecodeMR23RegisterClass()

◆ DecodeMRRegisterClass()

◆ decodeShimm1_31Operand()

◆ DecodeSRRegisterClass()

Definition at line 185 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::Xtensa::checkRegister(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, llvm::MCSubtargetInfo::getFeatureBits(), llvm::MCInst::getOpcode(), llvm::MCDisassembler::getSubtargetInfo(), Reg, llvm::Xtensa::REGISTER_EXCHANGE, llvm::Xtensa::REGISTER_READ, llvm::Xtensa::REGISTER_WRITE, SRDecoderTable, and llvm::MCDisassembler::Success.

◆ decodeUimm4Operand()

◆ decodeUimm5Operand()

◆ DecodeURRegisterClass()

Definition at line 122 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::Xtensa::checkRegister(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, llvm::MCSubtargetInfo::getFeatureBits(), llvm::MCInst::getOpcode(), llvm::MCDisassembler::getSubtargetInfo(), llvm::Xtensa::getUserRegister(), MRI, Reg, llvm::Xtensa::REGISTER_READ, llvm::Xtensa::REGISTER_WRITE, and llvm::MCDisassembler::Success.

◆ LLVMInitializeXtensaDisassembler()

◆ readInstruction16()

◆ readInstruction24()

◆ tryAddingSymbolicOperand()

◆ ARDecoderTable

Initial value:

= {

Xtensa::A0, Xtensa::SP, Xtensa::A2, Xtensa::A3, Xtensa::A4, Xtensa::A5,

Xtensa::A6, Xtensa::A7, Xtensa::A8, Xtensa::A9, Xtensa::A10, Xtensa::A11,

Xtensa::A12, Xtensa::A13, Xtensa::A14, Xtensa::A15}

Definition at line 62 of file XtensaDisassembler.cpp.

Referenced by DecodeARRegisterClass().

◆ SRDecoderTable

◆ TableB4const

Initial value:

= {-1, 1, 2, 3, 4, 5, 6, 7,

8, 10, 12, 16, 32, 64, 128, 256}

Definition at line 390 of file XtensaDisassembler.cpp.

Referenced by decodeB4constOperand().

◆ TableB4constu

Initial value:

= {32768, 65536, 2, 3, 4, 5, 6, 7,

8, 10, 12, 16, 32, 64, 128, 256}

Definition at line 400 of file XtensaDisassembler.cpp.

Referenced by decodeB4constuOperand().