LLVM: llvm::X86_MC::X86MCInstrAnalysis Class Reference (original) (raw)
| Public Member Functions | |
|---|---|
| X86MCInstrAnalysis (const MCInstrInfo *MCII) | |
| bool | clearsSuperRegisters (const MCRegisterInfo &MRI, const MCInst &Inst, APInt &Mask) const override |
| Returns true if at least one of the register writes performed by. | |
| std::vector< std::pair< uint64_t, uint64_t > > | findPltEntries (uint64_t PltSectionVA, ArrayRef< uint8_t > PltContents, const MCSubtargetInfo &STI) const override |
| Returns (PLT virtual address, GOT virtual address) pairs for PLT entries. | |
| bool | evaluateBranch (const MCInst &Inst, uint64_t Addr, uint64_t Size, uint64_t &Target) const override |
| Given a branch instruction try to get the address the branch targets. | |
| std::optional< uint64_t > | evaluateMemoryOperandAddress (const MCInst &Inst, const MCSubtargetInfo *STI, uint64_t Addr, uint64_t Size) const override |
| Given an instruction tries to get the address of a memory operand. | |
| std::optional< uint64_t > | getMemoryOperandRelocationOffset (const MCInst &Inst, uint64_t Size) const override |
| Given an instruction with a memory operand that could require relocation, returns the offset within the instruction of that relocation. | |
| Public Member Functions inherited from llvm::MCInstrAnalysis | |
| MCInstrAnalysis (const MCInstrInfo *Info) | |
| virtual | ~MCInstrAnalysis ()=default |
| virtual void | resetState () |
| Clear the internal state. See updateState for more information. | |
| virtual void | updateState (const MCInst &Inst, uint64_t Addr) |
| Update internal state with Inst at Addr. | |
| virtual bool | isBranch (const MCInst &Inst) const |
| virtual bool | isConditionalBranch (const MCInst &Inst) const |
| virtual bool | isUnconditionalBranch (const MCInst &Inst) const |
| virtual bool | isIndirectBranch (const MCInst &Inst) const |
| virtual bool | isCall (const MCInst &Inst) const |
| virtual bool | isReturn (const MCInst &Inst) const |
| virtual bool | isTerminator (const MCInst &Inst) const |
| virtual bool | isBarrier (const MCInst &Inst) const |
| virtual bool | mayAffectControlFlow (const MCInst &Inst, const MCRegisterInfo &MCRI) const |
| virtual bool | isZeroIdiom (const MCInst &MI, APInt &Mask, unsigned CPUID) const |
| Returns true if MI is a dependency breaking zero-idiom for the given subtarget. | |
| virtual bool | isDependencyBreaking (const MCInst &MI, APInt &Mask, unsigned CPUID) const |
| Returns true if MI is a dependency breaking instruction for the subtarget associated with CPUID . | |
| virtual bool | isOptimizableRegisterMove (const MCInst &MI, unsigned CPUID) const |
| Returns true if MI is a candidate for move elimination. |
Definition at line 491 of file X86MCTargetDesc.cpp.
| llvm::X86_MC::X86MCInstrAnalysis::X86MCInstrAnalysis ( const MCInstrInfo * MCII) | inline |
|---|
◆ clearsSuperRegisters()
Returns true if at least one of the register writes performed by.
Parameters
| Inst | implicitly clears the upper portion of all super-registers. |
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Example: on X86-64, a write to EAX implicitly clears the upper half of RAX. Also (still on x86) an XMM write perfomed by an AVX 128-bit instruction implicitly clears the upper portion of the correspondent YMM register.
This method also updates an APInt which is used as mask of register writes. There is one bit for every explicit/implicit write performed by the instruction. If a write implicitly clears its super-registers, then the corresponding bit is set (vic. the corresponding bit is cleared).
The first bits in the APint are related to explicit writes. The remaining bits are related to implicit writes. The sequence of writes follows the machine operand sequence. For implicit writes, the sequence is defined by the MCInstrDesc.
The assumption is that the bit-width of the APInt is correctly set by the caller. The default implementation conservatively assumes that none of the writes clears the upper portion of a super-register.
Reimplemented from llvm::MCInstrAnalysis.
Definition at line 521 of file X86MCTargetDesc.cpp.
References assert(), llvm::MCRegisterClass::contains(), llvm::X86II::EncodingMask, llvm::X86II::EVEX, llvm::MCInst::getOpcode(), llvm::MCInst::getOperand(), I, llvm::MCInstrAnalysis::Info, MRI, llvm::X86II::VEX, and llvm::X86II::XOP.
◆ evaluateBranch()
◆ evaluateMemoryOperandAddress()
Given an instruction tries to get the address of a memory operand.
Returns the address on success.
Reimplemented from llvm::MCInstrAnalysis.
Definition at line 644 of file X86MCTargetDesc.cpp.
References llvm::X86::AddrBaseReg, llvm::X86::AddrDisp, llvm::X86::AddrIndexReg, llvm::X86::AddrScaleAmt, llvm::X86::AddrSegmentReg, llvm::MCOperand::getImm(), llvm::X86II::getMemoryOperandNo(), llvm::MCInst::getOpcode(), llvm::MCInst::getOperand(), llvm::X86II::getOperandBias(), llvm::MCOperand::getReg(), llvm::MCInstrAnalysis::Info, llvm::MCOperand::isImm(), and Size.
◆ findPltEntries()
◆ getMemoryOperandRelocationOffset()
| std::optional< uint64_t > llvm::X86_MC::X86MCInstrAnalysis::getMemoryOperandRelocationOffset ( const MCInst & Inst, uint64_t Size ) const | overridevirtual |
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Given an instruction with a memory operand that could require relocation, returns the offset within the instruction of that relocation.
Reimplemented from llvm::MCInstrAnalysis.
Definition at line 670 of file X86MCTargetDesc.cpp.
References llvm::X86::AddrBaseReg, llvm::X86::AddrDisp, llvm::X86::AddrIndexReg, llvm::X86::AddrScaleAmt, llvm::X86::AddrSegmentReg, assert(), llvm::MCOperand::getImm(), llvm::X86II::getMemoryOperandNo(), llvm::MCInst::getOpcode(), llvm::MCInst::getOperand(), llvm::X86II::getOperandBias(), llvm::MCOperand::getReg(), llvm::MCInstrAnalysis::Info, llvm::MCOperand::isImm(), and Size.
The documentation for this class was generated from the following file:
- lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp