LLVM: llvm::mca::Scheduler Class Reference (original) (raw)

Class Scheduler is responsible for issuing instructions to pipeline resources. More...

#include "[llvm/MCA/HardwareUnits/Scheduler.h](MCA%5F2HardwareUnits%5F2Scheduler%5F8h%5Fsource.html)"

Public Member Functions
Scheduler (const MCSchedModel &Model, LSUnitBase &Lsu)
Scheduler (const MCSchedModel &Model, LSUnitBase &Lsu, std::unique_ptr< SchedulerStrategy > SelectStrategy)
Scheduler (std::unique_ptr< ResourceManager > RM, LSUnitBase &Lsu, std::unique_ptr< SchedulerStrategy > SelectStrategy)
LLVM_ABI Status isAvailable (const InstRef &IR)
Check if the instruction in 'IR' can be dispatched during this cycle.
LLVM_ABI bool dispatch (InstRef &IR)
Reserves buffer and LSUnit queue resources that are necessary to issue this instruction.
LLVM_ABI void issueInstruction (InstRef &IR, SmallVectorImpl< std::pair< ResourceRef, ReleaseAtCycles > > &Used, SmallVectorImpl< InstRef > &Pending, SmallVectorImpl< InstRef > &Ready)
Issue an instruction and populates a vector of used pipeline resources, and a vector of instructions that transitioned to the ready state as a result of this event.
LLVM_ABI bool mustIssueImmediately (const InstRef &IR) const
Returns true if IR has to be issued immediately, or if IR is a zero latency instruction.
LLVM_ABI void cycleEvent (SmallVectorImpl< ResourceRef > &Freed, SmallVectorImpl< InstRef > &Executed, SmallVectorImpl< InstRef > &Pending, SmallVectorImpl< InstRef > &Ready)
This routine notifies the Scheduler that a new cycle just started.
unsigned getResourceID (uint64_t Mask) const
Convert a resource mask into a valid llvm processor resource identifier.
LLVM_ABI InstRef select ()
Select the next instruction to issue from the ReadySet.
bool isReadySetEmpty () const
bool isWaitSetEmpty () const
LLVM_ABI void analyzeDataDependencies (SmallVectorImpl< InstRef > &RegDeps, SmallVectorImpl< InstRef > &MemDeps)
This method is called by the ExecuteStage at the end of each cycle to identify bottlenecks caused by data dependencies.
LLVM_ABI uint64_t analyzeResourcePressure (SmallVectorImpl< InstRef > &Insts)
Returns a mask of busy resources, and populates vector Insts with instructions that could not be issued to the underlying pipelines because not all pipeline resources were available.
bool hadTokenStall () const
void dump () const
void instructionCheck (const InstRef &IR) const
Public Member Functions inherited from llvm::mca::HardwareUnit
HardwareUnit ()=default
virtual ~HardwareUnit ()

Class Scheduler is responsible for issuing instructions to pipeline resources.

Internally, it delegates to a ResourceManager the management of processor resources. This class is also responsible for tracking the progress of instructions from the dispatch stage, until the write-back stage.

Definition at line 71 of file Scheduler.h.

◆ Status

Enumerator
SC_AVAILABLE
SC_LOAD_QUEUE_FULL
SC_STORE_QUEUE_FULL
SC_BUFFERS_FULL
SC_DISPATCH_GROUP_STALL

Definition at line 174 of file Scheduler.h.

◆ Scheduler() [2/3]

◆ Scheduler() [3/3]

◆ analyzeDataDependencies()

◆ analyzeResourcePressure()

Returns a mask of busy resources, and populates vector Insts with instructions that could not be issued to the underlying pipelines because not all pipeline resources were available.

Definition at line 244 of file Scheduler.cpp.

References llvm::append_range().

◆ cycleEvent()

This routine notifies the Scheduler that a new cycle just started.

It notifies the underlying ResourceManager that a new cycle just started. Vector Freed is populated with resourceRef related to resources that have changed in state, and that are now available to new instructions. Instructions executed are added to vector Executed, while vector Ready is populated with instructions that have become ready in this new cycle. Vector Pending is popluated by instructions that have transitioned through the pending stat during this cycle. The Pending and Ready sets may not be disjoint. An instruction is allowed to transition from the WAIT state to the READY state (going through the PENDING state) within a single cycle. That means, instructions may appear in both the Pending and Ready set.

Definition at line 265 of file Scheduler.cpp.

References IR.

◆ dispatch()

Reserves buffer and LSUnit queue resources that are necessary to issue this instruction.

Returns true if instruction IR is ready to be issued to the underlying pipelines. Note that this operation cannot fail; it assumes that a previous call to method isAvailable(IR) returned SC_AVAILABLE.

If IR is a memory operation, then the Scheduler queries the LS unit to obtain a LS token. An LS token is used internally to track memory dependencies.

Definition at line 301 of file Scheduler.cpp.

References assert(), llvm::dbgs(), llvm::mca::Instruction::getUsedBuffers(), IR, llvm::mca::Instruction::isDispatched(), llvm::mca::InstructionBase::isMemOp(), llvm::mca::Instruction::isPending(), llvm::mca::Instruction::isReady(), LLVM_DEBUG, mustIssueImmediately(), and llvm::mca::Instruction::setLSUTokenID().

◆ dump()

void llvm::mca::Scheduler::dump ( ) const

◆ getResourceID()

Convert a resource mask into a valid llvm processor resource identifier.

Only the most significant bit of the Mask is used by this method to identify the processor resource.

Definition at line 234 of file Scheduler.h.

◆ hadTokenStall()

bool llvm::mca::Scheduler::hadTokenStall ( ) const inline

◆ instructionCheck()

void llvm::mca::Scheduler::instructionCheck ( const InstRef & IR) const inline

◆ isAvailable()

Check if the instruction in 'IR' can be dispatched during this cycle.

Return SC_AVAILABLE if both scheduler and LS resources are available.

This method is also responsible for setting field HadTokenStall if IR cannot be dispatched to the Scheduler due to unavailable resources.

Definition at line 40 of file Scheduler.cpp.

References IR, llvm_unreachable, llvm::mca::LSUnitBase::LSU_AVAILABLE, llvm::mca::LSUnitBase::LSU_LQUEUE_FULL, llvm::mca::LSUnitBase::LSU_SQUEUE_FULL, llvm::mca::RS_BUFFER_AVAILABLE, llvm::mca::RS_BUFFER_UNAVAILABLE, llvm::mca::RS_RESERVED, SC_AVAILABLE, SC_BUFFERS_FULL, SC_DISPATCH_GROUP_STALL, SC_LOAD_QUEUE_FULL, and SC_STORE_QUEUE_FULL.

◆ isReadySetEmpty()

bool llvm::mca::Scheduler::isReadySetEmpty ( ) const inline

◆ issueInstruction()

◆ isWaitSetEmpty()

bool llvm::mca::Scheduler::isWaitSetEmpty ( ) const inline

◆ mustIssueImmediately()

Returns true if IR has to be issued immediately, or if IR is a zero latency instruction.

Definition at line 291 of file Scheduler.cpp.

References IR.

Referenced by dispatch().

◆ select()

InstRef llvm::mca::Scheduler::select ( )

The documentation for this class was generated from the following files: