LLVM: llvm::AArch64 Namespace Reference (original) (raw)

Classes
struct Alias
struct ArchInfo
struct CpuInfo
struct ExtensionDependency
struct ExtensionInfo
struct ExtensionSet
struct FMVInfo
Enumerations
enum CPUFeatures { FEAT_RNG, FEAT_FLAGM, FEAT_FLAGM2, FEAT_FP16FML, FEAT_DOTPROD, FEAT_SM4, FEAT_RDM, FEAT_LSE, FEAT_FP, FEAT_SIMD, FEAT_CRC, FEAT_CSSC, FEAT_SHA2, FEAT_SHA3, RESERVED_FEAT_AES, FEAT_PMULL, FEAT_FP16, FEAT_DIT, FEAT_DPB, FEAT_DPB2, FEAT_JSCVT, FEAT_FCMA, FEAT_RCPC, FEAT_RCPC2, FEAT_FRINTTS, RESERVED_FEAT_DGH, FEAT_I8MM, FEAT_BF16, RESERVED_FEAT_EBF16, RESERVED_FEAT_RPRES, FEAT_SVE, RESERVED_FEAT_SVE_BF16, RESERVED_FEAT_SVE_EBF16, RESERVED_FEAT_SVE_I8MM, FEAT_SVE_F32MM, FEAT_SVE_F64MM, FEAT_SVE2, RESERVED_FEAT_SVE_AES, FEAT_SVE_PMULL128, FEAT_SVE_BITPERM, FEAT_SVE_SHA3, FEAT_SVE_SM4, FEAT_SME, RESERVED_FEAT_MEMTAG, FEAT_MEMTAG2, RESERVED_FEAT_MEMTAG3, FEAT_SB, RESERVED_FEAT_PREDRES, RESERVED_FEAT_SSBS, FEAT_SSBS2, FEAT_BTI, RESERVED_FEAT_LS64, RESERVED_FEAT_LS64_V, RESERVED_FEAT_LS64_ACCDATA, FEAT_WFXT, FEAT_SME_F64, FEAT_SME_I64, FEAT_SME2, FEAT_RCPC3, FEAT_MOPS, FEAT_MAX, FEAT_EXT = 62 , FEAT_INIT }
enum FeatPriorities { PRIOR_RNG, PRIOR_FLAGM, PRIOR_FLAGM2, PRIOR_LSE, PRIOR_FP, PRIOR_SIMD, PRIOR_DOTPROD, PRIOR_SM4, PRIOR_RDM, PRIOR_CRC, PRIOR_SHA2, PRIOR_SHA3, PRIOR_PMULL, PRIOR_FP16, PRIOR_FP16FML, PRIOR_DIT, PRIOR_DPB, PRIOR_DPB2, PRIOR_JSCVT, PRIOR_FCMA, PRIOR_RCPC, PRIOR_RCPC2, PRIOR_RCPC3, PRIOR_FRINTTS, PRIOR_I8MM, PRIOR_BF16, PRIOR_SVE, PRIOR_SVE_F32MM, PRIOR_SVE_F64MM, PRIOR_SVE2, PRIOR_SVE_PMULL128, PRIOR_SVE_BITPERM, PRIOR_SVE_SHA3, PRIOR_SVE_SM4, PRIOR_SME, PRIOR_MEMTAG2, PRIOR_SB, PRIOR_SSBS2, PRIOR_BTI, PRIOR_WFXT, PRIOR_SME_F64, PRIOR_SME_I64, PRIOR_SME2, PRIOR_MOPS, PRIOR_CSSC }
enum ArchProfile { AProfile = 'A' , RProfile = 'R' , InvalidProfile = '?' }
enum ElementSizeType { ElementSizeMask = TSFLAG_ELEMENT_SIZE_TYPE(0x7) , ElementSizeNone = TSFLAG_ELEMENT_SIZE_TYPE(0x0) , ElementSizeB = TSFLAG_ELEMENT_SIZE_TYPE(0x1) , ElementSizeH = TSFLAG_ELEMENT_SIZE_TYPE(0x2) , ElementSizeS = TSFLAG_ELEMENT_SIZE_TYPE(0x3) , ElementSizeD = TSFLAG_ELEMENT_SIZE_TYPE(0x4) }
enum DestructiveInstType { DestructiveInstTypeMask = TSFLAG_DESTRUCTIVE_INST_TYPE(0xf) , NotDestructive = TSFLAG_DESTRUCTIVE_INST_TYPE(0x0) , DestructiveOther = TSFLAG_DESTRUCTIVE_INST_TYPE(0x1) , DestructiveUnary = TSFLAG_DESTRUCTIVE_INST_TYPE(0x2) , DestructiveBinaryImm = TSFLAG_DESTRUCTIVE_INST_TYPE(0x3) , DestructiveBinaryShImmUnpred = TSFLAG_DESTRUCTIVE_INST_TYPE(0x4) , DestructiveBinary = TSFLAG_DESTRUCTIVE_INST_TYPE(0x5) , DestructiveBinaryComm = TSFLAG_DESTRUCTIVE_INST_TYPE(0x6) , DestructiveBinaryCommWithRev = TSFLAG_DESTRUCTIVE_INST_TYPE(0x7) , DestructiveTernaryCommWithRev = TSFLAG_DESTRUCTIVE_INST_TYPE(0x8) , Destructive2xRegImmUnpred = TSFLAG_DESTRUCTIVE_INST_TYPE(0x9) , DestructiveUnaryPassthru = TSFLAG_DESTRUCTIVE_INST_TYPE(0xa) }
enum FalseLaneType { FalseLanesMask = TSFLAG_FALSE_LANE_TYPE(0x3) , FalseLanesZero = TSFLAG_FALSE_LANE_TYPE(0x1) , FalseLanesUndef = TSFLAG_FALSE_LANE_TYPE(0x2) }
enum SMEMatrixType { SMEMatrixTypeMask = TSFLAG_SME_MATRIX_TYPE(0x7) , SMEMatrixNone = TSFLAG_SME_MATRIX_TYPE(0x0) , SMEMatrixTileB = TSFLAG_SME_MATRIX_TYPE(0x1) , SMEMatrixTileH = TSFLAG_SME_MATRIX_TYPE(0x2) , SMEMatrixTileS = TSFLAG_SME_MATRIX_TYPE(0x3) , SMEMatrixTileD = TSFLAG_SME_MATRIX_TYPE(0x4) , SMEMatrixTileQ = TSFLAG_SME_MATRIX_TYPE(0x5) , SMEMatrixArray = TSFLAG_SME_MATRIX_TYPE(0x6) }
enum Rounding { RN = 0 , RP = 1 , RM = 2 , RZ = 3 , rmMask = 3 }
Possible values of current rounding mode, which is specified in bits 23:22 of FPCR. More...
enum Fixups { fixup_aarch64_pcrel_adr_imm21 = FirstTargetFixupKind , fixup_aarch64_pcrel_adrp_imm21, fixup_aarch64_add_imm12, fixup_aarch64_ldst_imm12_scale1, fixup_aarch64_ldst_imm12_scale2, fixup_aarch64_ldst_imm12_scale4, fixup_aarch64_ldst_imm12_scale8, fixup_aarch64_ldst_imm12_scale16, fixup_aarch64_ldr_pcrel_imm19, fixup_aarch64_movw, fixup_aarch64_pcrel_branch9, fixup_aarch64_pcrel_branch14, fixup_aarch64_pcrel_branch16, fixup_aarch64_pcrel_branch19, fixup_aarch64_pcrel_branch26, fixup_aarch64_pcrel_call26, LastTargetFixupKind, NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind }
enum { S_None = 0 , S_ABS = 0x001 , S_SABS = 0x002 , S_PREL = 0x003 , S_GOT = 0x004 , S_DTPREL = 0x005 , S_GOTTPREL = 0x006 , S_TPREL = 0x007 , S_TLSDESC = 0x008 , S_SECREL = 0x009 , S_AUTH = 0x00a , S_AUTHADDR = 0x00b , S_GOT_AUTH = 0x00c , S_TLSDESC_AUTH = 0x00d , S_SymLocBits = 0x00f , S_PAGE = 0x010 , S_PAGEOFF = 0x020 , S_HI12 = 0x030 , S_G0 = 0x040 , S_G1 = 0x050 , S_G2 = 0x060 , S_G3 = 0x070 , S_LO15 = 0x080 , S_AddressFragBits = 0x0f0 , S_NC = 0x100 , S_CALL = S_ABS , S_ABS_PAGE = S_ABS | S_PAGE , S_ABS_PAGE_NC = S_ABS S_PAGE S_NC , S_ABS_G3 = S_ABS S_G3 , S_ABS_G2 = S_ABS S_G2 , S_ABS_G2_S = S_SABS S_G2 , S_ABS_G2_NC = S_ABS S_G2 S_NC , S_ABS_G1 = S_ABS S_G1 , S_ABS_G1_S = S_SABS S_G1 , S_ABS_G1_NC = S_ABS S_G1 S_NC , S_ABS_G0 = S_ABS S_G0 , S_ABS_G0_S = S_SABS S_G0 , S_ABS_G0_NC = S_ABS S_G0 S_NC , S_LO12 = S_ABS S_PAGEOFF S_NC , S_PREL_G3 = S_PREL S_G3 , S_PREL_G2 = S_PREL S_G2 , S_PREL_G2_NC = S_PREL S_G2 S_NC , S_PREL_G1 = S_PREL S_G1 , S_PREL_G1_NC = S_PREL S_G1 S_NC , S_PREL_G0 = S_PREL S_G0 , S_PREL_G0_NC = S_PREL S_G0 S_NC , S_GOT_LO12 = S_GOT S_PAGEOFF S_NC , S_GOT_PAGE = S_GOT S_PAGE , S_GOT_PAGE_LO15 = S_GOT S_LO15 S_NC , S_GOT_AUTH_LO12 = S_GOT_AUTH S_PAGEOFF S_NC , S_GOT_AUTH_PAGE = S_GOT_AUTH S_PAGE , S_DTPREL_G2 = S_DTPREL S_G2 , S_DTPREL_G1 = S_DTPREL S_G1 , S_DTPREL_G1_NC = S_DTPREL S_G1 S_NC , S_DTPREL_G0 = S_DTPREL S_G0 , S_DTPREL_G0_NC = S_DTPREL S_G0 S_NC , S_DTPREL_HI12 = S_DTPREL S_HI12 , S_DTPREL_LO12 = S_DTPREL S_PAGEOFF , S_DTPREL_LO12_NC = S_DTPREL S_PAGEOFF S_NC , S_GOTTPREL_PAGE = S_GOTTPREL S_PAGE , S_GOTTPREL_LO12_NC = S_GOTTPREL S_PAGEOFF S_NC , S_GOTTPREL_G1 = S_GOTTPREL S_G1 , S_GOTTPREL_G0_NC = S_GOTTPREL S_G0 S_NC , S_TPREL_G2 = S_TPREL S_G2 , S_TPREL_G1 = S_TPREL S_G1 , S_TPREL_G1_NC = S_TPREL S_G1 S_NC , S_TPREL_G0 = S_TPREL S_G0 , S_TPREL_G0_NC = S_TPREL S_G0 S_NC , S_TPREL_HI12 = S_TPREL S_HI12 , S_TPREL_LO12 = S_TPREL S_PAGEOFF , S_TPREL_LO12_NC = S_TPREL S_PAGEOFF S_NC , S_TLSDESC_LO12 = S_TLSDESC S_PAGEOFF , S_TLSDESC_PAGE = S_TLSDESC S_PAGE , S_TLSDESC_AUTH_LO12 = S_TLSDESC_AUTH S_PAGEOFF , S_TLSDESC_AUTH_PAGE = S_TLSDESC_AUTH S_PAGE , S_SECREL_LO12 = S_SECREL S_PAGEOFF , S_SECREL_HI12 = S_SECREL S_HI12 , S_PLT = 0x400 , S_GOTPCREL, S_FUNCINIT, S_MACHO_GOT, S_MACHO_GOTPAGE, S_MACHO_GOTPAGEOFF, S_MACHO_PAGE, S_MACHO_PAGEOFF, S_MACHO_TLVP, S_MACHO_TLVPPAGE, S_MACHO_TLVPPAGEOFF, S_INVALID = 0xfff }
enum OperandType { OPERAND_IMPLICIT_IMM_0 = MCOI::OPERAND_FIRST_TARGET , OPERAND_SHIFT_MSL }
Functions
LLVM_ABI const std::vector< FMVInfo > & getFMVInfo ()
LLVM_ABI const ExtensionInfo & getExtensionByID (ArchExtKind(ExtID))
LLVM_ABI bool getExtensionFeatures (const AArch64::ExtensionBitset &Extensions, std::vector< StringRef > &Features)
LLVM_ABI StringRef getArchExtFeature (StringRef ArchExt)
LLVM_ABI StringRef resolveCPUAlias (StringRef CPU)
LLVM_ABI const ArchInfo * getArchForCpu (StringRef CPU)
LLVM_ABI const ArchInfo * parseArch (StringRef Arch)
LLVM_ABI std::optional< ExtensionInfo > targetFeatureToExtension (StringRef TargetFeature)
LLVM_ABI std::optional< ExtensionInfo > parseArchExtension (StringRef Extension)
LLVM_ABI std::optional< FMVInfo > parseFMVExtension (StringRef Extension)
LLVM_ABI std::optional< CpuInfo > parseCpu (StringRef Name)
LLVM_ABI void fillValidCPUArchList (SmallVectorImpl< StringRef > &Values)
LLVM_ABI bool isX18ReservedByDefault (const Triple &TT)
LLVM_ABI APInt getFMVPriority (ArrayRef< StringRef > Features)
LLVM_ABI APInt getCpuSupportsMask (ArrayRef< StringRef > Features)
LLVM_ABI void PrintSupportedExtensions ()
LLVM_ABI void printEnabledExtensions (const std::set< StringRef > &EnabledFeatureNames)
int getSVEPseudoMap (uint16_t Opcode)
int getSVERevInstr (uint16_t Opcode)
int getSVENonRevInstr (uint16_t Opcode)
int getSMEPseudoMap (uint16_t Opcode)
ArrayRef< MCPhysReg > getGPRArgRegs ()
ArrayRef< MCPhysReg > getFPRArgRegs ()
FastISel * createFastISel (FunctionLoweringInfo &funcInfo, const TargetLibraryInfo *libInfo)
StringRef getSpecifierName (Specifier S)
Return the string representation of the ELF relocation specifier (e.g.
Specifier getSymbolLoc (Specifier S)
Specifier getAddressFrag (Specifier S)
bool isNotChecked (Specifier S)
Variables
static const uint64_t InstrFlagIsWhile = TSFLAG_INSTR_FLAGS(0x1)
static const uint64_t InstrFlagIsPTestLike = TSFLAG_INSTR_FLAGS(0x2)
const unsigned RoundingBitsPos = 22
const uint64_t ReservedFPControlBits = 0xfffffffff80040f8
const unsigned StackProbeMaxUnprobedStack = 1024
Maximum allowed number of unprobed bytes above SP at an ABI boundary.
const unsigned StackProbeMaxLoopUnroll = 4
Maximum number of iterations to unroll for a constant size probing loop.
static constexpr unsigned SVEBitsPerBlock = 128
static constexpr unsigned SVEMaxBitsPerVector = 2048

ExtensionBitset

Specifier

anonymous enum

Enumerator
S_None
S_ABS
S_SABS
S_PREL
S_GOT
S_DTPREL
S_GOTTPREL
S_TPREL
S_TLSDESC
S_SECREL
S_AUTH
S_AUTHADDR
S_GOT_AUTH
S_TLSDESC_AUTH
S_SymLocBits
S_PAGE
S_PAGEOFF
S_HI12
S_G0
S_G1
S_G2
S_G3
S_LO15
S_AddressFragBits
S_NC
S_CALL
S_ABS_PAGE
S_ABS_PAGE_NC
S_ABS_G3
S_ABS_G2
S_ABS_G2_S
S_ABS_G2_NC
S_ABS_G1
S_ABS_G1_S
S_ABS_G1_NC
S_ABS_G0
S_ABS_G0_S
S_ABS_G0_NC
S_LO12
S_PREL_G3
S_PREL_G2
S_PREL_G2_NC
S_PREL_G1
S_PREL_G1_NC
S_PREL_G0
S_PREL_G0_NC
S_GOT_LO12
S_GOT_PAGE
S_GOT_PAGE_LO15
S_GOT_AUTH_LO12
S_GOT_AUTH_PAGE
S_DTPREL_G2
S_DTPREL_G1
S_DTPREL_G1_NC
S_DTPREL_G0
S_DTPREL_G0_NC
S_DTPREL_HI12
S_DTPREL_LO12
S_DTPREL_LO12_NC
S_GOTTPREL_PAGE
S_GOTTPREL_LO12_NC
S_GOTTPREL_G1
S_GOTTPREL_G0_NC
S_TPREL_G2
S_TPREL_G1
S_TPREL_G1_NC
S_TPREL_G0
S_TPREL_G0_NC
S_TPREL_HI12
S_TPREL_LO12
S_TPREL_LO12_NC
S_TLSDESC_LO12
S_TLSDESC_PAGE
S_TLSDESC_AUTH_LO12
S_TLSDESC_AUTH_PAGE
S_SECREL_LO12
S_SECREL_HI12
S_PLT
S_GOTPCREL
S_FUNCINIT
S_MACHO_GOT
S_MACHO_GOTPAGE
S_MACHO_GOTPAGEOFF
S_MACHO_PAGE
S_MACHO_PAGEOFF
S_MACHO_TLVP
S_MACHO_TLVPPAGE
S_MACHO_TLVPPAGEOFF
S_INVALID

Definition at line 66 of file AArch64MCAsmInfo.h.

ArchProfile

CPUFeatures

Enumerator
FEAT_RNG
FEAT_FLAGM
FEAT_FLAGM2
FEAT_FP16FML
FEAT_DOTPROD
FEAT_SM4
FEAT_RDM
FEAT_LSE
FEAT_FP
FEAT_SIMD
FEAT_CRC
FEAT_CSSC
FEAT_SHA2
FEAT_SHA3
RESERVED_FEAT_AES
FEAT_PMULL
FEAT_FP16
FEAT_DIT
FEAT_DPB
FEAT_DPB2
FEAT_JSCVT
FEAT_FCMA
FEAT_RCPC
FEAT_RCPC2
FEAT_FRINTTS
RESERVED_FEAT_DGH
FEAT_I8MM
FEAT_BF16
RESERVED_FEAT_EBF16
RESERVED_FEAT_RPRES
FEAT_SVE
RESERVED_FEAT_SVE_BF16
RESERVED_FEAT_SVE_EBF16
RESERVED_FEAT_SVE_I8MM
FEAT_SVE_F32MM
FEAT_SVE_F64MM
FEAT_SVE2
RESERVED_FEAT_SVE_AES
FEAT_SVE_PMULL128
FEAT_SVE_BITPERM
FEAT_SVE_SHA3
FEAT_SVE_SM4
FEAT_SME
RESERVED_FEAT_MEMTAG
FEAT_MEMTAG2
RESERVED_FEAT_MEMTAG3
FEAT_SB
RESERVED_FEAT_PREDRES
RESERVED_FEAT_SSBS
FEAT_SSBS2
FEAT_BTI
RESERVED_FEAT_LS64
RESERVED_FEAT_LS64_V
RESERVED_FEAT_LS64_ACCDATA
FEAT_WFXT
FEAT_SME_F64
FEAT_SME_I64
FEAT_SME2
FEAT_RCPC3
FEAT_MOPS
FEAT_MAX
FEAT_EXT
FEAT_INIT

Definition at line 25 of file AArch64TargetParser.h.

DestructiveInstType

Enumerator
DestructiveInstTypeMask
NotDestructive
DestructiveOther
DestructiveUnary
DestructiveBinaryImm
DestructiveBinaryShImmUnpred
DestructiveBinary
DestructiveBinaryComm
DestructiveBinaryCommWithRev
DestructiveTernaryCommWithRev
Destructive2xRegImmUnpred
DestructiveUnaryPassthru

Definition at line 828 of file AArch64InstrInfo.h.

ElementSizeType

Enumerator
ElementSizeMask
ElementSizeNone
ElementSizeB
ElementSizeH
ElementSizeS
ElementSizeD

Definition at line 819 of file AArch64InstrInfo.h.

FalseLaneType

Enumerator
FalseLanesMask
FalseLanesZero
FalseLanesUndef

Definition at line 843 of file AArch64InstrInfo.h.

FeatPriorities

Enumerator
PRIOR_RNG
PRIOR_FLAGM
PRIOR_FLAGM2
PRIOR_LSE
PRIOR_FP
PRIOR_SIMD
PRIOR_DOTPROD
PRIOR_SM4
PRIOR_RDM
PRIOR_CRC
PRIOR_SHA2
PRIOR_SHA3
PRIOR_PMULL
PRIOR_FP16
PRIOR_FP16FML
PRIOR_DIT
PRIOR_DPB
PRIOR_DPB2
PRIOR_JSCVT
PRIOR_FCMA
PRIOR_RCPC
PRIOR_RCPC2
PRIOR_RCPC3
PRIOR_FRINTTS
PRIOR_I8MM
PRIOR_BF16
PRIOR_SVE
PRIOR_SVE_F32MM
PRIOR_SVE_F64MM
PRIOR_SVE2
PRIOR_SVE_PMULL128
PRIOR_SVE_BITPERM
PRIOR_SVE_SHA3
PRIOR_SVE_SM4
PRIOR_SME
PRIOR_MEMTAG2
PRIOR_SB
PRIOR_SSBS2
PRIOR_BTI
PRIOR_WFXT
PRIOR_SME_F64
PRIOR_SME_I64
PRIOR_SME2
PRIOR_MOPS
PRIOR_CSSC

Definition at line 18 of file AArch64TargetParser.h.

Fixups

Enumerator
fixup_aarch64_pcrel_adr_imm21
fixup_aarch64_pcrel_adrp_imm21
fixup_aarch64_add_imm12
fixup_aarch64_ldst_imm12_scale1
fixup_aarch64_ldst_imm12_scale2
fixup_aarch64_ldst_imm12_scale4
fixup_aarch64_ldst_imm12_scale8
fixup_aarch64_ldst_imm12_scale16
fixup_aarch64_ldr_pcrel_imm19
fixup_aarch64_movw
fixup_aarch64_pcrel_branch9
fixup_aarch64_pcrel_branch14
fixup_aarch64_pcrel_branch16
fixup_aarch64_pcrel_branch19
fixup_aarch64_pcrel_branch26
fixup_aarch64_pcrel_call26
LastTargetFixupKind
NumTargetFixupKinds

Definition at line 17 of file AArch64FixupKinds.h.

OperandType

Rounding

Possible values of current rounding mode, which is specified in bits 23:22 of FPCR.

Enumerator
RN
RP
RM
RZ
rmMask

Definition at line 31 of file AArch64ISelLowering.h.

SMEMatrixType

Enumerator
SMEMatrixTypeMask
SMEMatrixNone
SMEMatrixTileB
SMEMatrixTileH
SMEMatrixTileS
SMEMatrixTileD
SMEMatrixTileQ
SMEMatrixArray

Definition at line 853 of file AArch64InstrInfo.h.

createFastISel()

fillValidCPUArchList()

getAddressFrag()

Specifier llvm::AArch64::getAddressFrag ( Specifier S) inline

getArchExtFeature()

getArchForCpu()

getCpuSupportsMask()

getExtensionByID()

getExtensionFeatures()

getFMVInfo()

getFMVPriority()

getFPRArgRegs()

getGPRArgRegs()

getSMEPseudoMap()

int llvm::AArch64::getSMEPseudoMap ( uint16_t Opcode )

getSpecifierName()

Return the string representation of the ELF relocation specifier (e.g.

":got:", ":lo12:").

Definition at line 57 of file AArch64MCAsmInfo.cpp.

References llvm_unreachable, S_ABS_G0, S_ABS_G0_NC, S_ABS_G0_S, S_ABS_G1, S_ABS_G1_NC, S_ABS_G1_S, S_ABS_G2, S_ABS_G2_NC, S_ABS_G2_S, S_ABS_G3, S_ABS_PAGE, S_ABS_PAGE_NC, S_CALL, S_DTPREL_G0, S_DTPREL_G0_NC, S_DTPREL_G1, S_DTPREL_G1_NC, S_DTPREL_G2, S_DTPREL_HI12, S_DTPREL_LO12, S_DTPREL_LO12_NC, S_GOT, S_GOT_AUTH, S_GOT_AUTH_LO12, S_GOT_AUTH_PAGE, S_GOT_LO12, S_GOT_PAGE, S_GOT_PAGE_LO15, S_GOTTPREL, S_GOTTPREL_G0_NC, S_GOTTPREL_G1, S_GOTTPREL_LO12_NC, S_GOTTPREL_PAGE, S_LO12, S_PREL_G0, S_PREL_G0_NC, S_PREL_G1, S_PREL_G1_NC, S_PREL_G2, S_PREL_G2_NC, S_PREL_G3, S_SECREL_HI12, S_SECREL_LO12, S_TLSDESC, S_TLSDESC_AUTH, S_TLSDESC_AUTH_LO12, S_TLSDESC_AUTH_PAGE, S_TLSDESC_LO12, S_TLSDESC_PAGE, S_TPREL_G0, S_TPREL_G0_NC, S_TPREL_G1, S_TPREL_G1_NC, S_TPREL_G2, S_TPREL_HI12, S_TPREL_LO12, and S_TPREL_LO12_NC.

Referenced by llvm::AArch64MCAsmInfoDarwin::printSpecifierExpr(), llvm::AArch64MCAsmInfoELF::printSpecifierExpr(), llvm::AArch64MCAsmInfoGNUCOFF::printSpecifierExpr(), and llvm::AArch64MCAsmInfoMicrosoftCOFF::printSpecifierExpr().

getSVENonRevInstr()

int llvm::AArch64::getSVENonRevInstr ( uint16_t Opcode )

getSVEPseudoMap()

int llvm::AArch64::getSVEPseudoMap ( uint16_t Opcode )

getSVERevInstr()

int llvm::AArch64::getSVERevInstr ( uint16_t Opcode )

getSymbolLoc()

Specifier llvm::AArch64::getSymbolLoc ( Specifier S) inline

isNotChecked()

bool llvm::AArch64::isNotChecked ( Specifier S) inline

isX18ReservedByDefault()

parseArch()

parseArchExtension()

parseCpu()

parseFMVExtension()

printEnabledExtensions()

void llvm::AArch64::printEnabledExtensions ( const std::set< StringRef > & EnabledFeatureNames )

PrintSupportedExtensions()

void llvm::AArch64::PrintSupportedExtensions ( )

resolveCPUAlias()

targetFeatureToExtension()

InstrFlagIsPTestLike

InstrFlagIsWhile

ReservedFPControlBits

const uint64_t llvm::AArch64::ReservedFPControlBits = 0xfffffffff80040f8

RoundingBitsPos

StackProbeMaxLoopUnroll

Maximum number of iterations to unroll for a constant size probing loop.

Definition at line 54 of file AArch64ISelLowering.h.

StackProbeMaxUnprobedStack

SVEBitsPerBlock

unsigned llvm::AArch64::SVEBitsPerBlock = 128 staticconstexpr

Definition at line 1024 of file AArch64BaseInfo.h.

Referenced by findMoreOptimalIndexType(), GenerateFixedLengthSVETBL(), llvm::AArch64TTIImpl::getCastInstrCost(), getHistogramCost(), getPackedVectorTypeFromPredicateType(), llvm::AArch64TTIImpl::getShuffleCost(), instCombineSVECmpNE(), isAllActivePredicate(), isPackedVectorType(), isUnpackedVectorVT(), LowerSVEIntrinsicEXT(), performGatherLoadCombine(), performLD1Combine(), performScatterStoreCombine(), and llvm::AArch64Subtarget::useSVEForFixedLengthVectors().

SVEMaxBitsPerVector

unsigned llvm::AArch64::SVEMaxBitsPerVector = 2048 staticconstexpr