LLVM: llvm::FastISel Class Reference (original) (raw)

This is a fast-path instruction selection class that generates poor code and doesn't support illegal types or non-trivial lowering, but runs quickly. More...

#include "[llvm/CodeGen/FastISel.h](FastISel%5F8h%5Fsource.html)"

Public Member Functions
virtual	~FastISel ()
MachineInstr *	getLastLocalValue ()
	Return the position of the last instruction emitted for materializing constants for use in the current block.
void	setLastLocalValue (MachineInstr *I)
	Update the position of the last instruction emitted for materializing constants for use in the current block.
void	startNewBlock ()
	Set the current block to which generated machine instructions will be appended.
void	finishBasicBlock ()
	Flush the local value map.
DebugLoc	getCurDebugLoc () const
	Return current debug location information.
bool	lowerArguments ()
	Do "fast" instruction selection for function arguments and append the machine instructions to the current block.
bool	selectInstruction (const Instruction *I)
	Do "fast" instruction selection for the given LLVM IR instruction and append the generated machine instructions to the current block.
bool	selectOperator (const User *I, unsigned Opcode)
	Do "fast" instruction selection for the given LLVM IR operator (Instruction or ConstantExpr), and append generated machine instructions to the current block.
Register	getRegForValue (const Value *V)
	Create a virtual register and arrange for it to be assigned the value for the given LLVM value.
Register	lookUpRegForValue (const Value *V)
	Look up the value to see if its value is already cached in a register.
Register	getRegForGEPIndex (MVT PtrVT, const Value *Idx)
	This is a wrapper around getRegForValue that also takes care of truncating or sign-extending the given getelementptr index value.
bool	tryToFoldLoad (const LoadInst LI, const Instruction FoldInst)
	We're checking to see if we can fold LI into FoldInst.
virtual bool	tryToFoldLoadIntoMI (MachineInstr , unsigned, const LoadInst )
	The specified machine instr operand is a vreg, and that vreg is being provided by the specified load instruction.
void	recomputeInsertPt ()
	Reset InsertPt to prepare for inserting instructions into the current block.
void	removeDeadCode (MachineBasicBlock::iterator I, MachineBasicBlock::iterator E)
	Remove all dead instructions between the I and E.
SavePoint	enterLocalValueArea ()
	Prepare InsertPt to begin inserting instructions into the local value area and return the old insert position.
void	leaveLocalValueArea (SavePoint Old)
	Reset InsertPt to the given old insert position.
void	handleDbgInfo (const Instruction *II)
	Target-independent lowering of non-instruction debug info associated with this instruction.

Protected Member Functions
	FastISel (FunctionLoweringInfo &FuncInfo, const TargetLibraryInfo *LibInfo, bool SkipTargetIndependentISel=false)
virtual bool	fastSelectInstruction (const Instruction *I)=0
	This method is called by target-independent code when the normal FastISel process fails to select an instruction.
virtual bool	fastLowerArguments ()
	This method is called by target-independent code to do target- specific argument lowering.
virtual bool	fastLowerCall (CallLoweringInfo &CLI)
	This method is called by target-independent code to do target- specific call lowering.
virtual bool	fastLowerIntrinsicCall (const IntrinsicInst *II)
	This method is called by target-independent code to do target- specific intrinsic lowering.
virtual Register	fastEmit_ (MVT VT, MVT RetVT, unsigned Opcode)
	This method is called by target-independent code to request that an instruction with the given type and opcode be emitted.
virtual Register	fastEmit_r (MVT VT, MVT RetVT, unsigned Opcode, Register Op0)
	This method is called by target-independent code to request that an instruction with the given type, opcode, and register operand be emitted.
virtual Register	fastEmit_rr (MVT VT, MVT RetVT, unsigned Opcode, Register Op0, Register Op1)
	This method is called by target-independent code to request that an instruction with the given type, opcode, and register operands be emitted.
virtual Register	fastEmit_ri (MVT VT, MVT RetVT, unsigned Opcode, Register Op0, uint64_t Imm)
	This method is called by target-independent code to request that an instruction with the given type, opcode, and register and immediate operands be emitted.
Register	fastEmit_ri_ (MVT VT, unsigned Opcode, Register Op0, uint64_t Imm, MVT ImmType)
	This method is a wrapper of fastEmit_ri.
virtual Register	fastEmit_i (MVT VT, MVT RetVT, unsigned Opcode, uint64_t Imm)
	This method is called by target-independent code to request that an instruction with the given type, opcode, and immediate operand be emitted.
virtual Register	fastEmit_f (MVT VT, MVT RetVT, unsigned Opcode, const ConstantFP *FPImm)
	This method is called by target-independent code to request that an instruction with the given type, opcode, and floating-point immediate operand be emitted.
Register	fastEmitInst_ (unsigned MachineInstOpcode, const TargetRegisterClass *RC)
	Emit a MachineInstr with no operands and a result register in the given register class.
Register	fastEmitInst_r (unsigned MachineInstOpcode, const TargetRegisterClass *RC, Register Op0)
	Emit a MachineInstr with one register operand and a result register in the given register class.
Register	fastEmitInst_rr (unsigned MachineInstOpcode, const TargetRegisterClass *RC, Register Op0, Register Op1)
	Emit a MachineInstr with two register operands and a result register in the given register class.
Register	fastEmitInst_rrr (unsigned MachineInstOpcode, const TargetRegisterClass *RC, Register Op0, Register Op1, Register Op2)
	Emit a MachineInstr with three register operands and a result register in the given register class.
Register	fastEmitInst_ri (unsigned MachineInstOpcode, const TargetRegisterClass *RC, Register Op0, uint64_t Imm)
	Emit a MachineInstr with a register operand, an immediate, and a result register in the given register class.
Register	fastEmitInst_rii (unsigned MachineInstOpcode, const TargetRegisterClass *RC, Register Op0, uint64_t Imm1, uint64_t Imm2)
	Emit a MachineInstr with one register operand and two immediate operands.
Register	fastEmitInst_f (unsigned MachineInstOpcode, const TargetRegisterClass RC, const ConstantFP FPImm)
	Emit a MachineInstr with a floating point immediate, and a result register in the given register class.
Register	fastEmitInst_rri (unsigned MachineInstOpcode, const TargetRegisterClass *RC, Register Op0, Register Op1, uint64_t Imm)
	Emit a MachineInstr with two register operands, an immediate, and a result register in the given register class.
Register	fastEmitInst_i (unsigned MachineInstOpcode, const TargetRegisterClass *RC, uint64_t Imm)
	Emit a MachineInstr with a single immediate operand, and a result register in the given register class.
Register	fastEmitInst_extractsubreg (MVT RetVT, Register Op0, uint32_t Idx)
	Emit a MachineInstr for an extract_subreg from a specified index of a superregister to a specified type.
Register	fastEmitZExtFromI1 (MVT VT, Register Op0)
	Emit MachineInstrs to compute the value of Op with all but the least significant bit set to zero.
void	fastEmitBranch (MachineBasicBlock *MSucc, const DebugLoc &DbgLoc)
	Emit an unconditional branch to the given block, unless it is the immediate (fall-through) successor, and update the CFG.
void	finishCondBranch (const BasicBlock BranchBB, MachineBasicBlock TrueMBB, MachineBasicBlock *FalseMBB)
	Emit an unconditional branch to FalseMBB, obtains the branch weight and adds TrueMBB and FalseMBB to the successor list.
void	updateValueMap (const Value *I, Register Reg, unsigned NumRegs=1)
	Update the value map to include the new mapping for this instruction, or insert an extra copy to get the result in a previous determined register.
Register	createResultReg (const TargetRegisterClass *RC)
Register	constrainOperandRegClass (const MCInstrDesc &II, Register Op, unsigned OpNum)
	Try to constrain Op so that it is usable by argument OpNum of the provided MCInstrDesc.
virtual Register	fastMaterializeConstant (const Constant *C)
	Emit a constant in a register using target-specific logic, such as constant pool loads.
virtual Register	fastMaterializeAlloca (const AllocaInst *C)
	Emit an alloca address in a register using target-specific logic.
virtual Register	fastMaterializeFloatZero (const ConstantFP *CF)
	Emit the floating-point constant +0.0 in a register using target- specific logic.
bool	canFoldAddIntoGEP (const User GEP, const Value Add)
	Check if Add is an add that can be safely folded into GEP.
MachineMemOperand *	createMachineMemOperandFor (const Instruction *I) const
	Create a machine mem operand from the given instruction.
CmpInst::Predicate	optimizeCmpPredicate (const CmpInst *CI) const
bool	lowerCallTo (const CallInst CI, MCSymbol Symbol, unsigned NumArgs)
bool	lowerCallTo (const CallInst CI, const char SymName, unsigned NumArgs)
bool	lowerCallTo (CallLoweringInfo &CLI)
bool	lowerCall (const CallInst *I)
bool	selectBinaryOp (const User *I, unsigned ISDOpcode)
	Select and emit code for a binary operator instruction, which has an opcode which directly corresponds to the given ISD opcode.
bool	selectFNeg (const User I, const Value In)
	Emit an FNeg operation.
bool	selectGetElementPtr (const User *I)
bool	selectStackmap (const CallInst *I)
bool	selectPatchpoint (const CallInst *I)
bool	selectCall (const User *I)
bool	selectIntrinsicCall (const IntrinsicInst *II)
bool	selectBitCast (const User *I)
bool	selectFreeze (const User *I)
bool	selectCast (const User *I, unsigned Opcode)
bool	selectExtractValue (const User *U)
bool	selectXRayCustomEvent (const CallInst *II)
bool	selectXRayTypedEvent (const CallInst *II)
bool	shouldOptForSize (const MachineFunction *MF) const
virtual bool	lowerDbgValue (const Value V, DIExpression Expr, DILocalVariable *Var, const DebugLoc &DL)
	Target-independent lowering of debug information.
virtual bool	lowerDbgDeclare (const Value V, DIExpression Expr, DILocalVariable *Var, const DebugLoc &DL)
	Target-independent lowering of debug information.

Protected Attributes
DenseMap< const Value *, Register >	LocalValueMap
FunctionLoweringInfo &	FuncInfo
MachineFunction *	MF
MachineRegisterInfo &	MRI
MachineFrameInfo &	MFI
MachineConstantPool &	MCP
MIMetadata	MIMD
const TargetMachine &	TM
const DataLayout &	DL
const TargetInstrInfo &	TII
const TargetLowering &	TLI
const TargetRegisterInfo &	TRI
const TargetLibraryInfo *	LibInfo
bool	SkipTargetIndependentISel
MachineInstr *	LastLocalValue = nullptr
	The position of the last instruction for materializing constants for use in the current block.
MachineInstr *	EmitStartPt = nullptr
	The top most instruction in the current block that is allowed for emitting local variables.

This is a fast-path instruction selection class that generates poor code and doesn't support illegal types or non-trivial lowering, but runs quickly.

Definition at line 66 of file FastISel.h.

◆ ArgListEntry

◆ ArgListTy

◆ SavePoint

FastISel::~FastISel ( )	virtualdefault

◆ FastISel()

Definition at line 1876 of file FastISel.cpp.

References DL, FuncInfo, LibInfo, MCP, MF, MFI, MRI, SkipTargetIndependentISel, TII, TLI, TM, and TRI.

◆ canFoldAddIntoGEP()

◆ constrainOperandRegClass()

Try to constrain Op so that it is usable by argument OpNum of the provided MCInstrDesc.

If this fails, create a new virtual register in the correct class and COPY the value there.

Definition at line 1965 of file FastISel.cpp.

References llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), createResultReg(), FuncInfo, II, MIMD, MRI, and TII.

Referenced by fastEmitInst_r(), fastEmitInst_ri(), fastEmitInst_rii(), fastEmitInst_rr(), fastEmitInst_rri(), and fastEmitInst_rrr().

◆ createMachineMemOperandFor()

Create a machine mem operand from the given instruction.

Definition at line 2336 of file FastISel.cpp.

References DL, llvm::dyn_cast(), FuncInfo, llvm::Value::getType(), I, llvm::MachineMemOperand::MODereferenceable, llvm::MachineMemOperand::MOInvariant, llvm::MachineMemOperand::MOLoad, llvm::MachineMemOperand::MONonTemporal, llvm::MachineMemOperand::MOStore, llvm::MachineMemOperand::MOVolatile, and Size.

◆ createResultReg()

Definition at line 1961 of file FastISel.cpp.

References MRI.

◆ enterLocalValueArea()

FastISel::SavePoint FastISel::enterLocalValueArea	(	)

◆ fastEmit_()

This method is called by target-independent code to request that an instruction with the given type and opcode be emitted.

Definition at line 1897 of file FastISel.cpp.

References Register.

Referenced by selectOperator().

◆ fastEmit_f()

This method is called by target-independent code to request that an instruction with the given type, opcode, and floating-point immediate operand be emitted.

Definition at line 1912 of file FastISel.cpp.

References Register.

◆ fastEmit_i()

This method is called by target-independent code to request that an instruction with the given type, opcode, and immediate operand be emitted.

Definition at line 1908 of file FastISel.cpp.

References Register.

Referenced by fastEmit_ri_().

◆ fastEmit_r()

◆ fastEmit_ri()

◆ fastEmit_ri_()

This method is a wrapper of fastEmit_ri.

It first tries to emit an instruction with an immediate operand using fastEmit_ri. If that fails, it materializes the immediate into a register and try fastEmit_rr instead.

Definition at line 1926 of file FastISel.cpp.

References llvm::ISD::Constant, fastEmit_i(), fastEmit_ri(), fastEmit_rr(), FuncInfo, llvm::IntegerType::get(), getRegForValue(), llvm::MVT::getSizeInBits(), llvm::isPowerOf2_64(), llvm::Log2_64(), llvm::ISD::MUL, Register, llvm::ISD::SHL, llvm::ISD::SRA, llvm::ISD::SRL, and llvm::ISD::UDIV.

Referenced by selectBinaryOp(), selectFNeg(), and selectGetElementPtr().

◆ fastEmit_rr()

◆ fastEmitBranch()

◆ fastEmitInst_()

◆ fastEmitInst_extractsubreg()

Emit a MachineInstr for an extract_subreg from a specified index of a superregister to a specified type.

Definition at line 2173 of file FastISel.cpp.

References llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), createResultReg(), FuncInfo, llvm::Register::isVirtual(), MIMD, MRI, TII, TLI, and TRI.

◆ fastEmitInst_f()

◆ fastEmitInst_i()

◆ fastEmitInst_r()

◆ fastEmitInst_ri()

Emit a MachineInstr with a register operand, an immediate, and a result register in the given register class.

Definition at line 2062 of file FastISel.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), constrainOperandRegClass(), createResultReg(), FuncInfo, II, MIMD, and TII.

◆ fastEmitInst_rii()

◆ fastEmitInst_rr()

◆ fastEmitInst_rri()

Emit a MachineInstr with two register operands, an immediate, and a result register in the given register class.

Definition at line 2130 of file FastISel.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), constrainOperandRegClass(), createResultReg(), FuncInfo, II, MIMD, and TII.

◆ fastEmitInst_rrr()

◆ fastEmitZExtFromI1()

◆ fastLowerArguments()

bool FastISel::fastLowerArguments ( )	protectedvirtual

This method is called by target-independent code to do target- specific argument lowering.

It returns true if it was successful.

Definition at line 1889 of file FastISel.cpp.

Referenced by lowerArguments().

◆ fastLowerCall()

This method is called by target-independent code to do target- specific call lowering.

It returns true if it was successful.

Definition at line 1891 of file FastISel.cpp.

Referenced by lowerCallTo().

◆ fastLowerIntrinsicCall()

This method is called by target-independent code to do target- specific intrinsic lowering.

It returns true if it was successful.

Definition at line 1893 of file FastISel.cpp.

Referenced by selectIntrinsicCall().

◆ fastMaterializeAlloca()

◆ fastMaterializeConstant()

◆ fastMaterializeFloatZero()

Emit the floating-point constant +0.0 in a register using target- specific logic.

Definition at line 484 of file FastISel.h.

References Register.

◆ fastSelectInstruction()

This method is called by target-independent code when the normal FastISel process fails to select an instruction.

This gives targets a chance to emit code for anything that doesn't fit into FastISel's framework. It returns true if it was successful.

References I, II, and Reg.

Referenced by selectInstruction().

◆ finishBasicBlock()

void FastISel::finishBasicBlock	(	)

◆ finishCondBranch()

◆ getCurDebugLoc()

DebugLoc llvm::FastISel::getCurDebugLoc ( ) const	inline

Return current debug location information.

Definition at line 250 of file FastISel.h.

References MIMD.

◆ getLastLocalValue()

◆ getRegForGEPIndex()

◆ getRegForValue()

Create a virtual register and arrange for it to be assigned the value for the given LLVM value.

Definition at line 239 of file FastISel.cpp.

References llvm::cast(), DL, enterLocalValueArea(), FuncInfo, llvm::EVT::getSimpleVT(), llvm::isa(), llvm::EVT::isSimple(), leaveLocalValueArea(), lookUpRegForValue(), Register, and TLI.

Referenced by fastEmit_ri_(), getRegForGEPIndex(), lowerDbgValue(), selectBinaryOp(), selectBitCast(), selectCast(), selectFNeg(), selectFreeze(), selectGetElementPtr(), selectIntrinsicCall(), selectOperator(), selectPatchpoint(), selectXRayCustomEvent(), selectXRayTypedEvent(), and tryToFoldLoad().

◆ handleDbgInfo()

Target-independent lowering of non-instruction debug info associated with this instruction.

Definition at line 1188 of file FastISel.cpp.

References llvm::MachineInstrBuilder::addMetadata(), assert(), llvm::DbgVariableRecord::Assign, llvm::BuildMI(), llvm::cast(), llvm::dbgs(), llvm::DbgVariableRecord::Declare, llvm::dyn_cast(), FuncInfo, llvm::DbgRecord::getDebugLoc(), llvm::DbgVariableRecord::getExpression(), llvm::DbgVariableRecord::getType(), llvm::DbgVariableRecord::getVariable(), llvm::DbgVariableRecord::getVariableLocationOp(), llvm::DbgVariableRecord::hasArgList(), II, LLVM_DEBUG, lowerDbgDeclare(), lowerDbgValue(), MIMD, recomputeInsertPt(), llvm::reverse(), TII, and llvm::DbgVariableRecord::Value.

◆ leaveLocalValueArea()

void FastISel::leaveLocalValueArea	(	SavePoint	Old	)

◆ lookUpRegForValue()

◆ lowerArguments()

bool FastISel::lowerArguments	(	)

◆ lowerCall()

Definition at line 1110 of file FastISel.cpp.

References llvm::CallBase::arg_begin(), llvm::CallBase::arg_end(), llvm::CallBase::arg_size(), llvm::diagnoseDontCall(), llvm::CallBase::getCalledOperand(), llvm::CallBase::getFunctionType(), llvm::Value::getType(), llvm::isInTailCallPosition(), llvm::CallInst::isMustTailCall(), llvm::CallInst::isTailCall(), lowerCallTo(), MF, llvm::FastISel::CallLoweringInfo::setCallee(), llvm::FastISel::CallLoweringInfo::setTailCall(), and TM.

Referenced by selectCall().

◆ lowerCallTo() [1/3]

Definition at line 991 of file FastISel.cpp.

◆ lowerCallTo() [2/3]

◆ lowerCallTo() [3/3]

Definition at line 964 of file FastISel.cpp.

References assert(), llvm::CallBase::getCallingConv(), llvm::CallBase::getFunctionType(), llvm::User::getOperand(), llvm::Value::getType(), lowerCallTo(), MF, llvm::FastISel::CallLoweringInfo::setCallee(), and TLI.

Referenced by lowerCall(), lowerCallTo(), and lowerCallTo().

◆ lowerDbgDeclare()

Target-independent lowering of debug information.

Returns false if the debug information couldn't be lowered and was instead discarded.

Definition at line 1318 of file FastISel.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, llvm::Address, assert(), llvm::BuildMI(), llvm::cast(), llvm::MachineOperand::CreateReg(), llvm::dbgs(), DL, llvm::dwarf::DW_OP_LLVM_arg, FuncInfo, llvm::isa(), llvm::DILocalVariable::isValidLocationForIntrinsic(), LLVM_DEBUG, lookUpRegForValue(), llvm::DIExpression::prependOpcodes(), and TII.

Referenced by handleDbgInfo().

◆ lowerDbgValue()

Target-independent lowering of debug information.

Returns false if the debug information couldn't be lowered and was instead discarded.

Definition at line 1232 of file FastISel.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, llvm::MachineInstrBuilder::addCImm(), llvm::MachineInstrBuilder::addFPImm(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMetadata(), assert(), llvm::BuildMI(), llvm::DIExpression::constantFold(), llvm::MachineOperand::CreateFI(), llvm::MachineOperand::CreateReg(), llvm::dbgs(), DL, llvm::dwarf::DW_OP_LLVM_arg, llvm::dyn_cast(), FuncInfo, getRegForValue(), II, llvm::isa(), llvm::DIExpression::isEntryValue(), LLVM_DEBUG, lookUpRegForValue(), llvm::DIExpression::prependOpcodes(), and TII.

Referenced by handleDbgInfo().

◆ optimizeCmpPredicate()

Definition at line 2383 of file FastISel.cpp.

References llvm::CmpInst::FCMP_FALSE, llvm::CmpInst::FCMP_OEQ, llvm::CmpInst::FCMP_OGE, llvm::CmpInst::FCMP_OGT, llvm::CmpInst::FCMP_OLE, llvm::CmpInst::FCMP_OLT, llvm::CmpInst::FCMP_ONE, llvm::CmpInst::FCMP_ORD, llvm::CmpInst::FCMP_TRUE, llvm::CmpInst::FCMP_UEQ, llvm::CmpInst::FCMP_UGE, llvm::CmpInst::FCMP_UGT, llvm::CmpInst::FCMP_ULE, llvm::CmpInst::FCMP_ULT, llvm::CmpInst::FCMP_UNE, llvm::CmpInst::FCMP_UNO, llvm::User::getOperand(), llvm::CmpInst::getPredicate(), llvm::CmpInst::ICMP_EQ, llvm::CmpInst::ICMP_NE, llvm::CmpInst::ICMP_SGE, llvm::CmpInst::ICMP_SGT, llvm::CmpInst::ICMP_SLE, llvm::CmpInst::ICMP_SLT, llvm::CmpInst::ICMP_UGE, llvm::CmpInst::ICMP_UGT, llvm::CmpInst::ICMP_ULE, llvm::CmpInst::ICMP_ULT, and llvm_unreachable.

◆ recomputeInsertPt()

void FastISel::recomputeInsertPt	(	)

◆ removeDeadCode()

◆ selectBinaryOp()

Select and emit code for a binary operator instruction, which has an opcode which directly corresponds to the given ISD opcode.

Definition at line 444 of file FastISel.cpp.

References llvm::ISD::AND, llvm::cast(), llvm::dyn_cast(), fastEmit_ri_(), fastEmit_rr(), llvm::EVT::getEVT(), getRegForValue(), llvm::EVT::getSimpleVT(), I, llvm::isa(), llvm::ISD::isBitwiseLogicOp(), isCommutative(), llvm::isPowerOf2_64(), llvm::EVT::isSimple(), llvm::Log2_64(), llvm::ISD::SDIV, llvm::ISD::SRA, TLI, updateValueMap(), and llvm::ISD::UREM.

Referenced by selectOperator().

◆ selectBitCast()

◆ selectCall()

Definition at line 1151 of file FastISel.cpp.

References llvm::MachineInstrBuilder::addExternalSymbol(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMetadata(), llvm::BuildMI(), Call, llvm::cast(), llvm::dyn_cast(), llvm::InlineAsm::Extra_AsmDialect, llvm::InlineAsm::Extra_HasSideEffects, llvm::InlineAsm::Extra_IsAlignStack, llvm::InlineAsm::Extra_IsConvergent, FuncInfo, I, II, lowerCall(), MIMD, selectIntrinsicCall(), and TII.

Referenced by selectOperator().

◆ selectCast()

◆ selectExtractValue()

Definition at line 1702 of file FastISel.cpp.

References llvm::ComputeLinearIndex(), llvm::ComputeValueVTs(), DL, llvm::dyn_cast(), FuncInfo, llvm::ExtractValueInst::getIndices(), llvm::User::getOperand(), llvm::EVT::getSimpleVT(), llvm::Value::getType(), I, llvm::Register::id(), llvm::isa(), llvm::EVT::isSimple(), TLI, and updateValueMap().

Referenced by selectOperator().

◆ selectFNeg()

Emit an FNeg operation.

Definition at line 1660 of file FastISel.cpp.

References DL, fastEmit_r(), fastEmit_ri_(), llvm::EVT::getIntegerVT(), getRegForValue(), llvm::EVT::getSimpleVT(), llvm::EVT::getSizeInBits(), I, TLI, updateValueMap(), and llvm::ISD::XOR.

Referenced by selectOperator().

◆ selectFreeze()

Definition at line 1496 of file FastISel.cpp.

References llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), createResultReg(), DL, FuncInfo, getRegForValue(), llvm::EVT::getSimpleVT(), I, MIMD, TII, TLI, and updateValueMap().

Referenced by selectOperator().

◆ selectGetElementPtr()

Definition at line 531 of file FastISel.cpp.

References llvm::ISD::ADD, llvm::cast(), DL, llvm::dyn_cast(), fastEmit_ri_(), fastEmit_rr(), llvm::gep_type_begin(), llvm::gep_type_end(), getRegForGEPIndex(), getRegForValue(), I, llvm::isa(), llvm::ISD::MUL, N, TLI, and updateValueMap().

Referenced by selectOperator().

◆ selectInstruction()

Do "fast" instruction selection for the given LLVM IR instruction and append the generated machine instructions to the current block.

Returns true if selection was successful.

Definition at line 1536 of file FastISel.cpp.

References Call, llvm::dyn_cast(), F, fastSelectInstruction(), FuncInfo, getLastLocalValue(), I, LibInfo, MIMD, llvm::LLVMContext::OB_funclet, recomputeInsertPt(), removeDeadCode(), selectOperator(), and SkipTargetIndependentISel.

◆ selectIntrinsicCall()

◆ selectOperator()

Do "fast" instruction selection for the given LLVM IR operator (Instruction or ConstantExpr), and append generated machine instructions to the current block.

Return true if selection was successful.

Definition at line 1743 of file FastISel.cpp.

References llvm::ISD::ADD, llvm::ISD::AND, llvm::EVT::bitsGT(), llvm::EVT::bitsLT(), llvm::cast(), DL, llvm::ISD::FADD, fastEmit_(), fastEmitBranch(), llvm::ISD::FDIV, llvm::ISD::FMUL, llvm::ISD::FP_TO_SINT, llvm::ISD::FREM, llvm::ISD::FSUB, FuncInfo, llvm::Instruction::getDebugLoc(), getRegForValue(), llvm::BranchInst::getSuccessor(), I, llvm::isa(), llvm::BranchInst::isUnconditional(), llvm_unreachable, llvm::ISD::MUL, llvm::ISD::OR, llvm::ISD::SDIV, selectBinaryOp(), selectBitCast(), selectCall(), selectCast(), selectExtractValue(), selectFNeg(), selectFreeze(), selectGetElementPtr(), llvm::ISD::SHL, llvm::ISD::SIGN_EXTEND, llvm::ISD::SINT_TO_FP, llvm::ISD::SRA, llvm::ISD::SREM, llvm::ISD::SRL, llvm::ISD::SUB, TLI, TM, llvm::ISD::TRUNCATE, llvm::ISD::UDIV, updateValueMap(), llvm::ISD::UREM, llvm::ISD::XOR, and llvm::ISD::ZERO_EXTEND.

Referenced by selectInstruction().

◆ selectPatchpoint()

Definition at line 753 of file FastISel.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, llvm::MachineInstrBuilder::add(), llvm::CallingConv::AnyReg, assert(), llvm::BuildMI(), llvm::CallingConv::C, llvm::FastISel::CallLoweringInfo::Call, llvm::cast(), llvm::PatchPointOpers::CCPos, llvm::MachineOperand::CreateGA(), llvm::MachineOperand::CreateImm(), llvm::MachineOperand::CreateReg(), llvm::MachineOperand::CreateRegMask(), createResultReg(), DL, llvm::dyn_cast(), llvm::MachineInstr::eraseFromParent(), FuncInfo, getRegForValue(), I, llvm::PatchPointOpers::IDPos, llvm::FastISel::CallLoweringInfo::InRegs, llvm::isa(), llvm_unreachable, MIMD, llvm::PatchPointOpers::NArgPos, llvm::PatchPointOpers::NBytesPos, llvm::FastISel::CallLoweringInfo::NumResultRegs, llvm::FastISel::CallLoweringInfo::OutRegs, llvm::FastISel::CallLoweringInfo::ResultReg, llvm::FastISel::CallLoweringInfo::setIsPatchPoint(), llvm::MachineInstr::setPhysRegsDeadExcept(), llvm::SmallVectorTemplateCommon< T, typename >::size(), llvm::PatchPointOpers::TargetPos, TII, TLI, TRI, and updateValueMap().

Referenced by selectIntrinsicCall().

◆ selectStackmap()

Definition at line 643 of file FastISel.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, llvm::MachineInstrBuilder::add(), llvm::MachineInstrBuilder::addImm(), assert(), llvm::BuildMI(), llvm::cast(), llvm::MachineOperand::CreateImm(), llvm::MachineOperand::CreateReg(), FuncInfo, I, llvm::PatchPointOpers::IDPos, llvm::isa(), MIMD, llvm::PatchPointOpers::NBytesPos, TII, and TLI.

Referenced by selectIntrinsicCall().

◆ selectXRayCustomEvent()

Definition at line 900 of file FastISel.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, llvm::MachineInstrBuilder::add(), llvm::BuildMI(), llvm::MachineOperand::CreateReg(), FuncInfo, llvm::Triple::getArch(), getRegForValue(), I, llvm::Triple::isAArch64(), MIMD, TII, TM, and llvm::Triple::x86_64.

Referenced by selectIntrinsicCall().

◆ selectXRayTypedEvent()

Definition at line 919 of file FastISel.cpp.

Referenced by selectIntrinsicCall().

◆ setLastLocalValue()

void llvm::FastISel::setLastLocalValue ( MachineInstr * I)	inline

Update the position of the last instruction emitted for materializing constants for use in the current block.

Definition at line 237 of file FastISel.h.

References EmitStartPt, I, and LastLocalValue.

◆ shouldOptForSize()

◆ startNewBlock()

void FastISel::startNewBlock	(	)

◆ tryToFoldLoad()

We're checking to see if we can fold LI into FoldInst.

Note that we could have a sequence where multiple LLVM IR instructions are folded into the same machineinstr. For example we could have:

A: x = load i32 *P B: y = icmp A, 42 C: br y, ...

In this scenario, LI is "A", and FoldInst is "C". We know about "B" (and any other folded instructions) because it is between A and C.

If we succeed folding, return true.

Definition at line 2258 of file FastISel.cpp.

References assert(), FuncInfo, llvm::MachineRegisterInfo::defusechain_iterator< ReturnUses, ReturnDefs, SkipDebug, ByOperand, ByInstr >::getOperandNo(), llvm::ilist_detail::node_parent_access< NodeTy, ParentTy >::getParent(), llvm::MachineOperand::getParent(), getRegForValue(), llvm::Value::hasOneUse(), llvm::LoadInst::isVolatile(), MRI, tryToFoldLoadIntoMI(), and llvm::Instruction::user_back().

◆ tryToFoldLoadIntoMI()

The specified machine instr operand is a vreg, and that vreg is being provided by the specified load instruction.

If possible, try to fold the load as an operand to the instruction, returning true if possible.

This method should be implemented by targets.

Definition at line 300 of file FastISel.h.

Referenced by tryToFoldLoad().

◆ updateValueMap()

Update the value map to include the new mapping for this instruction, or insert an extra copy to get the result in a previous determined register.

NOTE: This is only necessary because we might select a block that uses a value before we select the block that defines the value. It might be possible to fix this by selecting blocks in reverse postorder.

Definition at line 363 of file FastISel.cpp.

References FuncInfo, I, llvm::isa(), and LocalValueMap.

Referenced by lowerCallTo(), selectBinaryOp(), selectBitCast(), selectCast(), selectExtractValue(), selectFNeg(), selectFreeze(), selectGetElementPtr(), selectIntrinsicCall(), selectOperator(), and selectPatchpoint().