Low noise amplifier Research Papers (original) (raw)

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- Analog Circuits, Statistical Analysis, Genetic Algorithm, Optimization Problem
- by Yasar Gurbuz
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- Engineering, Computer Science, Microelectronics, Computer Aided Design

This article presents an original design methodology for the selection of output matching load network for a dual-band Low Noise Amplifier (LNA) that is targeted for the use in the GSM 1.8 GHz and WLAN 2.4 GHz range. A particle swarm optimization (PSO) based technique is used to get the optimized values of the output load network components. The concurrent dual-band LNA is simulated with these entire component values in CADENCE with CMOS 0.18 μm technology.

- by Rohit Datta
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- Wireless Sensor Networks, Millimeter Wave Antennas, Frequency, GSM
- by Ashudeb Dutta
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- Power Consumption, GSM, Impedance Matching, Radio Frequency
- by Norlaili Noh
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- Low noise amplifier, Degeneration, Switched Capacitor Filters, Noise Figure

In this paper, a two-stage 0.18 μm CMOS power amplifier (PA) for ultra-wideband (UWB) 3 to 5 GHz based on common source inductive degeneration with an auxiliary amplifier is proposed. In this proposal, an auxiliary amplifier is used to place the 2nd harmonic in the core amplified in order to make up for the gain progression phenomena at the main amplifier output node. Simulation results show a power gain of 16 dB with a gain flatness of 0.4 dB and an input 1 dB compression of about-5 dBm from 3 to 5 GHz using a 1.8 V power supply consuming 25 mW. Power added efficiency (PAE) of around 47% at 4 GHz with 50 Ω load impedance was also observed. Keywords: CMOS Low noise amplifier Power amplifier Topologies Ultra-wideband (UWB) This is an open access article under the CC BY-SA license.

Several interesting experiments in the advanced laboratory require an accurate measurement of a slowly varying, extremely small voltage. Lock-in detection is a powerful technique to recover such a signal, even in the presence of broadband noise whose magnitude is several times greater than the signal itself. We have implemented a versatile, low-cost digital lock-in analyzer completely in software. No specialized

- by Charles Hays
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- Signal Processing, Time Series, Data acquisition, Superconductors
- by Abdolreza Nabavi
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- Low Power, Low noise amplifier
- by Mohamed Masmoudi
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- Microelectronics, Spread Spectrum, Low Power, Low noise amplifier
- by K. Bardhan
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- Engineering, Power Electronics, High Voltage, Scientific Instruments
- by David Michael
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- Psychology, Cognitive Science, Low noise amplifier

Low power LNA design for high frequency wireless application is one of the challenging tasks in present scenario of VLSI. The major components of noise in amplifier are incorporated into flicker noise and thermal noise. In this paper the main concentration is given on a comparative study for a single ended LNA in the platform of 130nm to 22nm models of BSIM4 series and Verilog based CNTFET. Noise figure, reflection coefficients and gain of LNA are taken as a subject of matter for the comparison.

- by Sayak Bhowal
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- Low noise amplifier
- by amir zahedi
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- Low noise amplifier, Noise Figure, Front end, Power Dissipation

This paper presents the design and analysis of a dual-band concurrent low noise amplifier (LNA) for 2.4 / 5.75 GHz wireless applications. This LNA combines a notch filter and T-matching network with inductive degenerated topology at the single stage common-source transistor. The LNA used two stage of GaAs HEMT by cascading the transistor to improve the gain and noise figure (NF). The LNA is matched concurrently at the two frequency bands by matching the input and output networks. The simulation results showed a high gain |S21| of 33 dB and 28.7 dB and low NF of 0.46 dB and 0.54 dB for center frequency of 2.4 GHz and 5.75 GHz. The supply voltage for LNA is 2V. Simulation of the design was performed with the Advanced Design System (ADS) software. The design is especially suitable for use in multi-standard wireless front end receiver.

- by Azman Ahmad and +1
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- Wireless Communications, Low noise amplifier, Receiver Front End

This letter presents a compact interdigital stripline bandpass filter embedded in low temperature cofired ceramic for 5-GHz wireless LAN applications, including design, simulation, fabrication, and measurements. The filter measures 8 mm×7 mm×1.1 mm and exhibits an insertion loss of 3.6 dB, a return loss of 20 dB, and a 212-MHz passband with the midband frequency at 5.28 GHz. The filter is highly reproducible with good tolerance. A low noise amplifier (LNA) built on the top of the LTCC substrate with an embedded filter has the same bandwidth and midband frequency as those of the filter. Using this filter and an integrated chip, a small RF front-end receiver has been achieved.

- by Minh Van
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- Low noise amplifier, Wireless Lan, Optical physics, Front end

A novel design of low noise amplifier for medical ultrasound transducers is described in this paper. Unlike conventional low noise preamplifiers, this design proposes a new circuit configuration which has electronically adjustable matching resistance that allows the preamplifier to be compatible with a variety of medical ultrasound transducers. The design employs current feedback operational amplifier to enhance the gain-bandwidth independence

- by Mauri Honkanen
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- Wireless Sensor Networks, Modulation, Ad Hoc Networks, Sensor networks

The design of a linear integrated Op Amp circuit as an alternative solution to differential equation model of RLC Circuit is presented. The fundamental assumption used in the cascaded Operational Amplifier (Op Amp) design is that Op Amp acts linearly. In this paper, we will examine the behavior of the Op Amp when it is used in the cascaded circuit that is an electrical analog to the differential equation model of RLC circuit, which arises in numerous applications particularly in control and communication systems such as ringing circuits, resonant circuits, filters and oscillators. We will design the cascaded op amp circuit that is analog to differential equation model of RLC circuit and obtain graphical results of output function versus time using PSpice Software Probe. To confirm the validity of the design of a linear integrated Op Amp circuit as an alternative solution to differential equation model of RLC circuit implemented in the PSpice Software, simulation results are compared with RLC circuit where we find good agreement between the theoretical predictions of the differential equation model of RLC circuit and the design of a linear integrated Op Amp circuit.

- by Cristian Marcu
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- Millimeter Wave Antennas, Radio Frequency, Phased Array, Low Power

In this work, the authors discuss the design of two low noise amplifiers (LNA) based on 1 μm gate-length pHEMT InP transistors and using two different topologies. Designed for radio astronomy applications, the first is a cascode circuit with a maximum gain of 15 dB and noise figure of 0.6 dB, while the second is a 2-stage cascaded amplifier with 27 dB of gain and 0.63 dB of noise figure. The two amplifiers exhibit an input 1 dB compression point of -22 dBm and -26 dBm respectively, and a third order input intercept point of -10 dBm and -5 dBm, respectively.

- by Nouredine Sengouga and +1
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- Radio Astronomy, Instrumentation, Low noise amplifier, Noise Figure

In modern RF and microwave communication systems, amplification plays an important role. A low noise amplifier (LNA) is used in various aspects of wireless communications such as wireless LANs, satellite transponders, cellular communications, etc. At the receiver part, the receiving antenna receives the information signal along with noise. This noise is the unwanted component which needs to be minimized. For this purpose, a low noise amplifier is designed. LNA is the major critical building block in the radio receiver. It amplifies the received signal and boosts its power above the noise level produced by subsequent circuits. The main goal of the paper is to design a low noise amplifier operating at 10 GHz using Advanced Design System (ADS) simulation software which provides high gain with low noise figure. This proposed LNA is designed and its S-parameters and the noise figure are calculated.

- by GRD JOURNALS
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- Low noise amplifier, Noise Figure, Advanced Design Systems, Input return loss
- by Ehsan Adabi
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- Impedance Matching, Design Methodology, Low noise amplifier, Linear Stability
- by Heechan Doh
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- Circuits and Systems, RF MEMS, System on Chip, Quality Factor
- by hossein hashemi
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- Biomedical Engineering, System Integration, High Frequency, Phased Array
- by hossein hashemi
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- Communication systems, Low noise amplifier, GNSS receivers, Low Noise
- by Ming-Ta Yang
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- Millimeter Wave Antennas, Algorithm Design, Current Density, Low noise amplifier
- by Egidio Ragonese
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- Radio Frequency, Phase Locked Loop, Reuse, Low noise amplifier
- by B. Gaucher
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- Microwave, Voltage Controlled Oscillator, Low noise amplifier, Preamplifier

This paper presents a 4GHz Low Noise Amplifier for satellite downlink communication.This frequency indicate in the IEEE C-band.Satellite downlink communication located at the front end of LNA.Thus,this LNA required to amplify the signal without adding much noise. This paper is present design and simulation of singlestage LNA circuits.The amplifier design were designed by using ATF 54143 transistor manufactured from Avago Technologies. The design circuit uses single stub matching to implement the matching network. The purpose single stage of input and output matching network is to produces 50Ω impedance at the input and output port of the LNA.The matching network is used at both sides of the transistor.The target simulation are gain (S21) with >10dB, noise figure with <2dB and input and output return loss <-10dB at 4 GHz. A single stage LNA has successfully designed with 11.112dB forward gain , 1.181 dB noise figure, -10.026 dB output return loss(S22) and -12.522 dB input return loss(S11) by using ADS software.

In this paper a first iteration X-band T/R module based on a GaN-HEMT MMIC Front-End chip-set, comprising a power amplifier, robust low-noise amplifier and power switch will be presented. Even though ultimate T/R module performance cannot be achieved with current GaN-HEMT technological maturity the impact that this technology can have at systems level in terms of performance/cost trade-off will be

- by Claudio Lanzieri
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- Low noise amplifier, Power Amplifier, Front end
- by Massimo Pozzoni and +1
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- Millimeter Wave Antennas, Higher Order Thinking, Communication Technology, Low Power
- by Umar Bhatti
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- Software Defined Radio, Tracking, Phase Locked Loop, Low noise amplifier
- by Didier Belot and +2
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- Computer Architecture, Millimeter Wave Antennas, High Temperature, Low noise amplifier

Low frequency noise measurements are among the most sensitive tools for the investigation of the quality and of the reliability of semiconductor devices. The sensitivity that can be obtained depends on the background noise of the low noise preamplifier coupled to the device under test (DUT) that, at very low frequencies, is dominated by flicker noise. The low frequency noise produced by the DUT, on the other end, is very often the most interesting signal to be detected and analyzed. In this work we propose a very simple topology for the realization of a general purpose low noise preamplifier whose noise performances, at very low frequencies (below 10 Hz), are significantly better than those that can be obtained by the most popular commercial instrumentation. Indeed, a gain of 80 dB with a pass band extending from a few tens of mHz up to a few kHz with an equivalent input voltage noise as low as 14 nV/square root(Hz) (100 mHz), 1.4 nV/square root(Hz) (1 Hz), 1.0 nV/square root(Hz) (10 Hz), and 0.8 nV/square root(Hz) (1 kHz) are consistently obtained by using quite standard electronic components and with no need for trimming and/or calibration steps. Moreover, the junction field-effect transistor input stage of the amplifier is characterized by an equivalent input current noise below 4 fA/square root(Hz) in the entire bandwidth, resulting in negligible background noise degradation for DUT impedances in excess of 100 kohms.

- by Arthur van Roermund
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- Power Consumption, Radio Frequency, Low noise amplifier, Noise Figure
- by Ahmed Amer
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- Microwave, User Interface, Millimeter Wave Antennas, Multicast
- by Sebastien Amiot
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- Low noise amplifier, Digital Tv, Spectrum, Dc-Dc Boost Converter

In this paper a Low Noise Amplifier is implemented with optimal gain and Noise Factor, with a potential application such as S band in the domain microwave. A single transistor with matching and decoupling circuit is used, designed for a... more

- by A. H. M. ZAHIRUL ALAM Alam
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- Stability, Satellite Communication, Noise, Low noise amplifier
- by Hermann Schumacher
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- Low noise amplifier, Chip, Noise Figure, Ultra Wideband
- by Arne Alping
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- Microwave, User Interface, Mmic, Low noise amplifier
- by Ahmed Mohieldin
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- User Interface, GSM, Radio Frequency, Low noise amplifier

In this paper we present two designs of CMOS blocks suitable for integration with RF frontend blocks for test purposes. Those are a programmable RF test attenuator and a reconfigurable low noise amplifier (LNA), optimized with respect to their function and location in the circuit. We discuss their performances in terms of the test- and normal operation mode. The presented application model aims at a transceiver under loopback test with enhanced controllability and detectability. The circuits are designed for 0.35μm CMOS process. Simulation results of the receiver frontend operating in 2.4 GHz band are presented showing tradeoffs between the performance and test functionality.

- by Rashad Ramzan
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- Technology, DFT, Process Simulation, Low noise amplifier

Low noise amplifier is the front end block of radio-frequency receiver system. Its design required various characteristics such as power gain, noise figure, insertion losses and power consumption. In this paper we have proposed a single stage low noise amplifier design with high gain and low noise using inductive source degeneration topology for frequency range of 3 GHz to 7 GHz and also use the active biasing devices. A range of devices like inductors and capacitors are used to achieve 50 Ω input impedance with a low noise factor. The design process is simulated process is using Advance Design System (ADS) and implemented in TSMC 0.18 µm CMOS technology. A single stage low noise amplifier has a measured forward gain 25.4 dB and noise figure 2.2 dB at frequency 5.0 GHz.