LLVM: lib/Target/AMDGPU/AMDGPURegBankSelect.cpp File Reference (original) (raw)
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| Macros | |
|---|---|
| #define | DEBUG_TYPE "amdgpu-regbankselect" |
| Assign register banks to all register operands of G_ instructions using machine uniformity analysis. |
◆ DEBUG_TYPE
#define DEBUG_TYPE "amdgpu-regbankselect"
Assign register banks to all register operands of G_ instructions using machine uniformity analysis.
Sgpr - uniform values and some lane masks Vgpr - divergent, non S1, values Vcc - divergent S1 values(lane masks) However in some cases G_ instructions with this register bank assignment can't be inst-selected. This is solved in AMDGPURegBankLegalize.
Definition at line 27 of file AMDGPURegBankSelect.cpp.
◆ getVReg()
◆ INITIALIZE_PASS_BEGIN()
| INITIALIZE_PASS_BEGIN | ( | AMDGPURegBankSelect | , |
|---|---|---|---|
| DEBUG_TYPE | , | ||
| "AMDGPU Register Bank Select" | , | ||
| false | , | ||
| false | ) |
◆ DEBUG_TYPE
◆ false
◆ Select
Definition at line 68 of file AMDGPURegBankSelect.cpp.
Referenced by llvm::CombinerHelper::applyFoldBinOpIntoSelect(), llvm::InstCombinerImpl::canonicalizeCondSignextOfHighBitExtractToSignextHighBitExtract(), combineAdd(), combineMulSelectConstOne(), combineSelect(), constantFold(), llvm::VPlanTransforms::convertToConcreteRecipes(), llvm::createMinMaxOp(), llvm::logicalview::LVReader::doLoad(), llvm::VPReductionRecipe::execute(), llvm::TargetLowering::expandFP_TO_INT_SAT(), llvm::TargetLowering::expandVPCTTZElements(), llvm::InstCombinerImpl::foldICmpSelectConstant(), llvm::InstCombinerImpl::foldVectorSelect(), getV_CMPOpcode(), getValueOnFirstIteration(), INITIALIZE_PASS(), llvm::SIInstrInfo::insertSelect(), instCombineSVESel(), llvm::TargetLoweringBase::InstructionOpcodeToISD(), llvm::RecurrenceDescriptor::isAnyOfPattern(), isFixedVectorShuffle(), llvm::RecurrenceDescriptor::isMinMaxPattern(), isSignedMinMaxClamp(), LowerBUILD_VECTORvXi1(), lowerDisjointIndicesShuffle(), LowerMLOAD(), lowerSELECT(), llvm::PatternMatch::LogicalOp_match< LHS, RHS, Opcode, Commutable >::match(), llvm::CombinerHelper::matchCastOfSelect(), llvm::CombinerHelper::matchFoldBinOpIntoSelect(), llvm::CombinerHelper::matchSelect(), llvm::CombinerHelper::matchSelectIMinMax(), llvm::LegalizerHelper::narrowScalarSelect(), llvm::SIInstrInfo::optimizeCompareInstr(), llvm::RISCVTargetLowering::PerformDAGCombine(), simplifyShiftSelectingPackedElement(), simplifySwitchOnSelectUsingRanges(), tryToRecognizeTableBasedCttz(), upgradeMaskedMove(), llvm::InstCombinerImpl::visitCallInst(), llvm::InstCombinerImpl::visitSub(), and llvm::InstCombinerImpl::visitSwitchInst().