LLVM: llvm::AllocationOrder Class Reference (original) (raw)
#include "[CodeGen/AllocationOrder.h](AllocationOrder%5F8h%5Fsource.html)"
| Public Member Functions | |
|---|---|
| AllocationOrder (SmallVector< MCPhysReg, 16 > &&Hints, ArrayRef< MCPhysReg > Order, bool HardHints) | |
| Create an AllocationOrder given the Hints, Order, and HardHints values. | |
| Iterator | begin () const |
| Iterator | end () const |
| Iterator | getOrderLimitEnd (unsigned OrderLimit) const |
| ArrayRef< MCPhysReg > | getOrder () const |
| Get the allocation order without reordered hints. | |
| bool | isHint (Register Reg) const |
| Return true if Reg is a preferred physical register. |
Definition at line 30 of file AllocationOrder.h.
◆ begin()
| Iterator llvm::AllocationOrder::begin ( ) const | inline |
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◆ create()
Create a new AllocationOrder for VirtReg.
Parameters
| VirtReg | Virtual register to allocate for. |
|---|---|
| VRM | Virtual register map for function. |
| RegClassInfo | Information about reserved and allocatable registers. |
Definition at line 29 of file AllocationOrder.cpp.
References llvm::all_of(), AllocationOrder(), assert(), llvm::dbgs(), llvm::VirtRegMap::getMachineFunction(), llvm::RegisterClassInfo::getOrder(), llvm::MachineRegisterInfo::getRegClass(), llvm::MachineFunction::getRegInfo(), llvm::VirtRegMap::getTargetRegInfo(), llvm::is_contained(), LLVM_DEBUG, Matrix, llvm::printReg(), and TRI.
Referenced by llvm::RegAllocEvictionAdvisor::canReassign(), and llvm::RABasic::selectOrSplit().
◆ end()
| Iterator llvm::AllocationOrder::end ( ) const | inline |
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◆ getOrder()
◆ getOrderLimitEnd()
| Iterator llvm::AllocationOrder::getOrderLimitEnd ( unsigned OrderLimit) const | inline |
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◆ isHint()
| bool llvm::AllocationOrder::isHint ( Register Reg) const | inline |
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The documentation for this class was generated from the following files:
- lib/CodeGen/AllocationOrder.h
- lib/CodeGen/AllocationOrder.cpp