LLVM: llvm::AllocationOrder Class Reference (original) (raw)

#include "[CodeGen/AllocationOrder.h](AllocationOrder%5F8h%5Fsource.html)"

Public Member Functions
AllocationOrder (SmallVector< MCPhysReg, 16 > &&Hints, ArrayRef< MCPhysReg > Order, bool HardHints)
Create an AllocationOrder given the Hits, Order, and HardHits values.
Iterator begin () const
Iterator end () const
Iterator getOrderLimitEnd (unsigned OrderLimit) const
ArrayRef< MCPhysReg > getOrder () const
Get the allocation order without reordered hints.
bool isHint (Register Reg) const
Return true if Reg is a preferred physical register.

Definition at line 30 of file AllocationOrder.h.

◆ begin()

Iterator llvm::AllocationOrder::begin ( ) const inline

◆ create()

Create a new AllocationOrder for VirtReg.

Parameters

VirtReg Virtual register to allocate for.
VRM Virtual register map for function.
RegClassInfo Information about reserved and allocatable registers.

Definition at line 29 of file AllocationOrder.cpp.

References llvm::all_of(), assert(), llvm::SmallVectorBase< Size_T >::empty(), llvm::VirtRegMap::getMachineFunction(), llvm::RegisterClassInfo::getOrder(), llvm::MachineRegisterInfo::getRegClass(), llvm::MachineFunction::getRegInfo(), llvm::VirtRegMap::getTargetRegInfo(), llvm::is_contained(), LLVM_DEBUG, Matrix, and TRI.

Referenced by llvm::RegAllocEvictionAdvisor::canReassign().

◆ end()

Iterator llvm::AllocationOrder::end ( ) const inline

◆ getOrder()

◆ getOrderLimitEnd()

Iterator llvm::AllocationOrder::getOrderLimitEnd ( unsigned OrderLimit) const inline

◆ isHint()

bool llvm::AllocationOrder::isHint ( Register Reg) const inline

The documentation for this class was generated from the following files: