LLVM: llvm::GCNTTIImpl Class Reference (original) (raw)
#include "[Target/AMDGPU/AMDGPUTargetTransformInfo.h](AMDGPUTargetTransformInfo%5F8h%5Fsource.html)"
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| enum class | KnownIEEEMode { Unknown, On, Off } |
Definition at line 63 of file AMDGPUTargetTransformInfo.h.
◆ KnownIEEEMode
◆ addrspacesMayAlias()
◆ adjustInliningThreshold()
◆ areInlineCompatible()
◆ canHaveNonUndefGlobalInitializerInAddressSpace()
| bool llvm::GCNTTIImpl::canHaveNonUndefGlobalInitializerInAddressSpace ( unsigned AS) const | inlineoverridevirtual |
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◆ canSimplifyLegacyMulToMul()
◆ collectFlatAddressOperands()
◆ collectKernelLaunchBounds()
◆ fpenvIEEEMode()
◆ getArithmeticInstrCost()
Reimplemented from llvm::BasicTTIImplBase< GCNTTIImpl >.
Definition at line 530 of file AMDGPUTargetTransformInfo.cpp.
References llvm::ISD::ADD, llvm::ISD::AND, CostKind, llvm::dyn_cast(), llvm::ISD::FADD, llvm::FAdd, llvm::FPOpFusion::Fast, llvm::ISD::FDIV, llvm::ISD::FMUL, llvm::ISD::FREM, llvm::ISD::FSUB, llvm::BasicTTIImplBase< GCNTTIImpl >::getArithmeticInstrCost(), llvm::Instruction::hasAllowContract(), llvm::Instruction::hasApproxFunc(), llvm::Value::hasOneUse(), llvm::PatternMatch::m_FPOne(), llvm::PatternMatch::match(), llvm::ISD::MUL, Options, llvm::ISD::OR, llvm::ISD::SHL, llvm::ISD::SRA, llvm::ISD::SRL, llvm::ISD::SUB, llvm::TargetTransformInfo::TCC_Free, llvm::Value::user_begin(), and llvm::ISD::XOR.
◆ getArithmeticReductionCost()
◆ getCacheLineSize()
| unsigned llvm::GCNTTIImpl::getCacheLineSize ( ) const | inlineoverridevirtual |
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◆ getCallerAllocaCost()
◆ getCFInstrCost()
◆ getFlatAddressSpace()
| unsigned llvm::GCNTTIImpl::getFlatAddressSpace ( ) const | inlineoverridevirtual |
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◆ getInlinerVectorBonusPercent()
| int llvm::GCNTTIImpl::getInlinerVectorBonusPercent ( ) const | inlineoverridevirtual |
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◆ getInliningLastCallToStaticBonus()
| int GCNTTIImpl::getInliningLastCallToStaticBonus ( ) const | overridevirtual |
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◆ getInliningThresholdMultiplier()
| unsigned llvm::GCNTTIImpl::getInliningThresholdMultiplier ( ) const | inlineoverridevirtual |
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◆ getIntrinsicInstrCost()
Get intrinsic cost based on arguments.
Reimplemented from llvm::BasicTTIImplBase< GCNTTIImpl >.
Definition at line 712 of file AMDGPUTargetTransformInfo.cpp.
References AbstractManglingParser< Derived, Alloc >::NumOps, llvm::any_of(), CostKind, fpenvIEEEMode(), llvm::IntrinsicCostAttributes::getID(), llvm::IntrinsicCostAttributes::getInst(), llvm::BasicTTIImplBase< GCNTTIImpl >::getIntrinsicInstrCost(), llvm::IntrinsicCostAttributes::getReturnType(), II, intrinsicHasPackedVectorBenefit(), and Off.
◆ getLoadStoreVecRegBitWidth()
| unsigned GCNTTIImpl::getLoadStoreVecRegBitWidth ( unsigned AddrSpace) const | overridevirtual |
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◆ getLoadVectorFactor()
◆ getMaximumVF()
◆ getMaxInterleaveFactor()
◆ getMaxMemIntrinsicInlineSizeThreshold()
| uint64_t GCNTTIImpl::getMaxMemIntrinsicInlineSizeThreshold ( ) const | overridevirtual |
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◆ getMemcpyLoopLoweringType()
◆ getMemcpyLoopResidualLoweringType()
◆ getMemoryOpCost()
◆ getMinMaxReductionCost()
◆ getMinVectorRegisterBitWidth()
| unsigned GCNTTIImpl::getMinVectorRegisterBitWidth ( ) const | overridevirtual |
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◆ getNumberOfParts()
| unsigned GCNTTIImpl::getNumberOfParts ( Type * Tp) const | overridevirtual |
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◆ getNumberOfRegisters()
| unsigned GCNTTIImpl::getNumberOfRegisters ( unsigned RCID) const | overridevirtual |
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◆ getPeelingPreferences()
◆ getPopcntSupport()
◆ getPrefetchDistance()
| unsigned GCNTTIImpl::getPrefetchDistance ( ) const | overridevirtual |
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◆ getRegisterBitWidth()
◆ getShuffleCost()
Reimplemented from llvm::BasicTTIImplBase< GCNTTIImpl >.
Definition at line 1226 of file AMDGPUTargetTransformInfo.cpp.
References llvm::Aligned, assert(), llvm::cast(), CostKind, llvm::divideCeil(), llvm::BasicTTIImplBase< GCNTTIImpl >::DL, llvm::dyn_cast(), llvm::InstructionCost::getInvalid(), getNumElements(), llvm::BasicTTIImplBase< GCNTTIImpl >::getShuffleCost(), I, llvm::BasicTTIImplBase< GCNTTIImpl >::improveShuffleKindFromMask(), llvm::is_contained(), llvm::isa(), llvm::SmallVectorTemplateBase< T, bool >::push_back(), llvm::SmallVectorTemplateCommon< T, typename >::size(), llvm::TargetTransformInfo::SK_Broadcast, llvm::TargetTransformInfo::SK_ExtractSubvector, llvm::TargetTransformInfo::SK_InsertSubvector, llvm::TargetTransformInfo::SK_PermuteSingleSrc, llvm::TargetTransformInfo::SK_Reverse, llvm::TargetTransformInfo::SK_Splice, and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.
◆ getStoreVectorFactor()
◆ getTgtMemIntrinsic()
◆ getUnrollingPreferences()
◆ getVectorInstrCost() [1/3]
◆ getVectorInstrCost() [2/3]
◆ getVectorInstrCost() [3/3]
◆ getVectorSplitCost()
◆ hasBranchDivergence()
| bool GCNTTIImpl::hasBranchDivergence ( const Function * F = nullptr) const | overridevirtual |
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◆ hoistLaneIntrinsicThroughOperand()
Definition at line 557 of file AMDGPUInstCombineIntrinsic.cpp.
References AbstractManglingParser< Derived, Alloc >::Ops, assert(), llvm::InstCombiner::Builder, llvm::Instruction::clone(), llvm::DominatorTree::dominates(), llvm::dyn_cast(), llvm::InstCombiner::getDominatorTree(), llvm::User::getOperand(), llvm::User::getOperandUse(), llvm::Intrinsic::getOrInsertDeclaration(), llvm::ilist_detail::node_parent_access< NodeTy, ParentTy >::getParent(), llvm::Value::hasOneUser(), II, llvm::isa(), isTriviallyUniform(), llvm::BasicTTIImplBase< GCNTTIImpl >::isTypeLegal(), OpIdx, rewriteCall(), and llvm::User::setOperand().
Referenced by instCombineIntrinsic().
◆ instCombineIntrinsic()
Reimplemented from llvm::BasicTTIImplBase< GCNTTIImpl >.
Definition at line 639 of file AMDGPUInstCombineIntrinsic.cpp.
References llvm::CallBase::addFnAttr(), llvm::FastMathFlags::allowContract(), assert(), llvm::APFloat::bitcastToAPInt(), llvm::InstCombiner::Builder, llvm::CallingConv::C, Call, canContractSqrtToRsq(), canSimplifyLegacyMulToMul(), llvm::cast(), Changed, llvm::ConstantFoldCompareInstOperands(), llvm::APFloat::convert(), llvm::IRBuilderBase::CreateAShr(), llvm::IRBuilderBase::CreateExtractVector(), llvm::IRBuilderBase::CreateFAddFMF(), llvm::IRBuilderBase::CreateFMulFMF(), llvm::IRBuilderBase::CreateICmpNE(), llvm::IRBuilderBase::CreateInsertElement(), llvm::IRBuilderBase::CreateIntrinsic(), llvm::IRBuilderBase::CreateLShr(), llvm::IRBuilderBase::CreateMaximumNum(), llvm::IRBuilderBase::CreateMaxNum(), llvm::IRBuilderBase::CreateMinimumNum(), llvm::IRBuilderBase::CreateMinNum(), llvm::IRBuilderBase::CreateSExt(), llvm::IRBuilderBase::CreateShl(), llvm::IRBuilderBase::CreateZExt(), defaultComponentBroadcast(), llvm::APFloat::divide(), llvm::BasicTTIImplBase< GCNTTIImpl >::DL, llvm::dyn_cast(), llvm::InstCombiner::eraseInstFromFunction(), llvm::Exponent, llvm::FAdd, llvm::fcAllFlags, llvm::CmpInst::FIRST_FCMP_PREDICATE, llvm::CmpInst::FIRST_ICMP_PREDICATE, fmed3AMDGCN(), llvm::FMul, llvm::AMDGPU::MFMAScaleFormats::FP4_E2M1, llvm::AMDGPU::MFMAScaleFormats::FP6_E2M3, llvm::AMDGPU::MFMAScaleFormats::FP6_E3M2, llvm::AMDGPU::MFMAScaleFormats::FP8_E4M3, llvm::AMDGPU::MFMAScaleFormats::FP8_E5M2, fpenvIEEEMode(), llvm::frexp(), llvm::FixedVectorType::get(), llvm::MDNode::get(), llvm::MDString::get(), llvm::MetadataAsValue::get(), llvm::PoisonValue::get(), llvm::UndefValue::get(), llvm::ConstantInt::getFalse(), llvm::FPMathOperator::getFastMathFlags(), llvm::Type::getHalfTy(), llvm::AMDGPU::getImageDimIntrinsicInfo(), llvm::ConstantFP::getInfinity(), llvm::IRBuilderBase::getInt64(), llvm::IRBuilderBase::getIntNTy(), llvm::CmpInst::getInversePredicate(), llvm::ConstantFP::getNaN(), llvm::Constant::getNullValue(), llvm::Intrinsic::getOrInsertDeclaration(), llvm::APFloat::getQNaN(), llvm::APFloat::getSemantics(), llvm::InstCombiner::getSimplifyQuery(), llvm::CmpInst::getSwappedPredicate(), llvm::Value::getType(), llvm::ConstantInt::getValue(), llvm::ConstantFP::getValueAPF(), llvm::APFloat::getZero(), llvm::ConstantFP::getZero(), llvm::APInt::getZExtValue(), llvm::ConstantInt::getZExtValue(), hoistLaneIntrinsicThroughOperand(), I, llvm::CmpInst::ICMP_EQ, llvm::CmpInst::ICMP_NE, llvm::APFloatBase::IEEEhalf(), llvm::APFloatBase::IEK_Inf, llvm::APFloatBase::IEK_NaN, II, llvm::isa(), llvm::CmpInst::isFPPredicate(), llvm::APFloat::isInfinity(), llvm::Type::isIntegerTy(), llvm::APFloat::isNaN(), llvm::APFloat::isNegInfinity(), llvm::Constant::isNullValue(), llvm::APFloat::isPosInfinity(), llvm::APFloat::isSignaling(), llvm::CmpInst::isSigned(), isTriviallyUniform(), llvm::SimplifyQuery::isUndefValue(), llvm::CmpInst::LAST_FCMP_PREDICATE, llvm::CmpInst::LAST_ICMP_PREDICATE, llvm_unreachable, llvm::PatternMatch::m_AllOnes(), llvm::PatternMatch::m_AnyZeroFP(), llvm::PatternMatch::m_APFloat(), llvm::PatternMatch::m_Cmp(), llvm::PatternMatch::m_ConstantFP(), llvm::PatternMatch::m_FPExt(), llvm::PatternMatch::m_One(), llvm::PatternMatch::m_SExt(), llvm::PatternMatch::m_Value(), llvm::PatternMatch::m_Zero(), llvm::PatternMatch::m_ZExt(), llvm::PatternMatch::m_ZExtOrSExt(), llvm::Make_64(), llvm::APFloat::makeQuiet(), llvm::PatternMatch::match(), matchFPExtFromF16(), llvm::NearestTiesToEven, Off, llvm::Offset, On, llvm::InstCombiner::replaceInstUsesWith(), llvm::InstCombiner::replaceOperand(), llvm::APFloatBase::rmNearestTiesToEven, llvm::APFloatBase::rmTowardZero, llvm::scalbn(), llvm::Signed, simplifyAMDGCNImageIntrinsic(), simplifyAMDGCNMemoryIntrinsicDemanded(), simplifyDemandedLaneMaskArg(), std::swap(), llvm::Value::takeName(), trimTrailingZerosInVector(), llvm::APInt::trunc(), Unknown, llvm::AMDGPU::wmmaScaleF8F6F4FormatToNumRegs(), X, and Y.
◆ isAlwaysUniform()
| bool GCNTTIImpl::isAlwaysUniform ( const Value * V) const | overridevirtual |
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Reimplemented from llvm::BasicTTIImplBase< GCNTTIImpl >.
Definition at line 1048 of file AMDGPUTargetTransformInfo.cpp.
References llvm::CallingConv::C, llvm::computeKnownBits(), llvm::BasicTTIImplBase< GCNTTIImpl >::DL, llvm::dyn_cast(), F, llvm::ExtractValueInst::getIndices(), llvm::User::getOperand(), I, llvm::CallBase::isInlineAsm(), isInlineAsmSourceOfDivergence(), llvm::AMDGPU::isIntrinsicAlwaysUniform(), llvm::PatternMatch::m_AShr(), llvm::PatternMatch::m_c_And(), llvm::PatternMatch::m_ConstantInt(), llvm::PatternMatch::m_Intrinsic(), llvm::PatternMatch::m_LShr(), llvm::PatternMatch::m_Value(), llvm::PatternMatch::match(), and llvm::ArrayRef< T >::size().
◆ isInlineAsmSourceOfDivergence()
◆ isLegalToVectorizeLoadChain()
| bool GCNTTIImpl::isLegalToVectorizeLoadChain ( unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace ) const | overridevirtual |
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◆ isLegalToVectorizeMemChain()
◆ isLegalToVectorizeStoreChain()
| bool GCNTTIImpl::isLegalToVectorizeStoreChain ( unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace ) const | overridevirtual |
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◆ isProfitableToSinkOperands()
◆ isReadRegisterSourceOfDivergence()
◆ isSourceOfDivergence()
| bool GCNTTIImpl::isSourceOfDivergence ( const Value * V) const | overridevirtual |
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◆ isValidAddrSpaceCast()
◆ rewriteIntrinsicWithAddressSpace()
Reimplemented from llvm::BasicTTIImplBase< GCNTTIImpl >.
Definition at line 1138 of file AMDGPUTargetTransformInfo.cpp.
References B(), llvm::computeKnownBits(), llvm::KnownBits::countMinLeadingOnes(), llvm::BasicTTIImplBase< GCNTTIImpl >::DL, llvm::Type::getContext(), llvm::ConstantInt::getFalse(), llvm::Intrinsic::getOrInsertDeclaration(), llvm::Type::getPointerAddressSpace(), llvm::ConstantInt::getTrue(), llvm::Value::getType(), II, llvm::AMDGPU::isExtendedGlobalAddrSpace(), llvm::AMDGPUTargetMachine::isNoopAddrSpaceCast(), llvm::AMDGPUAS::LOCAL_ADDRESS, and llvm::AMDGPUAS::PRIVATE_ADDRESS.
◆ shouldPrefetchAddressSpace()
| bool GCNTTIImpl::shouldPrefetchAddressSpace ( unsigned AS) const | overridevirtual |
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◆ simplifyAMDGCNLaneIntrinsicDemanded()
Definition at line 1912 of file AMDGPUInstCombineIntrinsic.cpp.
References llvm::InstCombiner::Builder, llvm::APInt::countr_zero(), llvm::IRBuilderBase::CreateCall(), llvm::IRBuilderBase::CreateExtractElement(), llvm::IRBuilderBase::CreateInsertElement(), llvm::IRBuilderBase::CreateShuffleVector(), llvm::dyn_cast(), llvm::FixedVectorType::get(), llvm::PoisonValue::get(), llvm::APInt::getActiveBits(), llvm::IRBuilderBase::GetInsertBlock(), llvm::BasicBlock::getModule(), llvm::Intrinsic::getOrInsertDeclaration(), I, II, and llvm::BasicTTIImplBase< GCNTTIImpl >::isTypeLegal().
Referenced by simplifyDemandedVectorEltsIntrinsic().
◆ simplifyDemandedLaneMaskArg()
◆ simplifyDemandedVectorEltsIntrinsic()
The documentation for this class was generated from the following files:
- lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
- lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
- lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp