LLVM: llvm::X86RegisterInfo Class Reference (original) (raw)

#include "[Target/X86/X86RegisterInfo.h](X86RegisterInfo%5F8h%5Fsource.html)"

Public Member Functions
X86RegisterInfo (const Triple &TT)
unsigned getNumSupportedRegs (const MachineFunction &MF) const override
Return the number of registers for the function.
const TargetRegisterClass * getMatchingSuperRegClass (const TargetRegisterClass *A, const TargetRegisterClass *B, unsigned Idx) const override
getMatchingSuperRegClass - Return a subclass of the specified register class A so that each register in it has a sub-register of the specified sub-register index which is in the specified register class B.
const TargetRegisterClass * getSubClassWithSubReg (const TargetRegisterClass *RC, unsigned Idx) const override
const TargetRegisterClass * getLargestLegalSuperClass (const TargetRegisterClass *RC, const MachineFunction &MF) const override
const TargetRegisterClass * getPointerRegClass (unsigned Kind=0) const override
getPointerRegClass - Returns a TargetRegisterClass used for pointer values.
const TargetRegisterClass * getCrossCopyRegClass (const TargetRegisterClass *RC) const override
getCrossCopyRegClass - Returns a legal register class to copy a register in the specified class to or from.
unsigned getRegPressureLimit (const TargetRegisterClass *RC, MachineFunction &MF) const override
const MCPhysReg * getCalleeSavedRegs (const MachineFunction *MF) const override
getCalleeSavedRegs - Return a null-terminated list of all of the callee-save registers on this target.
const MCPhysReg * getIPRACSRegs (const MachineFunction *MF) const override
getIPRACSRegs - This API can be removed when rbp is safe to optimized out when IPRA is on.
const MCPhysReg * getCalleeSavedRegsViaCopy (const MachineFunction *MF) const
const uint32_t * getCallPreservedMask (const MachineFunction &MF, CallingConv::ID) const override
const uint32_t * getNoPreservedMask () const override
const uint32_t * getDarwinTLSCallPreservedMask () const
BitVector getReservedRegs (const MachineFunction &MF) const override
getReservedRegs - Returns a bitset indexed by physical register number indicating if a register is a special register that has particular uses and should be considered unavailable at all times, e.g.
bool isArgumentRegister (const MachineFunction &MF, MCRegister Reg) const override
isArgumentReg - Returns true if Reg can be used as an argument to a function.
bool isTileRegisterClass (const TargetRegisterClass *RC) const
Return true if it is tile register class.
bool isFixedRegister (const MachineFunction &MF, MCRegister PhysReg) const override
Returns true if PhysReg is a fixed register.
void adjustStackMapLiveOutMask (uint32_t *Mask) const override
bool hasBasePointer (const MachineFunction &MF) const
bool canRealignStack (const MachineFunction &MF) const override
bool shouldRealignStack (const MachineFunction &MF) const override
void eliminateFrameIndex (MachineBasicBlock::iterator II, unsigned FIOperandNum, Register BaseReg, int FIOffset) const
bool eliminateFrameIndex (MachineBasicBlock::iterator MI, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override
bool eliminateFrameIndicesBackwards () const override
Process frame indices in forwards block order because X86InstrInfo::getSPAdjust relies on it when searching for the ADJCALLSTACKUP pseudo following a call.
unsigned findDeadCallerSavedReg (MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI) const
findDeadCallerSavedReg - Return a caller-saved register that isn't live when it reaches the "return" instruction.
Register getFrameRegister (const MachineFunction &MF) const override
Register getPtrSizedFrameRegister (const MachineFunction &MF) const
Register getPtrSizedStackRegister (const MachineFunction &MF) const
Register getStackRegister () const
Register getBaseRegister () const
Register getFramePtr () const
Returns physical register used as frame pointer.
unsigned getSlotSize () const
bool getRegAllocationHints (Register VirtReg, ArrayRef< MCPhysReg > Order, SmallVectorImpl< MCPhysReg > &Hints, const MachineFunction &MF, const VirtRegMap *VRM, const LiveRegMatrix *Matrix) const override
const TargetRegisterClass * constrainRegClassToNonRex2 (const TargetRegisterClass *RC) const
bool isNonRex2RegClass (const TargetRegisterClass *RC) const
bool requiresRegisterScavenging (const MachineFunction &MF) const override

Definition at line 25 of file X86RegisterInfo.h.

X86RegisterInfo::X86RegisterInfo ( const Triple & TT) explicit

adjustStackMapLiveOutMask()

void X86RegisterInfo::adjustStackMapLiveOutMask ( uint32_t * Mask) const override

canRealignStack()

constrainRegClassToNonRex2()

eliminateFrameIndex() [1/2]

eliminateFrameIndex() [2/2]

Definition at line 850 of file X86RegisterInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), assert(), llvm::BuildMI(), llvm::MachineOperand::ChangeToImmediate(), contains(), DL, llvm::StackOffset::getFixed(), llvm::X86FrameLowering::getFrameIndexReference(), llvm::X86FrameLowering::getFrameIndexReferenceSP(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getSubtarget(), llvm::X86FrameLowering::getWin64EHFrameIndexRef(), llvm::getX86SubSuperRegister(), II, llvm::X86FrameLowering::Is64Bit, llvm::MachineFrameInfo::isFixedObjectIndex(), llvm::isFuncletReturnInstr(), llvm::isInt(), MBB, MBBI, MI, llvm::Offset, Opc, TII, and tryOptimizeLEAtoMOV().

eliminateFrameIndicesBackwards()

bool llvm::X86RegisterInfo::eliminateFrameIndicesBackwards ( ) const inlineoverride

Process frame indices in forwards block order because X86InstrInfo::getSPAdjust relies on it when searching for the ADJCALLSTACKUP pseudo following a call.

TODO: Fix this and return true like all other targets.

Definition at line 150 of file X86RegisterInfo.h.

findDeadCallerSavedReg()

getBaseRegister()

Register llvm::X86RegisterInfo::getBaseRegister ( ) const inline

getCalleeSavedRegs()

getCalleeSavedRegs - Return a null-terminated list of all of the callee-save registers on this target.

Definition at line 239 of file X86RegisterInfo.cpp.

References llvm::CallingConv::AnyReg, assert(), llvm::MachineFunction::callsEHReturn(), llvm::CallingConv::CFGuard_Check, llvm::CallingConv::Cold, llvm::CallingConv::CXX_FAST_TLS, F, llvm::MachineFunction::getFunction(), llvm::MachineFunction::getInfo(), llvm::MachineFunction::getSubtarget(), llvm::X86Subtarget::getTargetLowering(), llvm::CallingConv::GHC, llvm::X86Subtarget::hasAVX(), llvm::X86Subtarget::hasAVX512(), llvm::Function::hasFnAttribute(), llvm::X86Subtarget::hasSSE1(), llvm::CallingConv::HiPE, llvm::CallingConv::Intel_OCL_BI, llvm::CallingConv::PreserveAll, llvm::CallingConv::PreserveMost, llvm::CallingConv::PreserveNone, llvm::X86TargetLowering::supportSwiftError(), llvm::CallingConv::SwiftTail, llvm::CallingConv::Win64, llvm::CallingConv::X86_64_SysV, llvm::CallingConv::X86_INTR, and llvm::CallingConv::X86_RegCall.

getCalleeSavedRegsViaCopy()

getCallPreservedMask()

Definition at line 383 of file X86RegisterInfo.cpp.

References llvm::CallingConv::AnyReg, assert(), llvm::CallingConv::CFGuard_Check, llvm::CallingConv::Cold, llvm::CallingConv::CXX_FAST_TLS, F, llvm::MachineFunction::getFunction(), llvm::MachineFunction::getSubtarget(), llvm::X86Subtarget::getTargetLowering(), llvm::CallingConv::GHC, llvm::X86Subtarget::hasAVX(), llvm::X86Subtarget::hasAVX512(), llvm::X86Subtarget::hasSSE1(), llvm::CallingConv::HiPE, llvm::CallingConv::Intel_OCL_BI, llvm::CallingConv::PreserveAll, llvm::CallingConv::PreserveMost, llvm::CallingConv::PreserveNone, llvm::X86TargetLowering::supportSwiftError(), llvm::CallingConv::SwiftTail, llvm::CallingConv::Win64, llvm::CallingConv::X86_64_SysV, llvm::CallingConv::X86_INTR, and llvm::CallingConv::X86_RegCall.

getCrossCopyRegClass()

getCrossCopyRegClass - Returns a legal register class to copy a register in the specified class to or from.

Returns NULL if it is possible to copy between a two registers of the specified class.

Definition at line 208 of file X86RegisterInfo.cpp.

getDarwinTLSCallPreservedMask()

const uint32_t * X86RegisterInfo::getDarwinTLSCallPreservedMask ( ) const

getFramePtr()

Register llvm::X86RegisterInfo::getFramePtr ( ) const inline

Returns physical register used as frame pointer.

This will always returns the frame pointer register, contrary to getFrameRegister() which returns the "base pointer" in situations involving a stack, frame and base pointer.

Definition at line 168 of file X86RegisterInfo.h.

getFrameRegister()

getIPRACSRegs()

getIPRACSRegs - This API can be removed when rbp is safe to optimized out when IPRA is on.

Definition at line 369 of file X86RegisterInfo.cpp.

getLargestLegalSuperClass()

getMatchingSuperRegClass()

getMatchingSuperRegClass - Return a subclass of the specified register class A so that each register in it has a sub-register of the specified sub-register index which is in the specified register class B.

Definition at line 101 of file X86RegisterInfo.cpp.

References A(), and B().

getNoPreservedMask()

const uint32_t * X86RegisterInfo::getNoPreservedMask ( ) const override

getNumSupportedRegs()

getPointerRegClass()

getPtrSizedFrameRegister()

getPtrSizedStackRegister()

getRegAllocationHints()

Definition at line 1076 of file X86RegisterInfo.cpp.

References assert(), llvm::SmallVectorImpl< T >::clear(), llvm::TargetRegisterClass::contains(), llvm::SmallSet< T, N, C >::count(), llvm::dbgs(), DisableRegAllocNDDHints, llvm::format_hex(), llvm::from_range, llvm::TargetRegisterClass::getID(), llvm::X86::getNonNDVariant(), llvm::VirtRegMap::getPhys(), llvm::TargetRegisterInfo::getRegAllocationHints(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), getTileShape(), llvm::SmallSet< T, N, C >::insert(), llvm::is_contained(), llvm::Register::isPhysical(), LLVM_DEBUG, Matrix, MI, MRI, llvm::MCRegister::NoRegister, OpIdx, llvm::SmallVectorTemplateBase< T, bool >::push_back(), Register, and TRI.

getRegPressureLimit()

getReservedRegs()

getReservedRegs - Returns a bitset indexed by physical register number indicating if a register is a special register that has particular uses and should be considered unavailable at all times, e.g.

SP, RA. This is used by register scavenger to determine what registers are free.

Definition at line 498 of file X86RegisterInfo.cpp.

References assert(), llvm::TargetOptions::FramePointerIsReserved(), getBaseRegister(), llvm::X86MachineFunctionInfo::getBPClobberedByInvoke(), llvm::Function::getCallingConv(), llvm::MachineFunction::getContext(), llvm::X86MachineFunctionInfo::getFPClobberedByInvoke(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getInfo(), llvm::MachineFunction::getSubtarget(), llvm::MachineFunction::getTarget(), llvm::getX86SubSuperRegister(), llvm::CallingConv::GRAAL, llvm::X86Subtarget::hasAVX512(), hasBasePointer(), llvm::TargetFrameLowering::hasFP(), llvm::MCRegAliasIterator::isValid(), llvm::TargetMachine::Options, llvm::MCContext::reportError(), llvm::Reserved, and SubReg.

getSlotSize()

unsigned llvm::X86RegisterInfo::getSlotSize ( ) const inline

getStackRegister()

Register llvm::X86RegisterInfo::getStackRegister ( ) const inline

getSubClassWithSubReg()

hasBasePointer()

isArgumentRegister()

isFixedRegister()

isNonRex2RegClass()

isTileRegisterClass()

requiresRegisterScavenging()

shouldRealignStack()


The documentation for this class was generated from the following files: