Linearity Research Papers - Academia.edu (original) (raw)

The purpose of this paper is to show the impact of design details on the performances of a Second Order Single Loop Delta-Sigma A/D CMOS converter, specified for 16 bit resolution and 15 bit linearity in the 0-4 kHz band with 2 MHz clock... more

The purpose of this paper is to show the impact of design details on the performances of a Second Order Single Loop Delta-Sigma A/D CMOS converter, specified for 16 bit resolution and 15 bit linearity in the 0-4 kHz band with 2 MHz clock frequency, taking into account +/- 3 ¿ dispersion due to process variations. Effect of MOS transistors noise, aliasing mechanisms and influence of crosstalks on quantization noise-shaping are analysed. Techniques used to improve dynamic range, to reduce electronic noise and to achieve a good shaping of quantization noise are discussed. Results from two practical realizations1 which use the same Sigma-Delta structure, the same 2-¿m 5-V CMOS process, but which respectively do not include and include above techniques, are compared.

It is generally accepted that people’s economic-choice behavior is motivated by the utility they derive from actual or expected consumption of real goods. The ratio of marginal utility from any such consumption today as opposed to the... more

It is generally accepted that people’s economic-choice behavior is motivated by the utility they derive from actual or expected consumption of real goods. The ratio of marginal utility from any such consumption today as opposed to the marginal utility of future consumption leads to real interest rates, and to relative prices denominated in units of consumption goods (or, utils per consumption). But, trading is done with prices given in terms of money. This intertemporal preference for consumption denominated in monetary terms is the basis for interest rate behavior. Thus, while consumption unit prices reflect people’s choices regarding intertemporal consumption behavior, in order to study the true consumption choices one needs to know how the prices denominated in consumption units are related to the money prices. Naim Sipra is also an author. Department of Finance, University of Colorado at Denver, Denver, Colorado

The linearity and analog performance of a Silicon Double Gate Tunnel Field Effect Transistor (DG-TFET) is investigated and the impact of elevated temperature on the device performance degradation has been studied. The impact on the... more

The linearity and analog performance of a Silicon Double Gate Tunnel Field Effect Transistor (DG-TFET) is investigated and the impact of elevated temperature on the device performance degradation has been studied. The impact on the device performance due to the rise in temperature and a gate stack (GS) architecture has also been investigated for the case of Silicon DG-MOSFET and a comparison with DGTFET is made. The parameters governing the analog performance and linearity have been studied, and high frequency simulations are carried out to determine the cut-off frequency of the device and its temperature dependence.

In design of analog circuits not only the gain and speed are important but power dissipation, supply voltage, linearity, noise and maximum voltage swing are also important. Noise limits the minimum signal level that a circuit can process... more

In design of analog circuits not only the gain and speed are important but power dissipation, supply voltage, linearity, noise and maximum voltage swing are also important. Noise limits the minimum signal level that a circuit can process with acceptable quality. Today analog designers constantly deal with the problem of noise because it trades with power dissipation, speed, and linearity. So in this paper a biquad GIC notch filter is design which provides low noise linearity. In this research, the design and VLSI implementation of active analog filter, based on the Generalized Impedance Converter (GIC) circuit, are presented. The analog features include the filter type (band pass, high pass, low pass or notch), the centre or cut off frequency, and the quality factor. The circuit is then modeled and simulated using the Cadence Design Tools software package. Active filters are implemented using a combination of passive and active (amplifying) components, and require an outside power source. Operational amplifiers are frequently used in active filter designs. These can have high Q factor, and can achieve resonance without the use of inductors. This paper presents a new biquad GIC notch filter topology for image rejection in heterodyne receivers and Front End receiver applications. The circuit contains two op-amp, resistors, and capacitor topology for testing purposes. It is implemented with standard CMOS 0.18μm technology. The circuit consumes 0.54 mW of power with a open loop gain 0dB, 1 dB compression point the linear gain obtained +7.5dBm at 1.1 kHz and 105 degree phase response , from a 1.8V power supply optimum.

The construction, the calibration, and the use of the NIST Thermodynamic Radiation Thermometer (TRT) to measure the temperature of the gold freezing temperature blackbody and a variable-temperature blackbody from 800 to 2,700°C are... more

The construction, the calibration, and the use of the NIST Thermodynamic Radiation Thermometer (TRT) to measure the temperature of the gold freezing temperature blackbody and a variable-temperature blackbody from 800 to 2,700°C are described. These temperature determinations are detector-based and derived from the electrical substitution radiometer and length units. The TRT is constructed using a cooled, near-infrared enhanced silicon detector with a room-temperature-stabilized five-position filter wheel. The characteristics of the TRT, such as the size-of-source effect and preamplifier linearity, are determined. The measured temperatures are compared with those obtained using the NIST Absolute Pyrometer 1 (AP1) and the current NIST standard radiation thermometer, the Photoelectric Pyrometer (PEP). After the performance assessments, the TRT will become the standard radiation thermometer for disseminating radiance temperature scales in the United States.

A class-AB power amplifier was designed for an envelope tracking (ET) application. Class-AB amplifier is widely used in wireless communication systems due to the compromise between linearity and efficiency. As a power device, Cree Gallium... more

A class-AB power amplifier was designed for an envelope tracking (ET) application. Class-AB amplifier is widely used in wireless communication systems due to the compromise between linearity and efficiency. As a power device, Cree Gallium Nitride High Electron Mobility Transistor (GaN HEMT) CGH4010F was chosen. The input and output matching networks were designed and simulated with Advanced Design System (ADS). After some optimization, the amplifier was fabricated using a Rogers RT/Duroid 5880 substrate. The amplifier together with a MAX2247 preamplifier as a driver was measured. A good agreement between the simulation and measurement results was observed. The maximum power added efficiency (PAE) is around 50 percents with the supply voltage Vsup= 10V and the maximum drain efficiency is around 75 percents with Vsup= 5V. An output power up to 42 dBm and good linearity of the output voltage with respect to the supply voltage in the range 0≪Vsup≪20V were achieved. Thus, the amplifier i...

In this paper a generalized discontinuous pulse width modulation (GDPWM) method with superior high modulation operating range performance characteristics is developed. An algorithm which employs the conventional space vector PWM method in... more

In this paper a generalized discontinuous pulse width modulation (GDPWM) method with superior high modulation operating range performance characteristics is developed. An algorithm which employs the conventional space vector PWM method in the low modulation range, and the GDPWM method in the high modulation range is established. As a result, the current waveform quality, switching losses, voltage linearity range and the overmodulation region voltage gain of a PWM-VSI drive are optimized online as opposed to conventional modulators with fixed characteristics. Due to its compactness, simplicity and superior performance, the algorithm is suitable for most high performance PWM-VSI drive applications. The paper provides a detailed performance analysis of the method and compares it to the other methods. Experimental results verify the superiority or this algorithm to conventional PWM methods

Complex nonconstant envelope high-order digital modulation schemes used in modern communication satellites bring new requirements for the linearity and power efficiency of the on-board traveling-wave tubes (TWTs). As a result, a... more

Complex nonconstant envelope high-order digital modulation schemes used in modern communication satellites bring new requirements for the linearity and power efficiency of the on-board traveling-wave tubes (TWTs). As a result, a reassessment of typical TWT specifications is required. A digital system-level figure-of-merit, the total degradation, is proposed. It accounts for the characteristics of any coded signaling scheme, as well as

A novel architecture for a first-order sigma-delta modulator is presented. The system can operate at a high sampling frequency, can be used as a building block for higher-order modulators, and uses circuit techniques that are largely... more

A novel architecture for a first-order sigma-delta modulator is presented. The system can operate at a high sampling frequency, can be used as a building block for higher-order modulators, and uses circuit techniques that are largely technology-independent. The system was realized in a 2-μm n-well double-metal single-poly CMOS technology. The integrated modulator circuit works accurately with a maximum sampling frequency of 30 MHz. A sampling frequency of 18.5 MHz gives the best results in terms of signal-to-noise ratio (SNR). The oversampling ratio is 128. The Nyquist frequency is 144 kHz and the baseband limit is 72 kHz. The corresponding theoretical SNR is 63 dB, or equivalent to a resolution of 10.5 b

In this paper, an analysis of the crest factor reduction effects' on the predistortion performance of 3G multi-carrier power amplifiers is carried out. This study is performed at three different levels: the power amplifier level, the... more

In this paper, an analysis of the crest factor reduction effects' on the predistortion performance of 3G multi-carrier power amplifiers is carried out. This study is performed at three different levels: the power amplifier level, the digital predistorter level, and the system level (linearized amplifier) for a Doherty amplifier driven by 3-carrier WCDMA signal. At the amplifier level, the use of crest factor reduction results in higher power efficiency, increased output power but also distortions. Experimental results show that this compromises the performance of the digital predistorter. The system level analysis highlighted that, in such case, the gained efficiency at the amplifier level will be lost after linearization. This is the first study that points out and experimentally reports the drawbacks of crest factor reduction when applied to digitally predistorted multi-carrier power amplifiers.

In this paper, a C++ class for analising Vector Boolean Functions from a cryptographic perspective is presented. This implementation uses the NTL library from Victor Shoup, replacing some of the general purpose modules of this library by... more

In this paper, a C++ class for analising Vector Boolean Functions from a cryptographic perspective is presented. This implementation uses the NTL library from Victor Shoup, replacing some of the general purpose modules of this library by some more specialized and better suited to cryptography, and adding new modules that complement the existing ones. With this class, we can obtain