LLVM: lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp File Reference (original) (raw)

This file implements the targeting of the InstructionSelector class for RISC-V. More...

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Namespaces
namespace llvm
This is an optimization pass for GlobalISel generic memory operations.
Macros
#define DEBUG_TYPE "riscv-isel"
#define GET_GLOBALISEL_PREDICATE_BITSET
#define GET_GLOBALISEL_PREDICATES_DECL
#define GET_GLOBALISEL_TEMPORARIES_DECL
#define GET_GLOBALISEL_IMPL
#define GET_GLOBALISEL_PREDICATES_INIT
#define GET_GLOBALISEL_TEMPORARIES_INIT
Functions
static void getOperandsForBranch (Register CondReg, RISCVCC::CondCode &CC, Register &LHS, Register &RHS, MachineRegisterInfo &MRI)
static unsigned selectZalasrLoadStoreOp (unsigned GenericOpc, unsigned OpSize)
Select the RISC-V Zalasr opcode for the G_LOAD or G_STORE operation GenericOpc, appropriate for the GPR register bank and of memory access size OpSize.
static unsigned selectRegImmLoadStoreOp (unsigned GenericOpc, unsigned OpSize)
Select the RISC-V regimm opcode for the G_LOAD or G_STORE operation GenericOpc, appropriate for the GPR register bank and of memory access size OpSize.
static unsigned getFCmpOpcode (CmpInst::Predicate Pred, unsigned Size)
static bool legalizeFCmpPredicate (Register &LHS, Register &RHS, CmpInst::Predicate &Pred, bool &NeedInvert)
InstructionSelector * llvm::createRISCVInstructionSelector (const RISCVTargetMachine &TM, const RISCVSubtarget &Subtarget, const RISCVRegisterBankInfo &RBI)

This file implements the targeting of the InstructionSelector class for RISC-V.

Todo

This should be generated by TableGen.

Definition in file RISCVInstructionSelector.cpp.

DEBUG_TYPE

#define DEBUG_TYPE "riscv-isel"

GET_GLOBALISEL_IMPL

#define GET_GLOBALISEL_IMPL

GET_GLOBALISEL_PREDICATE_BITSET

#define GET_GLOBALISEL_PREDICATE_BITSET

GET_GLOBALISEL_PREDICATES_DECL

#define GET_GLOBALISEL_PREDICATES_DECL

GET_GLOBALISEL_PREDICATES_INIT

#define GET_GLOBALISEL_PREDICATES_INIT

GET_GLOBALISEL_TEMPORARIES_DECL

#define GET_GLOBALISEL_TEMPORARIES_DECL

GET_GLOBALISEL_TEMPORARIES_INIT

#define GET_GLOBALISEL_TEMPORARIES_INIT

getFCmpOpcode()

getOperandsForBranch()

Definition at line 622 of file RISCVInstructionSelector.cpp.

References llvm::CmpInst::BAD_ICMP_PREDICATE, llvm::RISCVCC::COND_GE, llvm::RISCVCC::COND_NE, llvm::getIConstantVRegSExtVal(), llvm::CmpInst::getSwappedPredicate(), llvm::CmpInst::ICMP_EQ, llvm::CmpInst::ICMP_NE, llvm::CmpInst::ICMP_SGE, llvm::CmpInst::ICMP_SGT, llvm::CmpInst::ICMP_SLE, llvm::CmpInst::ICMP_SLT, llvm::CmpInst::ICMP_UGE, llvm::CmpInst::ICMP_UGT, llvm::CmpInst::ICMP_ULE, llvm::CmpInst::ICMP_ULT, LHS, llvm_unreachable, llvm::MIPatternMatch::m_GICmp(), llvm::MIPatternMatch::m_Pred(), llvm::MIPatternMatch::m_Reg(), llvm::MIPatternMatch::mi_match(), MRI, RHS, and std::swap().

legalizeFCmpPredicate()

selectRegImmLoadStoreOp()

Select the RISC-V regimm opcode for the G_LOAD or G_STORE operation GenericOpc, appropriate for the GPR register bank and of memory access size OpSize.

Returns

GenericOpc if the combination is unsupported.

Definition at line 708 of file RISCVInstructionSelector.cpp.

selectZalasrLoadStoreOp()

Select the RISC-V Zalasr opcode for the G_LOAD or G_STORE operation GenericOpc, appropriate for the GPR register bank and of memory access size OpSize.

Definition at line 689 of file RISCVInstructionSelector.cpp.

References llvm_unreachable.