LLVM: llvm::HexagonHazardRecognizer Class Reference (original) (raw)

#include "[Target/Hexagon/HexagonHazardRecognizer.h](HexagonHazardRecognizer%5F8h%5Fsource.html)"

Public Member Functions
HexagonHazardRecognizer (const InstrItineraryData *II, const HexagonInstrInfo *HII, const HexagonSubtarget &ST)
~HexagonHazardRecognizer () override
void Reset () override
This callback is invoked when a new block of instructions is about to be scheduled.
HazardType getHazardType (SUnit *SU, int stalls) override
Return the hazard type of emitting this node.
void EmitInstruction (SUnit *) override
This callback is invoked when an instruction is emitted to be scheduled, to advance the hazard state.
bool ShouldPreferAnother (SUnit *) override
This callback may be invoked if getHazardType returns NoHazard.
void AdvanceCycle () override
This callback is invoked whenever the next top-down instruction to be scheduled cannot issue in the current cycle, either because of latency or resource conflicts.
Public Member Functions inherited from llvm::ScheduleHazardRecognizer
ScheduleHazardRecognizer ()=default
virtual ~ScheduleHazardRecognizer ()
unsigned getMaxLookAhead () const
bool isEnabled () const
virtual bool atIssueLimit () const
atIssueLimit - Return true if no more instructions may be issued in this cycle.
virtual void EmitInstruction (MachineInstr *)
This overload will be used when the hazard recognizer is being used by a non-scheduling pass, which does not use SUnits.
virtual unsigned PreEmitNoops (SUnit *)
PreEmitNoops - This callback is invoked prior to emitting an instruction.
virtual unsigned PreEmitNoops (MachineInstr *)
This overload will be used when the hazard recognizer is being used by a non-scheduling pass, which does not use SUnits.
virtual void RecedeCycle ()
RecedeCycle - This callback is invoked whenever the next bottom-up instruction to be scheduled cannot issue in the current cycle, either because of latency or resource conflicts.
virtual void EmitNoop ()
EmitNoop - This callback is invoked when a noop was added to the instruction stream.
virtual void EmitNoops (unsigned Quantity)
EmitNoops - This callback is invoked when noops were added to the instruction stream.
Additional Inherited Members
Public Types inherited from llvm::ScheduleHazardRecognizer
enum HazardType { NoHazard, Hazard, NoopHazard }
Protected Attributes inherited from llvm::ScheduleHazardRecognizer
unsigned MaxLookAhead = 0
MaxLookAhead - Indicate the number of cycles in the scoreboard state.

Definition at line 22 of file HexagonHazardRecognizer.h.

~HexagonHazardRecognizer()

llvm::HexagonHazardRecognizer::~HexagonHazardRecognizer ( ) inlineoverride

AdvanceCycle()

void HexagonHazardRecognizer::AdvanceCycle ( ) overridevirtual

This callback is invoked whenever the next top-down instruction to be scheduled cannot issue in the current cycle, either because of latency or resource conflicts.

This should increment the internal state of the hazard recognizer so that previously "Hazard" instructions will now not be hazards.

Reimplemented from llvm::ScheduleHazardRecognizer.

Definition at line 72 of file HexagonHazardRecognizer.cpp.

References llvm::dbgs(), and LLVM_DEBUG.

EmitInstruction()

void HexagonHazardRecognizer::EmitInstruction ( SUnit * SU) overridevirtual

This callback is invoked when an instruction is emitted to be scheduled, to advance the hazard state.

Reimplemented from llvm::ScheduleHazardRecognizer.

Definition at line 112 of file HexagonHazardRecognizer.cpp.

References assert(), llvm::dbgs(), llvm::SUnit::getInstr(), llvm::MachineOperand::getReg(), llvm::MachineInstr::insert(), llvm::MachineOperand::isDef(), llvm::MachineOperand::isImplicit(), llvm::MachineOperand::isReg(), LLVM_DEBUG, MI, and llvm::SUnit::Succs.

getHazardType()

Reset()

void HexagonHazardRecognizer::Reset ( ) overridevirtual

ShouldPreferAnother()

bool HexagonHazardRecognizer::ShouldPreferAnother ( SUnit * SU) overridevirtual

This callback may be invoked if getHazardType returns NoHazard.

Handle the cases when we prefer one instruction over another.

If, even though there is no hazard, it would be better to schedule another available instruction, this callback should return true.

Case 1 - we prefer not to generate multiple loads in the packet to avoid a potential bank conflict. Case 2 - if a packet contains a dot cur instruction, then we prefer the instruction that can use the dot cur result. However, if the use is not scheduled in the same packet, then prefer other instructions in the subsequent packet. Case 3 - we prefer a vector store that can be converted to a .new store. The packetizer will not generate the .new store if the store doesn't have resources to fit in the packet (but the .new store may have resources). We attempt to schedule the store as soon as possible to help packetize the two instructions together.

Reimplemented from llvm::ScheduleHazardRecognizer.

Definition at line 95 of file HexagonHazardRecognizer.cpp.

References llvm::SUnit::getInstr(), llvm::SUnit::isInstr(), and llvm::MachineInstr::mayLoad().


The documentation for this class was generated from the following files: