LLVM: llvm::HexagonSubtarget Class Reference (original) (raw)
#include "[Target/Hexagon/HexagonSubtarget.h](HexagonSubtarget%5F8h%5Fsource.html)"
| Public Member Functions |
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HexagonSubtarget (const Triple &TT, StringRef CPU, StringRef FS, const TargetMachine &TM) |
| const Triple & |
getTargetTriple () const |
| bool |
isEnvironmentMusl () const |
| const InstrItineraryData * |
getInstrItineraryData () const override |
|
getInstrItins - Return the instruction itineraries based on subtarget selection. |
| const HexagonInstrInfo * |
getInstrInfo () const override |
| const HexagonRegisterInfo * |
getRegisterInfo () const override |
| const HexagonTargetLowering * |
getTargetLowering () const override |
| const HexagonFrameLowering * |
getFrameLowering () const override |
| const HexagonSelectionDAGInfo * |
getSelectionDAGInfo () const override |
| HexagonSubtarget & |
initializeSubtargetDependencies (StringRef CPU, StringRef FS) |
| void |
ParseSubtargetFeatures (StringRef CPU, StringRef TuneCPU, StringRef FS) |
|
ParseSubtargetFeatures - Parses features string setting specified subtarget options. |
| bool |
isXRaySupported () const override |
| bool |
hasV5Ops () const |
| bool |
hasV5OpsOnly () const |
| bool |
hasV55Ops () const |
| bool |
hasV55OpsOnly () const |
| bool |
hasV60Ops () const |
| bool |
hasV60OpsOnly () const |
| bool |
hasV62Ops () const |
| bool |
hasV62OpsOnly () const |
| bool |
hasV65Ops () const |
| bool |
hasV65OpsOnly () const |
| bool |
hasV66Ops () const |
| bool |
hasV66OpsOnly () const |
| bool |
hasV67Ops () const |
| bool |
hasV67OpsOnly () const |
| bool |
hasV68Ops () const |
| bool |
hasV68OpsOnly () const |
| bool |
hasV69Ops () const |
| bool |
hasV69OpsOnly () const |
| bool |
hasV71Ops () const |
| bool |
hasV71OpsOnly () const |
| bool |
hasV73Ops () const |
| bool |
hasV73OpsOnly () const |
| bool |
hasV75Ops () const |
| bool |
hasV75OpsOnly () const |
| bool |
hasV79Ops () const |
| bool |
hasV79OpsOnly () const |
| bool |
useHVXV79Ops () const |
| bool |
hasV81Ops () const |
| bool |
hasV81OpsOnly () const |
| bool |
useHVXV81Ops () const |
| bool |
useAudioOps () const |
| bool |
useCompound () const |
| bool |
useLongCalls () const |
| bool |
useMemops () const |
| bool |
usePackets () const |
| bool |
useNewValueJumps () const |
| bool |
useNewValueStores () const |
| bool |
useSmallData () const |
| bool |
useZRegOps () const |
| bool |
useCabac () const |
| bool |
isTinyCore () const |
| bool |
isTinyCoreWithDuplex () const |
| bool |
useHVXIEEEFPOps () const |
| bool |
useHVXQFloatOps () const |
| bool |
useHVXFloatingPoint () const |
| bool |
useHVXOps () const |
| bool |
useHVXV60Ops () const |
| bool |
useHVXV62Ops () const |
| bool |
useHVXV65Ops () const |
| bool |
useHVXV66Ops () const |
| bool |
useHVXV67Ops () const |
| bool |
useHVXV68Ops () const |
| bool |
useHVXV69Ops () const |
| bool |
useHVXV71Ops () const |
| bool |
useHVXV73Ops () const |
| bool |
useHVX128BOps () const |
| bool |
useHVX64BOps () const |
| bool |
hasMemNoShuf () const |
| bool |
hasReservedR19 () const |
| bool |
usePredicatedCalls () const |
| bool |
noreturnStackElim () const |
| bool |
useBSBScheduling () const |
| bool |
enableMachineScheduler () const override |
| bool |
enableMachineSchedDefaultSched () const override |
| AntiDepBreakMode |
getAntiDepBreakMode () const override |
| bool |
enablePostRAScheduler () const override |
|
True if the subtarget should run a scheduler after register allocation. |
| bool |
enableSubRegLiveness () const override |
| const std::string & |
getCPUString () const |
| const Hexagon::ArchEnum & |
getHexagonArchVersion () const |
| void |
getPostRAMutations (std::vector< std::unique_ptr< ScheduleDAGMutation > > &Mutations) const override |
| void |
getSMSMutations (std::vector< std::unique_ptr< ScheduleDAGMutation > > &Mutations) const override |
| bool |
useAA () const override |
|
Enable use of alias analysis during code generation (during MI scheduling, DAGCombine, etc.). |
| void |
adjustSchedDependency (SUnit *Def, int DefOpIdx, SUnit *Use, int UseOpIdx, SDep &Dep, const TargetSchedModel *SchedModel) const override |
|
Perform target specific adjustments to the latency of a schedule dependency. |
| unsigned |
getVectorLength () const |
| ArrayRef< MVT > |
getHVXElementTypes () const |
| bool |
isHVXElementType (MVT Ty, bool IncludeBool=false) const |
| bool |
isHVXVectorType (EVT VecTy, bool IncludeBool=false) const |
| bool |
isTypeForHVX (Type *VecTy, bool IncludeBool=false) const |
| Align |
getTypeAlignment (MVT Ty) const |
| unsigned |
getL1CacheLineSize () const |
| unsigned |
getL1PrefetchDistance () const |
| Intrinsic::ID |
getIntrinsicId (unsigned Opc) const |
Definition at line 43 of file HexagonSubtarget.h.
◆ adjustSchedDependency()
Perform target specific adjustments to the latency of a schedule dependency.
Definition at line 434 of file HexagonSubtarget.cpp.
References llvm::HexagonInstrInfo::canExecuteInBundle(), llvm::SmallPtrSetImplBase::clear(), EnableDotCurSched, getInstrInfo(), llvm::SDep::getLatency(), llvm::MachineInstr::getNumOperands(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::SDep::isArtificial(), llvm::MachineInstr::isCopy(), llvm::MachineOperand::isReg(), llvm::MachineInstr::isRegSequence(), llvm::HexagonInstrInfo::isToBeScheduledASAP(), llvm::MachineOperand::isUse(), llvm::Latency, and llvm::SDep::setLatency().
◆ enableMachineSchedDefaultSched()
| bool llvm::HexagonSubtarget::enableMachineSchedDefaultSched ( ) const |
inlineoverride |
◆ enableMachineScheduler()
| bool HexagonSubtarget::enableMachineScheduler ( ) const |
override |
◆ enablePostRAScheduler()
| bool llvm::HexagonSubtarget::enablePostRAScheduler ( ) const |
inlineoverride |
True if the subtarget should run a scheduler after register allocation.
Definition at line 307 of file HexagonSubtarget.h.
◆ enableSubRegLiveness()
| bool HexagonSubtarget::enableSubRegLiveness ( ) const |
override |
◆ getAntiDepBreakMode()
| AntiDepBreakMode llvm::HexagonSubtarget::getAntiDepBreakMode ( ) const |
inlineoverride |
◆ getCPUString()
| const std::string & llvm::HexagonSubtarget::getCPUString ( ) const |
inline |
◆ getFrameLowering()
◆ getHexagonArchVersion()
Definition at line 313 of file HexagonSubtarget.h.
References HexagonArchVersion.
Referenced by hasV55Ops(), hasV55OpsOnly(), hasV5Ops(), hasV5OpsOnly(), hasV60Ops(), hasV60OpsOnly(), hasV62Ops(), hasV62OpsOnly(), hasV65Ops(), hasV65OpsOnly(), hasV66Ops(), hasV66OpsOnly(), hasV67Ops(), hasV67OpsOnly(), hasV68Ops(), hasV68OpsOnly(), hasV69Ops(), hasV69OpsOnly(), hasV71Ops(), hasV71OpsOnly(), hasV73Ops(), hasV73OpsOnly(), hasV75Ops(), hasV75OpsOnly(), hasV79Ops(), hasV79OpsOnly(), hasV81Ops(), and hasV81OpsOnly().
◆ getHVXElementTypes()
| ArrayRef< MVT > llvm::HexagonSubtarget::getHVXElementTypes ( ) const |
inline |
◆ getInstrInfo()
◆ getInstrItineraryData()
getInstrItins - Return the instruction itineraries based on subtarget selection.
Definition at line 119 of file HexagonSubtarget.h.
◆ getIntrinsicId()
◆ getL1CacheLineSize()
| unsigned HexagonSubtarget::getL1CacheLineSize |
( |
) |
const |
◆ getL1PrefetchDistance()
| unsigned HexagonSubtarget::getL1PrefetchDistance |
( |
) |
const |
◆ getPostRAMutations()
| void HexagonSubtarget::getPostRAMutations ( std::vector< std::unique_ptr< ScheduleDAGMutation > > & Mutations) const |
override |
◆ getRegisterInfo()
◆ getSelectionDAGInfo()
◆ getSMSMutations()
| void HexagonSubtarget::getSMSMutations ( std::vector< std::unique_ptr< ScheduleDAGMutation > > & Mutations) const |
override |
◆ getTargetLowering()
◆ getTargetTriple()
| const Triple & llvm::HexagonSubtarget::getTargetTriple ( ) const |
inline |
◆ getTypeAlignment()
| Align llvm::HexagonSubtarget::getTypeAlignment ( MVT Ty) const |
inline |
◆ getVectorLength()
| unsigned llvm::HexagonSubtarget::getVectorLength ( ) const |
inline |
◆ hasMemNoShuf()
| bool llvm::HexagonSubtarget::hasMemNoShuf ( ) const |
inline |
◆ hasReservedR19()
| bool llvm::HexagonSubtarget::hasReservedR19 ( ) const |
inline |
◆ hasV55Ops()
| bool llvm::HexagonSubtarget::hasV55Ops ( ) const |
inline |
◆ hasV55OpsOnly()
| bool llvm::HexagonSubtarget::hasV55OpsOnly ( ) const |
inline |
◆ hasV5Ops()
| bool llvm::HexagonSubtarget::hasV5Ops ( ) const |
inline |
◆ hasV5OpsOnly()
| bool llvm::HexagonSubtarget::hasV5OpsOnly ( ) const |
inline |
◆ hasV60Ops()
| bool llvm::HexagonSubtarget::hasV60Ops ( ) const |
inline |
◆ hasV60OpsOnly()
| bool llvm::HexagonSubtarget::hasV60OpsOnly ( ) const |
inline |
◆ hasV62Ops()
| bool llvm::HexagonSubtarget::hasV62Ops ( ) const |
inline |
◆ hasV62OpsOnly()
| bool llvm::HexagonSubtarget::hasV62OpsOnly ( ) const |
inline |
◆ hasV65Ops()
| bool llvm::HexagonSubtarget::hasV65Ops ( ) const |
inline |
◆ hasV65OpsOnly()
| bool llvm::HexagonSubtarget::hasV65OpsOnly ( ) const |
inline |
◆ hasV66Ops()
| bool llvm::HexagonSubtarget::hasV66Ops ( ) const |
inline |
◆ hasV66OpsOnly()
| bool llvm::HexagonSubtarget::hasV66OpsOnly ( ) const |
inline |
◆ hasV67Ops()
| bool llvm::HexagonSubtarget::hasV67Ops ( ) const |
inline |
◆ hasV67OpsOnly()
| bool llvm::HexagonSubtarget::hasV67OpsOnly ( ) const |
inline |
◆ hasV68Ops()
| bool llvm::HexagonSubtarget::hasV68Ops ( ) const |
inline |
◆ hasV68OpsOnly()
| bool llvm::HexagonSubtarget::hasV68OpsOnly ( ) const |
inline |
◆ hasV69Ops()
| bool llvm::HexagonSubtarget::hasV69Ops ( ) const |
inline |
◆ hasV69OpsOnly()
| bool llvm::HexagonSubtarget::hasV69OpsOnly ( ) const |
inline |
◆ hasV71Ops()
| bool llvm::HexagonSubtarget::hasV71Ops ( ) const |
inline |
◆ hasV71OpsOnly()
| bool llvm::HexagonSubtarget::hasV71OpsOnly ( ) const |
inline |
◆ hasV73Ops()
| bool llvm::HexagonSubtarget::hasV73Ops ( ) const |
inline |
◆ hasV73OpsOnly()
| bool llvm::HexagonSubtarget::hasV73OpsOnly ( ) const |
inline |
◆ hasV75Ops()
| bool llvm::HexagonSubtarget::hasV75Ops ( ) const |
inline |
◆ hasV75OpsOnly()
| bool llvm::HexagonSubtarget::hasV75OpsOnly ( ) const |
inline |
◆ hasV79Ops()
| bool llvm::HexagonSubtarget::hasV79Ops ( ) const |
inline |
◆ hasV79OpsOnly()
| bool llvm::HexagonSubtarget::hasV79OpsOnly ( ) const |
inline |
◆ hasV81Ops()
| bool llvm::HexagonSubtarget::hasV81Ops ( ) const |
inline |
◆ hasV81OpsOnly()
| bool llvm::HexagonSubtarget::hasV81OpsOnly ( ) const |
inline |
◆ initializeSubtargetDependencies()
Definition at line 87 of file HexagonSubtarget.cpp.
References llvm::SubtargetFeatures::AddFeature(), llvm::Hexagon_MC::completeHVXFeatures(), llvm::StringRef::consumeInteger(), llvm::count_if(), llvm::dbgs(), llvm::StringRef::drop_front(), EnableBSBSched, F, llvm::Hexagon::getCpu(), llvm::SubtargetFeatures::getFeatures(), llvm::SubtargetFeatures::getString(), hasV60Ops(), hasV68Ops(), HexagonArchVersion, llvm::HexagonDisableDuplex, isTinyCore(), LLVM_DEBUG, llvm_unreachable, OverrideLongCalls, ParseSubtargetFeatures(), llvm::FeatureBitset::reset(), llvm::reverse(), llvm::StringRef::starts_with(), UseBSBScheduling, and useHVXV68Ops().
Referenced by HexagonSubtarget().
◆ isEnvironmentMusl()
| bool llvm::HexagonSubtarget::isEnvironmentMusl ( ) const |
inline |
◆ isHVXElementType()
| bool HexagonSubtarget::isHVXElementType |
( |
MVT |
Ty, |
| bool |
IncludeBool = false ) const |
|
|
◆ isHVXVectorType()
| bool HexagonSubtarget::isHVXVectorType |
( |
EVT |
VecTy, |
| bool |
IncludeBool = false ) const |
|
|
Definition at line 179 of file HexagonSubtarget.cpp.
References getHVXElementTypes(), llvm::EVT::getSimpleVT(), llvm::EVT::getSizeInBits(), llvm::MVT::getVectorElementType(), getVectorLength(), llvm::EVT::getVectorNumElements(), llvm::is_contained(), llvm::EVT::isScalableVector(), llvm::EVT::isSimple(), llvm::EVT::isVector(), T, and useHVXOps().
Referenced by getTypeAlignment(), and isTypeForHVX().
◆ isTinyCore()
| bool llvm::HexagonSubtarget::isTinyCore ( ) const |
inline |
◆ isTinyCoreWithDuplex()
| bool llvm::HexagonSubtarget::isTinyCoreWithDuplex ( ) const |
inline |
◆ isTypeForHVX()
| bool HexagonSubtarget::isTypeForHVX |
( |
Type * |
VecTy, |
| bool |
IncludeBool = false ) const |
|
|
Definition at line 207 of file HexagonSubtarget.cpp.
References llvm::EVT::getEVT(), llvm::HexagonTargetLowering::getPreferredVectorAction(), llvm::Type::getScalarType(), getTargetLowering(), llvm::MVT::getVectorElementType(), llvm::MVT::getVectorVT(), llvm::isa(), llvm::Type::isFloatingPointTy(), isHVXVectorType(), llvm::Type::isIntegerTy(), llvm::MVT::isValid(), llvm::Type::isVectorTy(), llvm::PowerOf2Ceil(), llvm::TargetLoweringBase::TypeWidenVector, and useHVXFloatingPoint().
◆ isXRaySupported()
| bool llvm::HexagonSubtarget::isXRaySupported ( ) const |
inlineoverride |
◆ noreturnStackElim()
| bool llvm::HexagonSubtarget::noreturnStackElim ( ) const |
inline |
◆ ParseSubtargetFeatures()
ParseSubtargetFeatures - Parses features string setting specified subtarget options.
Definition of function is auto generated by tblgen.
Referenced by initializeSubtargetDependencies().
◆ useAA()
| bool HexagonSubtarget::useAA ( ) const |
override |
◆ useAudioOps()
| bool llvm::HexagonSubtarget::useAudioOps ( ) const |
inline |
◆ useBSBScheduling()
| bool llvm::HexagonSubtarget::useBSBScheduling ( ) const |
inline |
◆ useCabac()
| bool llvm::HexagonSubtarget::useCabac ( ) const |
inline |
◆ useCompound()
| bool llvm::HexagonSubtarget::useCompound ( ) const |
inline |
◆ useHVX128BOps()
| bool llvm::HexagonSubtarget::useHVX128BOps ( ) const |
inline |
◆ useHVX64BOps()
| bool llvm::HexagonSubtarget::useHVX64BOps ( ) const |
inline |
◆ useHVXFloatingPoint()
| bool llvm::HexagonSubtarget::useHVXFloatingPoint ( ) const |
inline |
◆ useHVXIEEEFPOps()
| bool llvm::HexagonSubtarget::useHVXIEEEFPOps ( ) const |
inline |
◆ useHVXOps()
| bool llvm::HexagonSubtarget::useHVXOps ( ) const |
inline |
◆ useHVXQFloatOps()
| bool llvm::HexagonSubtarget::useHVXQFloatOps ( ) const |
inline |
◆ useHVXV60Ops()
| bool llvm::HexagonSubtarget::useHVXV60Ops ( ) const |
inline |
◆ useHVXV62Ops()
| bool llvm::HexagonSubtarget::useHVXV62Ops ( ) const |
inline |
◆ useHVXV65Ops()
| bool llvm::HexagonSubtarget::useHVXV65Ops ( ) const |
inline |
◆ useHVXV66Ops()
| bool llvm::HexagonSubtarget::useHVXV66Ops ( ) const |
inline |
◆ useHVXV67Ops()
| bool llvm::HexagonSubtarget::useHVXV67Ops ( ) const |
inline |
◆ useHVXV68Ops()
| bool llvm::HexagonSubtarget::useHVXV68Ops ( ) const |
inline |
◆ useHVXV69Ops()
| bool llvm::HexagonSubtarget::useHVXV69Ops ( ) const |
inline |
◆ useHVXV71Ops()
| bool llvm::HexagonSubtarget::useHVXV71Ops ( ) const |
inline |
◆ useHVXV73Ops()
| bool llvm::HexagonSubtarget::useHVXV73Ops ( ) const |
inline |
◆ useHVXV79Ops()
| bool llvm::HexagonSubtarget::useHVXV79Ops ( ) const |
inline |
◆ useHVXV81Ops()
| bool llvm::HexagonSubtarget::useHVXV81Ops ( ) const |
inline |
◆ useLongCalls()
| bool llvm::HexagonSubtarget::useLongCalls ( ) const |
inline |
◆ useMemops()
| bool llvm::HexagonSubtarget::useMemops ( ) const |
inline |
◆ useNewValueJumps()
| bool llvm::HexagonSubtarget::useNewValueJumps ( ) const |
inline |
◆ useNewValueStores()
| bool llvm::HexagonSubtarget::useNewValueStores ( ) const |
inline |
◆ usePackets()
| bool llvm::HexagonSubtarget::usePackets ( ) const |
inline |
◆ usePredicatedCalls()
| bool HexagonSubtarget::usePredicatedCalls |
( |
) |
const |
◆ useSmallData()
| bool llvm::HexagonSubtarget::useSmallData ( ) const |
inline |
◆ useZRegOps()
| bool llvm::HexagonSubtarget::useZRegOps ( ) const |
inline |
◆ HexagonArchVersion
◆ HexagonHVXVersion
Definition at line 71 of file HexagonSubtarget.h.
Referenced by useHVXOps(), useHVXQFloatOps(), useHVXV60Ops(), useHVXV62Ops(), useHVXV65Ops(), useHVXV66Ops(), useHVXV67Ops(), useHVXV68Ops(), useHVXV69Ops(), useHVXV71Ops(), useHVXV73Ops(), useHVXV79Ops(), and useHVXV81Ops().
◆ OptLevel
◆ UseBSBScheduling
bool llvm::HexagonSubtarget::UseBSBScheduling
The documentation for this class was generated from the following files: