A systolic architecture for modulo multiplication (original) (raw)

Profile image of Khaled ElleithyKhaled Elleithy

1995, IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

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MathematicsComputer ScienceVLSIResidue Number SystemNew TechnologyVery Large Scale IntegrationArithmeticThroughputAccelerationCmosImplementationMultiplierCircuit DesignSimple CellAddersAdderElectrical And Electronic Engine...Matrix Multiplication AlgorithmSystolic arraymodulo