LLVM: llvm::ScheduleDAGSDNodes Class Reference (original) (raw)

ScheduleDAGSDNodes - A ScheduleDAG for scheduling SDNode-based DAGs. More...

#include "[CodeGen/SelectionDAG/ScheduleDAGSDNodes.h](ScheduleDAGSDNodes%5F8h%5Fsource.html)"

Public Member Functions
ScheduleDAGSDNodes (MachineFunction &mf)
~ScheduleDAGSDNodes () override=default
void Run (SelectionDAG *dag, MachineBasicBlock *bb)
Run - perform scheduling.
SUnit * newSUnit (SDNode *N)
NewSUnit - Creates a new SUnit and return a ptr to it.
SUnit * Clone (SUnit *Old)
Clone - Creates a clone of the specified SUnit.
void BuildSchedGraph ()
BuildSchedGraph - Build the SUnit graph from the selection dag that we are input.
void InitNumRegDefsLeft (SUnit *SU)
InitNumRegDefsLeft - Determine the # of regs defined by this node.
virtual void computeLatency (SUnit *SU)
computeLatency - Compute node latency.
virtual void computeOperandLatency (SDNode *Def, SDNode *Use, unsigned OpIdx, SDep &dep) const
virtual void Schedule ()=0
Schedule - Order nodes according to selected style, filling in the Sequence member.
void VerifyScheduledSequence (bool isBottomUp)
VerifyScheduledSequence - Verify that all SUnits are scheduled and consistent with the Sequence of scheduled instructions.
virtual MachineBasicBlock * EmitSchedule (MachineBasicBlock::iterator &InsertPos)
EmitSchedule - Insert MachineInstrs into the MachineBasicBlock according to the order specified in Sequence.
void dumpNode (const SUnit &SU) const override
void dump () const override
void dumpSchedule () const
std::string getGraphNodeLabel (const SUnit *SU) const override
Returns a label for an SUnit node in a visualization of the ScheduleDAG.
std::string getDAGName () const override
Return the basic block label.
virtual void getCustomGraphFeatures (GraphWriter< ScheduleDAG * > &GW) const
Public Member Functions inherited from llvm::ScheduleDAG
ScheduleDAG (const ScheduleDAG &)=delete
ScheduleDAG & operator= (const ScheduleDAG &)=delete
ScheduleDAG (MachineFunction &mf)
virtual ~ScheduleDAG ()
void clearDAG ()
Clears the DAG state (between regions).
const MCInstrDesc * getInstrDesc (const SUnit *SU) const
Returns the MCInstrDesc of this SUnit.
virtual void viewGraph (const Twine &Name, const Twine &Title)
Pops up a GraphViz/gv window with the ScheduleDAG rendered using 'dot'.
virtual void viewGraph ()
Out-of-line implementation with no arguments is handy for gdb.
void dumpNodeName (const SUnit &SU) const
virtual void addCustomGraphFeatures (GraphWriter< ScheduleDAG * > &) const
Adds custom features for a visualization of the ScheduleDAG.
unsigned VerifyScheduledDAG (bool isBottomUp)
Verifies that all SUnits were scheduled and that their state is consistent.
Static Public Member Functions
static bool isPassiveNode (SDNode *Node)
isPassiveNode - Return true if the node is a non-scheduled leaf.
Public Attributes
MachineBasicBlock * BB = nullptr
SelectionDAG * DAG = nullptr
const InstrItineraryData * InstrItins
std::vector< SUnit * > Sequence
The schedule. Null SUnit*'s represent noop instructions.
Public Attributes inherited from llvm::ScheduleDAG
const TargetMachine & TM
Target processor.
const TargetInstrInfo * TII
Target instruction information.
const TargetRegisterInfo * TRI
Target processor register info.
MachineFunction & MF
Machine function.
MachineRegisterInfo & MRI
Virtual/real register map.
std::vector< SUnit > SUnits
The scheduling units.
SUnit EntrySU
Special node for the region entry.
SUnit ExitSU
Special node for the region exit.
bool StressSched

ScheduleDAGSDNodes - A ScheduleDAG for scheduling SDNode-based DAGs.

Edges between SUnits are initially based on edges in the SelectionDAG, and additional edges can be added by the schedulers as heuristics. SDNodes such as Constants, Registers, and a few others that are not interesting to schedulers are not allocated SUnits.

SDNodes with MVT::Glue operands are grouped along with the flagged nodes into a single SUnit so that they are scheduled together.

SDNode-based scheduling graphs do not use SDep::Anti or SDep::Output edges. Physical register dependence information is not carried in the DAG and must be handled explicitly by schedulers.

Definition at line 46 of file ScheduleDAGSDNodes.h.

~ScheduleDAGSDNodes()

llvm::ScheduleDAGSDNodes::~ScheduleDAGSDNodes ( ) overridedefault

BuildSchedGraph()

void ScheduleDAGSDNodes::BuildSchedGraph ( )

BuildSchedGraph - Build the SUnit graph from the selection dag that we are input.

This SUnit graph is similar to the SelectionDAG, but excludes nodes that aren't interesting to scheduling, and represents flagged together nodes with a single SUnit.

This SUnit graph is similar to the SelectionDAG, but excludes nodes that aren't interesting to scheduling, and represents glued together nodes with a single SUnit.

Definition at line 533 of file ScheduleDAGSDNodes.cpp.

Clone()

Clone - Creates a clone of the specified SUnit.

It does not copy the predecessors / successors info nor the temporary scheduling states.

Definition at line 90 of file ScheduleDAGSDNodes.cpp.

References llvm::SUnit::getNode(), llvm::SUnit::hasPhysRegClobbers, llvm::SUnit::hasPhysRegDefs, llvm::SUnit::isCall, llvm::SUnit::isCallOp, llvm::SUnit::isCloned, llvm::SUnit::isCommutable, llvm::SUnit::isScheduleHigh, llvm::SUnit::isScheduleLow, llvm::SUnit::isTwoAddress, llvm::SUnit::isVRegCycle, llvm::SUnit::Latency, newSUnit(), llvm::SUnit::OrigNode, and llvm::SUnit::SchedulingPref.

computeLatency()

void ScheduleDAGSDNodes::computeLatency ( SUnit * SU) virtual

computeOperandLatency()

Definition at line 644 of file ScheduleDAGSDNodes.cpp.

References BB, llvm::cast(), llvm::ISD::CopyToReg, llvm::SDep::Data, forceUnitLatencies(), llvm::SDep::getKind(), InstrItins, llvm::Latency, OpIdx, llvm::SDep::setLatency(), and llvm::ScheduleDAG::TII.

dump()

void ScheduleDAGSDNodes::dump ( ) const overridevirtual

dumpNode()

void ScheduleDAGSDNodes::dumpNode ( const SUnit & SU) const overridevirtual

Implements llvm::ScheduleDAG.

Definition at line 672 of file ScheduleDAGSDNodes.cpp.

References llvm::SmallVectorTemplateCommon< T, typename >::back(), DAG, llvm::dbgs(), llvm::SDNode::dump(), llvm::ScheduleDAG::dumpNodeName(), llvm::SmallVectorTemplateCommon< T, typename >::empty(), llvm::SDNode::getGluedNode(), llvm::SUnit::getNode(), N, llvm::SmallVectorTemplateBase< T, bool >::pop_back(), and llvm::SmallVectorTemplateBase< T, bool >::push_back().

Referenced by dumpSchedule().

dumpSchedule()

void ScheduleDAGSDNodes::dumpSchedule ( ) const

EmitSchedule()

EmitSchedule - Insert MachineInstrs into the MachineBasicBlock according to the order specified in Sequence.

EmitSchedule - Emit the machine code in scheduled order.

Return the new InsertPos and MachineBasicBlock that contains this insertion point. ScheduleDAGSDNodes holds a BB pointer for convenience, but this does not necessarily refer to returned BB. The emitter may split blocks.

Definition at line 845 of file ScheduleDAGSDNodes.cpp.

References assert(), llvm::SmallVectorTemplateCommon< T, typename >::back(), BB, llvm::SmallVectorTemplateCommon< T, typename >::begin(), DAG, Emitter, llvm::SmallVectorTemplateCommon< T, typename >::empty(), llvm::MachineBasicBlock::end(), llvm::SmallVectorTemplateCommon< T, typename >::end(), llvm::MachineBasicBlock::getFirstTerminator(), llvm::SDNode::getGluedNode(), llvm::SUnit::getNode(), I, llvm::MachineBasicBlock::insert(), llvm::SUnit::isCloned, llvm::make_early_inc_range(), llvm::make_range(), llvm::ScheduleDAG::MF, MI, N, llvm::MachineInstr::NoMerge, llvm::SUnit::OrigNode, llvm::SmallVectorTemplateBase< T, bool >::pop_back(), ProcessSourceNode(), llvm::SmallVectorTemplateBase< T, bool >::push_back(), Sequence, llvm::SmallVectorTemplateCommon< T, typename >::size(), llvm::stable_sort(), and llvm::ScheduleDAG::TII.

forceUnitLatencies()

virtual bool llvm::ScheduleDAGSDNodes::forceUnitLatencies ( ) const inlineprotectedvirtual

getCustomGraphFeatures()

getDAGName()

std::string ScheduleDAGSDNodes::getDAGName ( ) const overridevirtual

getGraphNodeLabel()

std::string ScheduleDAGSDNodes::getGraphNodeLabel ( const SUnit * SU) const overridevirtual

Returns a label for an SUnit node in a visualization of the ScheduleDAG.

Implements llvm::ScheduleDAG.

Definition at line 284 of file SelectionDAGPrinter.cpp.

References llvm::SmallVectorTemplateCommon< T, typename >::back(), DAG, llvm::SmallVectorTemplateCommon< T, typename >::empty(), llvm::SUnit::getNode(), N, llvm::SUnit::NodeNum, llvm::SmallVectorTemplateBase< T, bool >::pop_back(), and llvm::SmallVectorTemplateBase< T, bool >::push_back().

InitNumRegDefsLeft()

void ScheduleDAGSDNodes::InitNumRegDefsLeft ( SUnit * SU )

isPassiveNode()

bool llvm::ScheduleDAGSDNodes::isPassiveNode ( SDNode * Node) inlinestatic

newSUnit()

Run()

Schedule()

virtual void llvm::ScheduleDAGSDNodes::Schedule ( ) pure virtual

Schedule - Order nodes according to selected style, filling in the Sequence member.

Referenced by Run().

VerifyScheduledSequence()

void ScheduleDAGSDNodes::VerifyScheduledSequence ( bool isBottomUp )

BB

DAG

InstrItins

Sequence

std::vector<SUnit*> llvm::ScheduleDAGSDNodes::Sequence


The documentation for this class was generated from the following files: