LLVM: llvm::ARCInstrInfo Class Reference (original) (raw)

#include "[Target/ARC/ARCInstrInfo.h](ARCInstrInfo%5F8h%5Fsource.html)"

Public Member Functions
ARCInstrInfo (const ARCSubtarget &)
const ARCRegisterInfo & getRegisterInfo () const
Register isLoadFromStackSlot (const MachineInstr &MI, int &FrameIndex) const override
If the specified machine instruction is a direct load from a stack slot, return the virtual or physical register number of the destination along with the FrameIndex of the loaded stack slot.
Register isStoreToStackSlot (const MachineInstr &MI, int &FrameIndex) const override
If the specified machine instruction is a direct store to a stack slot, return the virtual or physical register number of the source reg along with the FrameIndex of the loaded stack slot.
unsigned getInstSizeInBytes (const MachineInstr &MI) const override
bool analyzeBranch (MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const override
Analyze the branching code at the end of MBB, returning true if it cannot be understood (e.g.
unsigned insertBranch (MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &, int *BytesAdded=nullptr) const override
unsigned removeBranch (MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override
void copyPhysReg (MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &, Register DestReg, Register SrcReg, bool KillSrc, bool RenamableDest=false, bool RenamableSrc=false) const override
void storeRegToStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register SrcReg, bool IsKill, int FrameIndex, const TargetRegisterClass *RC, Register VReg, MachineInstr::MIFlag Flags=MachineInstr::NoFlags) const override
void loadRegFromStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register DestReg, int FrameIndex, const TargetRegisterClass *RC, Register VReg, MachineInstr::MIFlag Flags=MachineInstr::NoFlags) const override
bool reverseBranchCondition (SmallVectorImpl< MachineOperand > &Cond) const override
Return the inverse opcode of the specified Branch instruction.
bool isPostIncrement (const MachineInstr &MI) const override
bool isPreIncrement (const MachineInstr &MI) const
virtual bool getBaseAndOffsetPosition (const MachineInstr &MI, unsigned &BasePos, unsigned &OffsetPos) const override
MachineBasicBlock::iterator loadImmediate (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned Reg, uint64_t Value) const

Definition at line 26 of file ARCInstrInfo.h.

◆ analyzeBranch()

Analyze the branching code at the end of MBB, returning true if it cannot be understood (e.g.

it's a switch dispatch or isn't implemented for a target). Upon success, this returns false and returns with the following information in various cases:

  1. If this block ends with no branches (it just falls through to its succ) just return false, leaving TBB/FBB null.
  2. If this block ends with only an unconditional branch, it sets TBB to be the destination block.
  3. If this block ends with a conditional branch and it falls through to a successor block, it sets TBB to be the branch destination block and a list of operands that evaluate the condition. These operands can be passed to other TargetInstrInfo methods to create new branches.
  4. If this block ends with a conditional branch followed by an unconditional branch, it returns the 'true' destination in TBB, the 'false' destination in FBB, and a list of operands that evaluate the condition. These operands can be passed to other TargetInstrInfo methods to create new branches.

Note that RemoveBranch and insertBranch must be implemented to support cases where this method returns success.

If AllowModify is true, then this routine is allowed to modify the basic block (e.g. delete instructions after the unconditional branch).

Definition at line 171 of file ARCInstrInfo.cpp.

References assert(), Cond, llvm::MachineInstr::eraseFromParent(), I, llvm::isCondBranchOpcode(), isJumpOpcode(), llvm::isUncondBranchOpcode(), MBB, and TBB.

◆ copyPhysReg()

◆ getBaseAndOffsetPosition()

◆ getInstSizeInBytes()

◆ getRegisterInfo()

◆ insertBranch()

◆ isLoadFromStackSlot()

If the specified machine instruction is a direct load from a stack slot, return the virtual or physical register number of the destination along with the FrameIndex of the loaded stack slot.

If not, return 0. This predicate must return 0 if the instruction has any side effects other than loading from the stack slot.

Definition at line 69 of file ARCInstrInfo.cpp.

References isLoad(), isZeroImm(), and MI.

◆ isPostIncrement()

◆ isPreIncrement()

◆ isStoreToStackSlot()

If the specified machine instruction is a direct store to a stack slot, return the virtual or physical register number of the source reg along with the FrameIndex of the loaded stack slot.

If not, return 0. This predicate must return 0 if the instruction has any side effects other than storing to the stack slot.

Definition at line 88 of file ARCInstrInfo.cpp.

References isStore(), isZeroImm(), and MI.

◆ loadImmediate()

◆ loadRegFromStackSlot()

Definition at line 322 of file ARCInstrInfo.cpp.

References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMemOperand(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), llvm::dbgs(), llvm::RegState::Define, DL, llvm::get(), llvm::MachinePointerInfo::getFixedStack(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getMachineMemOperand(), llvm::MachineFrameInfo::getObjectAlign(), llvm::MachineFrameInfo::getObjectSize(), I, LLVM_DEBUG, MBB, llvm::MachineMemOperand::MOLoad, llvm::printReg(), and TRI.

◆ removeBranch()

◆ reverseBranchCondition()

◆ storeRegToStackSlot()

Definition at line 295 of file ARCInstrInfo.cpp.

References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMemOperand(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), llvm::dbgs(), DL, llvm::get(), llvm::MachinePointerInfo::getFixedStack(), llvm::MachineFunction::getFrameInfo(), llvm::getKillRegState(), llvm::MachineFunction::getMachineMemOperand(), llvm::MachineFrameInfo::getObjectAlign(), llvm::MachineFrameInfo::getObjectSize(), I, LLVM_DEBUG, MBB, llvm::MachineMemOperand::MOStore, llvm::printReg(), and TRI.

The documentation for this class was generated from the following files: