LLVM: lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp File Reference (original ) (raw )Go to the source code of this file.
Functions
STATISTIC (NumPairCreated, "Number of load /store pair instructions generated")
STATISTIC (NumPostFolded, "Number of post-index updates folded")
STATISTIC (NumPreFolded, "Number of pre-index updates folded")
STATISTIC (NumUnscaledPairCreated, "Number of load /store from unscaled generated")
STATISTIC (NumZeroStoresPromoted, "Number of narrow zero stores promoted")
STATISTIC (NumLoadsFromStoresPromoted, "Number of loads from stores promoted")
STATISTIC (NumFailedAlignmentCheck, "Number of load /store pair transformation " "not passed the alignment check")
STATISTIC (NumConstOffsetFolded, "Number of const offset of index address folded")
DEBUG_COUNTER (RegRenamingCounter, DEBUG_TYPE "-reg-renaming", "Controls which pairs are considered for renaming")
INITIALIZE_PASS (AArch64LoadStoreOpt, "aarch64-ldst-opt", AARCH64_LOAD_STORE_OPT_NAME , false, false) static bool isNarrowStore(unsigned Opc )
static bool
isTagStore (const MachineInstr &MI )
static unsigned
getMatchingNonSExtOpcode (unsigned Opc , bool *IsValidLdStrOpc=nullptr)
static unsigned
getMatchingWideOpcode (unsigned Opc )
static unsigned
getMatchingPairOpcode (unsigned Opc )
static unsigned
isMatchingStore (MachineInstr &LoadInst , MachineInstr &StoreInst )
static unsigned
getPreIndexedOpcode (unsigned Opc )
static unsigned
getBaseAddressOpcode (unsigned Opc )
static unsigned
getPostIndexedOpcode (unsigned Opc )
static bool
isPreLdStPairCandidate (MachineInstr &FirstMI, MachineInstr &MI )
static void
getPrePostIndexedMemOpInfo (const MachineInstr &MI , int &Scale, int &MinOffset, int &MaxOffset)
static MachineOperand &
getLdStRegOp (MachineInstr &MI , unsigned PairedRegOp=0)
static bool
isLdOffsetInRangeOfSt (MachineInstr &LoadInst , MachineInstr &StoreInst , const AArch64InstrInfo *TII )
static bool
isPromotableZeroStoreInst (MachineInstr &MI )
static bool
isPromotableLoadFromStore (MachineInstr &MI )
static bool
isMergeableLdStUpdate (MachineInstr &MI , AArch64FunctionInfo &AFI)
static bool
isMergeableIndexLdSt (MachineInstr &MI , int &Scale)
static bool
isRewritableImplicitDef (unsigned Opc )
static bool
forAllMIsUntilDef (MachineInstr &MI , MCPhysReg DefReg, const TargetRegisterInfo *TRI , unsigned Limit, std::function < bool (MachineInstr &, bool )> &Fn)
static void
updateDefinedRegisters (MachineInstr &MI , LiveRegUnits &Units, const TargetRegisterInfo *TRI )
static void
addDebugSubstitutionsToTable (MachineFunction *MF, unsigned InstrNumToSet, MachineInstr &OriginalInstr, MachineInstr &MergedInstr)
This function will add a new entry into the debugValueSubstitutions table when two instruction have been merged into a new one represented by MergedInstr.
static bool
inBoundsForPair (bool IsUnscaled, int Offset, int OffsetStride)
static int
alignTo (int Num, int PowOf2)
static bool
mayAlias (MachineInstr &MIa, SmallVectorImpl < MachineInstr * > &MemInsns, AliasAnalysis *AA)
static bool
needsWinCFI (const MachineFunction *MF)
static bool
areCandidatesToMergeOrPair (MachineInstr &FirstMI, MachineInstr &MI , LdStPairFlags &Flags, const AArch64InstrInfo *TII )
static bool
canRenameMOP (const MachineOperand &MOP, const TargetRegisterInfo *TRI )
static bool
canRenameUpToDef (MachineInstr &FirstMI, LiveRegUnits &UsedInBetween, SmallPtrSetImpl < const TargetRegisterClass * > &RequiredClasses, const TargetRegisterInfo *TRI )
static bool
canRenameUntilSecondLoad (MachineInstr &FirstLoad, MachineInstr &SecondLoad, LiveRegUnits &UsedInBetween, SmallPtrSetImpl < const TargetRegisterClass * > &RequiredClasses, const TargetRegisterInfo *TRI )
static std::optional< MCPhysReg >
tryToFindRegisterToRename (const MachineFunction &MF, Register Reg , LiveRegUnits &DefinedInBB, LiveRegUnits &UsedInBetween, SmallPtrSetImpl < const TargetRegisterClass * > &RequiredClasses, const TargetRegisterInfo *TRI )
static std::optional< MCPhysReg >
findRenameRegForSameLdStRegPair (std::optional< bool > MaybeCanRename, MachineInstr &FirstMI, MachineInstr &MI , Register Reg , LiveRegUnits &DefinedInBB, LiveRegUnits &UsedInBetween, SmallPtrSetImpl < const TargetRegisterClass * > &RequiredClasses, const TargetRegisterInfo *TRI )
static MachineBasicBlock::iterator
maybeMoveCFI (MachineInstr &MI , MachineBasicBlock::iterator MaybeCFI)
◆ AARCH64_LOAD_STORE_OPT_NAME◆ DEBUG_TYPE#define DEBUG_TYPE "aarch64-ldst-opt"
◆ addDebugSubstitutionsToTable()◆ alignTo()
int alignTo ( int Num , int PowOf2 )
static
◆ areCandidatesToMergeOrPair()Definition at line 1648 of file AArch64LoadStoreOptimizer.cpp .
References assert() , llvm::MachineInstr::FrameDestroy , llvm::MachineInstr::FrameSetup , getLdStRegOp() , getMatchingNonSExtOpcode() , getMatchingPairOpcode() , llvm::MachineInstr::getOpcode() , llvm::MachineOperand::getReg() , llvm::MachineInstr::hasOrderedMemoryRef() , llvm::AArch64InstrInfo::isPreLdSt() , isPreLdStPairCandidate() , MI , needsWinCFI() , and TII .
◆ canRenameMOP()Definition at line 1717 of file AArch64LoadStoreOptimizer.cpp .
References llvm::dbgs() , llvm::MachineInstr::getOpcode() , llvm::MachineInstr::getOperand() , llvm::MachineOperand::getParent() , llvm::MachineOperand::getReg() , llvm::MachineOperand::isDef() , llvm::MachineOperand::isEarlyClobber() , llvm::MachineOperand::isImplicit() , llvm::MachineOperand::isReg() , llvm::MachineOperand::isRenamable() , isRewritableImplicitDef() , llvm::MachineOperand::isTied() , LLVM_DEBUG , and TRI .
Referenced by canRenameUpToDef() .
◆ canRenameUntilSecondLoad()◆ canRenameUpToDef()Definition at line 1753 of file AArch64LoadStoreOptimizer.cpp .
References llvm::LiveRegUnits::accumulate() , llvm::any_of() , canRenameMOP() , llvm::dbgs() , forAllMIsUntilDef() , llvm::MachineInstr::FrameSetup , getLdStRegOp() , llvm::MachineOperand::getReg() , llvm::SmallPtrSetImpl< PtrType >::insert() , llvm::MachineOperand::isDebug() , llvm::MachineOperand::isDef() , llvm::MachineOperand::isReg() , LdStLimit , LLVM_DEBUG , llvm::MachineInstr::mayStore() , MI , llvm::MachineInstr::operands() , and TRI .
Referenced by findRenameRegForSameLdStRegPair() .
◆ DEBUG_COUNTER()
DEBUG_COUNTER
(
RegRenamingCounter
,
DEBUG_TYPE "-reg-renaming"
,
"Controls which pairs are considered for renaming"
)
◆ findRenameRegForSameLdStRegPair()Definition at line 1945 of file AArch64LoadStoreOptimizer.cpp .
References canRenameUntilSecondLoad() , canRenameUpToDef() , getLdStRegOp() , llvm::MachineBasicBlock::getParent() , llvm::MachineInstr::getParent() , getReg() , llvm::MachineFunction::getRegInfo() , llvm::MachineInstr::mayLoad() , MI , Reg , llvm::DebugCounter::shouldExecute() , llvm::MachineRegisterInfo::tracksLiveness() , TRI , and tryToFindRegisterToRename() .
◆ forAllMIsUntilDef()◆ getBaseAddressOpcode()◆ getLdStRegOp()◆ getMatchingNonSExtOpcode()◆ getMatchingPairOpcode()◆ getMatchingWideOpcode()◆ getPostIndexedOpcode()◆ getPreIndexedOpcode()◆ getPrePostIndexedMemOpInfo()
void getPrePostIndexedMemOpInfo ( const MachineInstr & MI , int & Scale , int & MinOffset , int & MaxOffset )
static
◆ inBoundsForPair()
bool inBoundsForPair ( bool IsUnscaled , int Offset , int OffsetStride )
static
◆ INITIALIZE_PASS()
◆ isLdOffsetInRangeOfSt()◆ isMatchingStore()◆ isMergeableIndexLdSt()◆ isMergeableLdStUpdate()◆ isPreLdStPairCandidate()◆ isRewritableImplicitDef()◆ mayAlias()◆ maybeMoveCFI()◆ needsWinCFI()◆ STATISTIC() [1/8]
STATISTIC
(
NumConstOffsetFolded
,
"Number of const offset of index address folded"
)
◆ STATISTIC() [2/8]
STATISTIC
(
NumFailedAlignmentCheck
,
"Number of load /store pair transformation " "not passed the alignment check"
)
◆ STATISTIC() [3/8]
STATISTIC
(
NumLoadsFromStoresPromoted
,
"Number of loads from stores promoted"
)
◆ STATISTIC() [4/8]
STATISTIC
(
NumPairCreated
,
"Number of load /store pair instructions generated"
)
◆ STATISTIC() [5/8]
STATISTIC
(
NumPostFolded
,
"Number of post-index updates folded"
)
◆ STATISTIC() [6/8]
STATISTIC
(
NumPreFolded
,
"Number of pre-index updates folded"
)
◆ STATISTIC() [7/8]
STATISTIC
(
NumUnscaledPairCreated
,
"Number of load /store from unscaled generated"
)
◆ STATISTIC() [8/8]
STATISTIC
(
NumZeroStoresPromoted
,
"Number of narrow zero stores promoted"
)
◆ tryToFindRegisterToRename()Definition at line 1901 of file AArch64LoadStoreOptimizer.cpp .
References llvm::LiveRegUnits::addReg() , llvm::all_of() , llvm::any_of() , llvm::LiveRegUnits::available() , llvm::CallingConv::C , llvm::dbgs() , llvm::MachineFunction::getRegInfo() , LLVM_DEBUG , llvm::printReg() , Reg , and TRI .
Referenced by findRenameRegForSameLdStRegPair() .
◆ updateDefinedRegisters()◆ EnableRenaming
cl::opt < bool > EnableRenaming("aarch64-load -store-renaming", cl::init(true), cl::Hidden) ( "aarch64-load -store-renaming" , cl::init(true) , cl::Hidden )
static
◆ LdStConstLimit
cl::opt < unsigned > LdStConstLimit("aarch64-load -store-const -scan-limit", cl::init(10), cl::Hidden) ( "aarch64-load -store-const -scan-limit" , cl::init(10) , cl::Hidden )
static
◆ LdStLimit
cl::opt < unsigned > LdStLimit("aarch64-load -store-scan-limit", cl::init(20), cl::Hidden) ( "aarch64-load -store-scan-limit" , cl::init(20) , cl::Hidden )
static
◆ UpdateLimit
cl::opt < unsigned > UpdateLimit("aarch64-update-scan-limit", cl::init(100), cl::Hidden) ( "aarch64-update-scan-limit" , cl::init(100) , cl::Hidden )
static