LLVM: llvm::AArch64TTIImpl Class Reference (original) (raw)

#include "[Target/AArch64/AArch64TargetTransformInfo.h](AArch64TargetTransformInfo%5F8h%5Fsource.html)"

Public Member Functions
AArch64TTIImpl (const AArch64TargetMachine *TM, const Function &F)
bool areInlineCompatible (const Function *Caller, const Function *Callee) const override
bool areTypesABICompatible (const Function *Caller, const Function *Callee, ArrayRef< Type * > Types) const override
unsigned getInlineCallPenalty (const Function *F, const CallBase &Call, unsigned DefaultCallPenalty) const override
APInt getFeatureMask (const Function &F) const override
bool isMultiversionedFunction (const Function &F) const override
Scalar TTI Implementations
InstructionCost getIntImmCost (int64_t Val) const
Calculate the cost of materializing a 64-bit value.
InstructionCost getIntImmCost (const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind) const override
Calculate the cost of materializing the given constant.
InstructionCost getIntImmCostInst (unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind, Instruction *Inst=nullptr) const override
InstructionCost getIntImmCostIntrin (Intrinsic::ID IID, unsigned Idx, const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind) const override
TTI::PopcntSupportKind getPopcntSupport (unsigned TyWidth) const override
Vector TTI Implementations
bool enableInterleavedAccessVectorization () const override
bool enableMaskedInterleavedAccessVectorization () const override
unsigned getNumberOfRegisters (unsigned ClassID) const override
InstructionCost getIntrinsicInstrCost (const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind) const override
std::optional< Instruction * > instCombineIntrinsic (InstCombiner &IC, IntrinsicInst &II) const override
std::optional< Value * > simplifyDemandedVectorEltsIntrinsic (InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3, std::function< void(Instruction *, unsigned, APInt, APInt &)> SimplifyAndSetOp) const override
TypeSize getRegisterBitWidth (TargetTransformInfo::RegisterKind K) const override
unsigned getMinVectorRegisterBitWidth () const override
std::optional< unsigned > getVScaleForTuning () const override
bool isVScaleKnownToBeAPowerOfTwo () const override
bool shouldMaximizeVectorBandwidth (TargetTransformInfo::RegisterKind K) const override
unsigned getMaxNumElements (ElementCount VF) const
Try to return an estimate cost factor that can be used as a multiplier when scalarizing an operation for a vector with ElementCount VF.
unsigned getMaxInterleaveFactor (ElementCount VF) const override
bool prefersVectorizedAddressing () const override
bool hasKnownLowerThroughputFromSchedulingModel (unsigned Opcode1, unsigned Opcode2) const
Check whether Opcode1 has less throughput according to the scheduling model than Opcode2.
InstructionCost getMemIntrinsicInstrCost (const MemIntrinsicCostAttributes &MICA, TTI::TargetCostKind CostKind) const override
InstructionCost getMaskedMemoryOpCost (const MemIntrinsicCostAttributes &MICA, TTI::TargetCostKind CostKind) const
InstructionCost getGatherScatterOpCost (const MemIntrinsicCostAttributes &MICA, TTI::TargetCostKind CostKind) const
bool isExtPartOfAvgExpr (const Instruction *ExtUser, Type *Dst, Type *Src) const
InstructionCost getCastInstrCost (unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I=nullptr) const override
InstructionCost getExtractWithExtendCost (unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index, TTI::TargetCostKind CostKind) const override
InstructionCost getCFInstrCost (unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I=nullptr) const override
InstructionCost getVectorInstrCost (unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index, const Value *Op0, const Value *Op1) const override
InstructionCost getVectorInstrCost (unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index, Value *Scalar, ArrayRef< std::tuple< Value *, User *, int > > ScalarUserAndIdx) const override
InstructionCost getVectorInstrCost (const Instruction &I, Type *Val, TTI::TargetCostKind CostKind, unsigned Index) const override
InstructionCost getIndexedVectorInstrCostFromEnd (unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index) const override
InstructionCost getMinMaxReductionCost (Intrinsic::ID IID, VectorType *Ty, FastMathFlags FMF, TTI::TargetCostKind CostKind) const override
InstructionCost getArithmeticReductionCostSVE (unsigned Opcode, VectorType *ValTy, TTI::TargetCostKind CostKind) const
InstructionCost getSpliceCost (VectorType *Tp, int Index, TTI::TargetCostKind CostKind) const
InstructionCost getArithmeticInstrCost (unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Op1Info={TTI::OK_AnyValue, TTI::OP_None}, TTI::OperandValueInfo Op2Info={TTI::OK_AnyValue, TTI::OP_None}, ArrayRef< const Value * > Args={}, const Instruction *CxtI=nullptr) const override
InstructionCost getAddressComputationCost (Type *PtrTy, ScalarEvolution *SE, const SCEV *Ptr, TTI::TargetCostKind CostKind) const override
InstructionCost getCmpSelInstrCost (unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Op1Info={TTI::OK_AnyValue, TTI::OP_None}, TTI::OperandValueInfo Op2Info={TTI::OK_AnyValue, TTI::OP_None}, const Instruction *I=nullptr) const override
TTI::MemCmpExpansionOptions enableMemCmpExpansion (bool OptSize, bool IsZeroCmp) const override
bool useNeonVector (const Type *Ty) const
InstructionCost getMemoryOpCost (unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, TTI::OperandValueInfo OpInfo={TTI::OK_AnyValue, TTI::OP_None}, const Instruction *I=nullptr) const override
InstructionCost getCostOfKeepingLiveOverCall (ArrayRef< Type * > Tys) const override
void getUnrollingPreferences (Loop *L, ScalarEvolution &SE, TTI::UnrollingPreferences &UP, OptimizationRemarkEmitter *ORE) const override
void getPeelingPreferences (Loop *L, ScalarEvolution &SE, TTI::PeelingPreferences &PP) const override
Value * getOrCreateResultFromMemIntrinsic (IntrinsicInst *Inst, Type *ExpectedType, bool CanCreate=true) const override
bool getTgtMemIntrinsic (IntrinsicInst *Inst, MemIntrinsicInfo &Info) const override
bool isElementTypeLegalForScalableVector (Type *Ty) const override
bool isLegalMaskedLoadStore (Type *DataType, Align Alignment) const
bool isLegalMaskedLoad (Type *DataType, Align Alignment, unsigned, TTI::MaskKind) const override
bool isLegalMaskedStore (Type *DataType, Align Alignment, unsigned, TTI::MaskKind) const override
bool isElementTypeLegalForCompressStore (Type *Ty) const
bool isLegalMaskedCompressStore (Type *DataType, Align Alignment) const override
bool isLegalMaskedGatherScatter (Type *DataType) const
bool isLegalMaskedGather (Type *DataType, Align Alignment) const override
bool isLegalMaskedScatter (Type *DataType, Align Alignment) const override
bool isLegalBroadcastLoad (Type *ElementTy, ElementCount NumElements) const override
bool isLegalNTStoreLoad (Type *DataType, Align Alignment) const
bool isLegalNTStore (Type *DataType, Align Alignment) const override
bool isLegalNTLoad (Type *DataType, Align Alignment) const override
InstructionCost getPartialReductionCost (unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType, ElementCount VF, TTI::PartialReductionExtendKind OpAExtend, TTI::PartialReductionExtendKind OpBExtend, std::optional< unsigned > BinOp, TTI::TargetCostKind CostKind) const override
bool enableOrderedReductions () const override
InstructionCost getInterleavedMemoryOpCost (unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef< unsigned > Indices, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, bool UseMaskForCond=false, bool UseMaskForGaps=false) const override
bool shouldConsiderAddressTypePromotion (const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const override
See if I should be considered for address type promotion.
bool shouldExpandReduction (const IntrinsicInst *II) const override
unsigned getGISelRematGlobalCost () const override
unsigned getMinTripCountTailFoldingThreshold () const override
TailFoldingStyle getPreferredTailFoldingStyle (bool IVUpdateMayOverflow) const override
bool preferFixedOverScalableIfEqualCost (bool IsEpilogue) const override
unsigned getEpilogueVectorizationMinVF () const override
bool preferPredicateOverEpilogue (TailFoldingInfo *TFI) const override
bool supportsScalableVectors () const override
bool enableScalableVectorization () const override
bool isLegalToVectorizeReduction (const RecurrenceDescriptor &RdxDesc, ElementCount VF) const override
bool preferPredicatedReductionSelect () const override
std::optional< InstructionCost > getFP16BF16PromoteCost (Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Op1Info, TTI::OperandValueInfo Op2Info, bool IncludeTrunc, bool CanUseSVE, std::function< InstructionCost(Type *)> InstCost) const
FP16 and BF16 operations are lowered to fptrunc(op(fpext, fpext) if the architecture features are not present.
InstructionCost getArithmeticReductionCost (unsigned Opcode, VectorType *Ty, std::optional< FastMathFlags > FMF, TTI::TargetCostKind CostKind) const override
InstructionCost getExtendedReductionCost (unsigned Opcode, bool IsUnsigned, Type *ResTy, VectorType *ValTy, std::optional< FastMathFlags > FMF, TTI::TargetCostKind CostKind) const override
InstructionCost getMulAccReductionCost (bool IsUnsigned, unsigned RedOpcode, Type *ResTy, VectorType *Ty, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput) const override
InstructionCost getShuffleCost (TTI::ShuffleKind Kind, VectorType *DstTy, VectorType *SrcTy, ArrayRef< int > Mask, TTI::TargetCostKind CostKind, int Index, VectorType *SubTp, ArrayRef< const Value * > Args={}, const Instruction *CxtI=nullptr) const override
InstructionCost getScalarizationOverhead (VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract, TTI::TargetCostKind CostKind, bool ForPoisonSrc=true, ArrayRef< Value * > VL={}) const override
InstructionCost getScalingFactorCost (Type *Ty, GlobalValue *BaseGV, StackOffset BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace) const override
Return the cost of the scaling factor used in the addressing mode represented by AM for this target, for a load/store of the specified type.
bool enableSelectOptimize () const override
bool shouldTreatInstructionLikeSelect (const Instruction *I) const override
unsigned getStoreMinimumVF (unsigned VF, Type *ScalarMemTy, Type *ScalarValTy) const override
std::optional< unsigned > getMinPageSize () const override
bool isLSRCostLess (const TargetTransformInfo::LSRCost &C1, const TargetTransformInfo::LSRCost &C2) const override
bool isProfitableToSinkOperands (Instruction *I, SmallVectorImpl< Use * > &Ops) const override
Check if sinking I's operands to I's basic block is profitable, because the operands can be folded into a target instruction, e.g.
Public Member Functions inherited from llvm::BasicTTIImplBase< AArch64TTIImpl >
bool allowsMisalignedMemoryAccesses (LLVMContext &Context, unsigned BitWidth, unsigned AddressSpace, Align Alignment, unsigned *Fast) const override
bool areInlineCompatible (const Function *Caller, const Function *Callee) const override
bool hasBranchDivergence (const Function *F=nullptr) const override
bool isSourceOfDivergence (const Value *V) const override
bool isAlwaysUniform (const Value *V) const override
bool isValidAddrSpaceCast (unsigned FromAS, unsigned ToAS) const override
bool addrspacesMayAlias (unsigned AS0, unsigned AS1) const override
unsigned getFlatAddressSpace () const override
bool collectFlatAddressOperands (SmallVectorImpl< int > &OpIndexes, Intrinsic::ID IID) const override
bool isNoopAddrSpaceCast (unsigned FromAS, unsigned ToAS) const override
unsigned getAssumedAddrSpace (const Value *V) const override
bool isSingleThreaded () const override
std::pair< const Value *, unsigned > getPredicatedAddrSpace (const Value *V) const override
Value * rewriteIntrinsicWithAddressSpace (IntrinsicInst *II, Value *OldV, Value *NewV) const override
bool isLegalAddImmediate (int64_t imm) const override
bool isLegalAddScalableImmediate (int64_t Imm) const override
bool isLegalICmpImmediate (int64_t imm) const override
bool isLegalAddressingMode (Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace, Instruction *I=nullptr, int64_t ScalableOffset=0) const override
int64_t getPreferredLargeGEPBaseOffset (int64_t MinOffset, int64_t MaxOffset)
unsigned getStoreMinimumVF (unsigned VF, Type *ScalarMemTy, Type *ScalarValTy) const override
bool isIndexedLoadLegal (TTI::MemIndexedMode M, Type *Ty) const override
bool isIndexedStoreLegal (TTI::MemIndexedMode M, Type *Ty) const override
bool isLSRCostLess (const TTI::LSRCost &C1, const TTI::LSRCost &C2) const override
bool isNumRegsMajorCostOfLSR () const override
bool shouldDropLSRSolutionIfLessProfitable () const override
bool isProfitableLSRChainElement (Instruction *I) const override
InstructionCost getScalingFactorCost (Type *Ty, GlobalValue *BaseGV, StackOffset BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace) const override
bool isTruncateFree (Type *Ty1, Type *Ty2) const override
bool isProfitableToHoist (Instruction *I) const override
bool useAA () const override
bool isTypeLegal (Type *Ty) const override
unsigned getRegUsageForType (Type *Ty) const override
InstructionCost getGEPCost (Type *PointeeType, const Value *Ptr, ArrayRef< const Value * > Operands, Type *AccessType, TTI::TargetCostKind CostKind) const override
unsigned getEstimatedNumberOfCaseClusters (const SwitchInst &SI, unsigned &JumpTableSize, ProfileSummaryInfo *PSI, BlockFrequencyInfo *BFI) const override
bool shouldBuildLookupTables () const override
bool shouldBuildRelLookupTables () const override
bool haveFastSqrt (Type *Ty) const override
bool isFCmpOrdCheaperThanFCmpZero (Type *Ty) const override
InstructionCost getFPOpCost (Type *Ty) const override
bool preferToKeepConstantsAttached (const Instruction &Inst, const Function &Fn) const override
unsigned getInliningThresholdMultiplier () const override
unsigned adjustInliningThreshold (const CallBase *CB) const override
unsigned getCallerAllocaCost (const CallBase *CB, const AllocaInst *AI) const override
int getInlinerVectorBonusPercent () const override
void getUnrollingPreferences (Loop *L, ScalarEvolution &SE, TTI::UnrollingPreferences &UP, OptimizationRemarkEmitter *ORE) const override
void getPeelingPreferences (Loop *L, ScalarEvolution &SE, TTI::PeelingPreferences &PP) const override
bool isHardwareLoopProfitable (Loop *L, ScalarEvolution &SE, AssumptionCache &AC, TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const override
unsigned getEpilogueVectorizationMinVF () const override
bool preferPredicateOverEpilogue (TailFoldingInfo *TFI) const override
TailFoldingStyle getPreferredTailFoldingStyle (bool IVUpdateMayOverflow=true) const override
std::optional< Instruction * > instCombineIntrinsic (InstCombiner &IC, IntrinsicInst &II) const override
std::optional< Value * > simplifyDemandedUseBitsIntrinsic (InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, bool &KnownBitsComputed) const override
std::optional< Value * > simplifyDemandedVectorEltsIntrinsic (InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3, std::function< void(Instruction *, unsigned, APInt, APInt &)> SimplifyAndSetOp) const override
std::optional< unsigned > getCacheSize (TargetTransformInfo::CacheLevel Level) const override
std::optional< unsigned > getCacheAssociativity (TargetTransformInfo::CacheLevel Level) const override
unsigned getCacheLineSize () const override
unsigned getPrefetchDistance () const override
unsigned getMinPrefetchStride (unsigned NumMemAccesses, unsigned NumStridedMemAccesses, unsigned NumPrefetches, bool HasCall) const override
unsigned getMaxPrefetchIterationsAhead () const override
bool enableWritePrefetching () const override
bool shouldPrefetchAddressSpace (unsigned AS) const override
TypeSize getRegisterBitWidth (TargetTransformInfo::RegisterKind K) const override
std::optional< unsigned > getMaxVScale () const override
std::optional< unsigned > getVScaleForTuning () const override
bool isVScaleKnownToBeAPowerOfTwo () const override
InstructionCost getScalarizationOverhead (VectorType *InTy, const APInt &DemandedElts, bool Insert, bool Extract, TTI::TargetCostKind CostKind, bool ForPoisonSrc=true, ArrayRef< Value * > VL={}) const override
Estimate the overhead of scalarizing an instruction.
bool isTargetIntrinsicTriviallyScalarizable (Intrinsic::ID ID) const override
bool isTargetIntrinsicWithScalarOpAtArg (Intrinsic::ID ID, unsigned ScalarOpdIdx) const override
bool isTargetIntrinsicWithOverloadTypeAtArg (Intrinsic::ID ID, int OpdIdx) const override
bool isTargetIntrinsicWithStructReturnOverloadAtField (Intrinsic::ID ID, int RetIdx) const override
InstructionCost getScalarizationOverhead (VectorType *InTy, bool Insert, bool Extract, TTI::TargetCostKind CostKind) const
Helper wrapper for the DemandedElts variant of getScalarizationOverhead.
InstructionCost getOperandsScalarizationOverhead (ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind) const override
Estimate the overhead of scalarizing an instruction's operands.
InstructionCost getScalarizationOverhead (VectorType *RetTy, ArrayRef< const Value * > Args, ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind) const
Estimate the overhead of scalarizing the inputs and outputs of an instruction, with return type RetTy and arguments Args of type Tys.
std::pair< InstructionCost, MVT > getTypeLegalizationCost (Type *Ty) const
Estimate the cost of type-legalization and the legalized type.
unsigned getMaxInterleaveFactor (ElementCount VF) const override
InstructionCost getArithmeticInstrCost (unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Opd1Info={TTI::OK_AnyValue, TTI::OP_None}, TTI::OperandValueInfo Opd2Info={TTI::OK_AnyValue, TTI::OP_None}, ArrayRef< const Value * > Args={}, const Instruction *CxtI=nullptr) const override
TTI::ShuffleKind improveShuffleKindFromMask (TTI::ShuffleKind Kind, ArrayRef< int > Mask, VectorType *SrcTy, int &Index, VectorType *&SubTy) const
InstructionCost getShuffleCost (TTI::ShuffleKind Kind, VectorType *DstTy, VectorType *SrcTy, ArrayRef< int > Mask, TTI::TargetCostKind CostKind, int Index, VectorType *SubTp, ArrayRef< const Value * > Args={}, const Instruction *CxtI=nullptr) const override
InstructionCost getCastInstrCost (unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I=nullptr) const override
InstructionCost getExtractWithExtendCost (unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index, TTI::TargetCostKind CostKind) const override
InstructionCost getCFInstrCost (unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I=nullptr) const override
InstructionCost getCmpSelInstrCost (unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Op1Info={TTI::OK_AnyValue, TTI::OP_None}, TTI::OperandValueInfo Op2Info={TTI::OK_AnyValue, TTI::OP_None}, const Instruction *I=nullptr) const override
InstructionCost getVectorInstrCost (unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index, const Value *Op0, const Value *Op1) const override
InstructionCost getVectorInstrCost (unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index, Value *Scalar, ArrayRef< std::tuple< Value *, User *, int > > ScalarUserAndIdx) const override
InstructionCost getVectorInstrCost (const Instruction &I, Type *Val, TTI::TargetCostKind CostKind, unsigned Index) const override
InstructionCost getIndexedVectorInstrCostFromEnd (unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index) const override
InstructionCost getReplicationShuffleCost (Type *EltTy, int ReplicationFactor, int VF, const APInt &DemandedDstElts, TTI::TargetCostKind CostKind) const override
InstructionCost getMemoryOpCost (unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, TTI::OperandValueInfo OpInfo={TTI::OK_AnyValue, TTI::OP_None}, const Instruction *I=nullptr) const override
InstructionCost getInterleavedMemoryOpCost (unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef< unsigned > Indices, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, bool UseMaskForCond=false, bool UseMaskForGaps=false) const override
InstructionCost getIntrinsicInstrCost (const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind) const override
Get intrinsic cost based on arguments.
InstructionCost getTypeBasedIntrinsicInstrCost (const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind) const
Get intrinsic cost based on argument types.
InstructionCost getMemIntrinsicInstrCost (const MemIntrinsicCostAttributes &MICA, TTI::TargetCostKind CostKind) const override
Get memory intrinsic cost based on arguments.
InstructionCost getCallInstrCost (Function *F, Type *RetTy, ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind) const override
Compute a cost of the given call instruction.
unsigned getNumberOfParts (Type *Tp) const override
InstructionCost getAddressComputationCost (Type *PtrTy, ScalarEvolution *, const SCEV *, TTI::TargetCostKind) const override
InstructionCost getTreeReductionCost (unsigned Opcode, VectorType *Ty, TTI::TargetCostKind CostKind) const
Try to calculate arithmetic and shuffle op costs for reduction intrinsics.
InstructionCost getOrderedReductionCost (unsigned Opcode, VectorType *Ty, TTI::TargetCostKind CostKind) const
Try to calculate the cost of performing strict (in-order) reductions, which involves doing a sequence of floating point additions in lane order, starting with an initial value.
InstructionCost getArithmeticReductionCost (unsigned Opcode, VectorType *Ty, std::optional< FastMathFlags > FMF, TTI::TargetCostKind CostKind) const override
InstructionCost getMinMaxReductionCost (Intrinsic::ID IID, VectorType *Ty, FastMathFlags FMF, TTI::TargetCostKind CostKind) const override
Try to calculate op costs for min/max reduction operations.
InstructionCost getExtendedReductionCost (unsigned Opcode, bool IsUnsigned, Type *ResTy, VectorType *Ty, std::optional< FastMathFlags > FMF, TTI::TargetCostKind CostKind) const override
InstructionCost getMulAccReductionCost (bool IsUnsigned, unsigned RedOpcode, Type *ResTy, VectorType *Ty, TTI::TargetCostKind CostKind) const override
InstructionCost getVectorSplitCost () const
Public Member Functions inherited from llvm::TargetTransformInfoImplCRTPBase< T >
InstructionCost getGEPCost (Type *PointeeType, const Value *Ptr, ArrayRef< const Value * > Operands, Type *AccessType, TTI::TargetCostKind CostKind) const override
InstructionCost getPointersChainCost (ArrayRef< const Value * > Ptrs, const Value *Base, const TTI::PointersChainInfo &Info, Type *AccessTy, TTI::TargetCostKind CostKind) const override
InstructionCost getInstructionCost (const User *U, ArrayRef< const Value * > Operands, TTI::TargetCostKind CostKind) const override
bool isExpensiveToSpeculativelyExecute (const Instruction *I) const override
bool supportsTailCallFor (const CallBase *CB) const override
Public Member Functions inherited from llvm::TargetTransformInfoImplBase
virtual ~TargetTransformInfoImplBase ()
TargetTransformInfoImplBase (const TargetTransformInfoImplBase &Arg)=default
TargetTransformInfoImplBase (TargetTransformInfoImplBase &&Arg)
virtual const DataLayout & getDataLayout () const
virtual unsigned getInliningCostBenefitAnalysisSavingsMultiplier () const
virtual unsigned getInliningCostBenefitAnalysisProfitableMultiplier () const
virtual int getInliningLastCallToStaticBonus () const
virtual InstructionCost getMemcpyCost (const Instruction *I) const
virtual uint64_t getMaxMemIntrinsicInlineSizeThreshold () const
virtual BranchProbability getPredictableBranchThreshold () const
virtual InstructionCost getBranchMispredictPenalty () const
virtual bool canHaveNonUndefGlobalInitializerInAddressSpace (unsigned AS) const
virtual bool isLoweredToCall (const Function *F) const
virtual bool canMacroFuseCmp () const
virtual bool canSaveCmp (Loop *L, BranchInst **BI, ScalarEvolution *SE, LoopInfo *LI, DominatorTree *DT, AssumptionCache *AC, TargetLibraryInfo *LibInfo) const
virtual TTI::AddressingModeKind getPreferredAddressingMode (const Loop *L, ScalarEvolution *SE) const
virtual bool forceScalarizeMaskedGather (VectorType *DataType, Align Alignment) const
virtual bool forceScalarizeMaskedScatter (VectorType *DataType, Align Alignment) const
virtual bool isLegalAltInstr (VectorType *VecTy, unsigned Opcode0, unsigned Opcode1, const SmallBitVector &OpcodeMask) const
virtual bool isLegalMaskedExpandLoad (Type *DataType, Align Alignment) const
virtual bool isLegalStridedLoadStore (Type *DataType, Align Alignment) const
virtual bool isLegalInterleavedAccessType (VectorType *VTy, unsigned Factor, Align Alignment, unsigned AddrSpace) const
virtual bool isLegalMaskedVectorHistogram (Type *AddrType, Type *DataType) const
virtual bool hasDivRemOp (Type *DataType, bool IsSigned) const
virtual bool hasVolatileVariant (Instruction *I, unsigned AddrSpace) const
virtual bool LSRWithInstrQueries () const
virtual bool shouldBuildLookupTablesForConstant (Constant *C) const
virtual bool useColdCCForColdCall (Function &F) const
virtual bool useFastCCForInternalCall (Function &F) const
virtual bool supportsEfficientVectorElementLoadStore () const
virtual bool supportsTailCalls () const
virtual bool enableAggressiveInterleaving (bool LoopHasReductions) const
virtual bool isFPVectorizationPotentiallyUnsafe () const
virtual InstructionCost getIntImmCodeSizeCost (unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty) const
virtual bool hasConditionalLoadStoreForType (Type *Ty, bool IsStore) const
virtual unsigned getRegisterClassForType (bool Vector, Type *Ty=nullptr) const
virtual const char * getRegisterClassName (unsigned ClassID) const
virtual ElementCount getMinimumVF (unsigned ElemWidth, bool IsScalable) const
virtual unsigned getMaximumVF (unsigned ElemWidth, unsigned Opcode) const
virtual InstructionCost getAltInstrCost (VectorType *VecTy, unsigned Opcode0, unsigned Opcode1, const SmallBitVector &OpcodeMask, TTI::TargetCostKind CostKind) const
virtual InstructionCost getInsertExtractValueCost (unsigned Opcode, TTI::TargetCostKind CostKind) const
virtual unsigned getAtomicMemIntrinsicMaxElementSize () const
virtual Type * getMemcpyLoopLoweringType (LLVMContext &Context, Value *Length, unsigned SrcAddrSpace, unsigned DestAddrSpace, Align SrcAlign, Align DestAlign, std::optional< uint32_t > AtomicElementSize) const
virtual void getMemcpyLoopResidualLoweringType (SmallVectorImpl< Type * > &OpsOut, LLVMContext &Context, unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace, Align SrcAlign, Align DestAlign, std::optional< uint32_t > AtomicCpySize) const
virtual unsigned getLoadStoreVecRegBitWidth (unsigned AddrSpace) const
virtual bool isLegalToVectorizeLoad (LoadInst *LI) const
virtual bool isLegalToVectorizeStore (StoreInst *SI) const
virtual bool isLegalToVectorizeLoadChain (unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const
virtual bool isLegalToVectorizeStoreChain (unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const
virtual unsigned getLoadVectorFactor (unsigned VF, unsigned LoadSize, unsigned ChainSizeInBytes, VectorType *VecTy) const
virtual unsigned getStoreVectorFactor (unsigned VF, unsigned StoreSize, unsigned ChainSizeInBytes, VectorType *VecTy) const
virtual bool preferInLoopReduction (RecurKind Kind, Type *Ty) const
virtual bool preferAlternateOpcodeVectorization () const
virtual bool preferEpilogueVectorization () const
virtual bool shouldConsiderVectorizationRegPressure () const
virtual TTI::ReductionShuffle getPreferredExpandedReductionShuffle (const IntrinsicInst *II) const
virtual bool hasActiveVectorLength () const
virtual bool isVectorShiftByScalarCheap (Type *Ty) const
virtual TargetTransformInfo::VPLegalization getVPLegalizationStrategy (const VPIntrinsic &PI) const
virtual bool hasArmWideBranch (bool) const
virtual unsigned getMaxNumArgs () const
virtual unsigned getNumBytesToPadGlobalArray (unsigned Size, Type *ArrayType) const
virtual void collectKernelLaunchBounds (const Function &F, SmallVectorImpl< std::pair< StringRef, int64_t > > &LB) const
virtual bool allowVectorElementIndexingUsingGEP () const
Additional Inherited Members
Protected Types inherited from llvm::TargetTransformInfoImplBase
typedef TargetTransformInfo TTI
Protected Member Functions inherited from llvm::BasicTTIImplBase< AArch64TTIImpl >
BasicTTIImplBase (const TargetMachine *TM, const DataLayout &DL)
~BasicTTIImplBase () override=default
Protected Member Functions inherited from llvm::TargetTransformInfoImplCRTPBase< T >
TargetTransformInfoImplCRTPBase (const DataLayout &DL)
Protected Member Functions inherited from llvm::TargetTransformInfoImplBase
TargetTransformInfoImplBase (const DataLayout &DL)
unsigned minRequiredElementSize (const Value *Val, bool &isSigned) const
bool isStridedAccess (const SCEV *Ptr) const
const SCEVConstant * getConstantStrideStep (ScalarEvolution *SE, const SCEV *Ptr) const
bool isConstantStridedAccessLessThan (ScalarEvolution *SE, const SCEV *Ptr, int64_t MergeDistance) const
Protected Attributes inherited from llvm::BasicTTIImplBase< AArch64TTIImpl >
const DataLayout & DL
Protected Attributes inherited from llvm::TargetTransformInfoImplBase
const DataLayout & DL

◆ areInlineCompatible()

Reimplemented from llvm::TargetTransformInfoImplBase.

Definition at line 272 of file AArch64TargetTransformInfo.cpp.

References llvm::SMECallAttrs::callee(), llvm::SMECallAttrs::caller(), llvm::MCSubtargetInfo::getFeatureBits(), llvm::TargetMachine::getSubtargetImpl(), llvm::SMEAttrs::hasNonStreamingInterfaceAndBody(), hasPossibleIncompatibleOps(), llvm::SMEAttrs::hasStreamingBody(), llvm::SMEAttrs::hasStreamingInterfaceOrBody(), llvm::SMEAttrs::isNewZA(), llvm::SMEAttrs::isNewZT0(), llvm::SMECallAttrs::requiresLazySave(), llvm::SMECallAttrs::requiresPreservingAllZAState(), llvm::SMECallAttrs::requiresPreservingZT0(), llvm::SMECallAttrs::requiresSMChange(), llvm::SMEAttrs::set(), llvm::SMEAttrs::SM_Compatible, and llvm::SMEAttrs::SM_Enabled.

◆ areTypesABICompatible()

◆ enableInterleavedAccessVectorization()

bool llvm::AArch64TTIImpl::enableInterleavedAccessVectorization ( ) const inlineoverridevirtual

◆ enableMaskedInterleavedAccessVectorization()

bool llvm::AArch64TTIImpl::enableMaskedInterleavedAccessVectorization ( ) const inlineoverridevirtual

◆ enableMemCmpExpansion()

◆ enableOrderedReductions()

bool llvm::AArch64TTIImpl::enableOrderedReductions ( ) const inlineoverridevirtual

◆ enableScalableVectorization()

bool AArch64TTIImpl::enableScalableVectorization ( ) const overridevirtual

◆ enableSelectOptimize()

bool llvm::AArch64TTIImpl::enableSelectOptimize ( ) const inlineoverridevirtual

◆ getAddressComputationCost()

◆ getArithmeticInstrCost()

Reimplemented from llvm::TargetTransformInfoImplBase.

Definition at line 4219 of file AArch64TargetTransformInfo.cpp.

References llvm::ISD::ADD, llvm::ISD::AND, llvm::cast(), CostKind, llvm::CostTableLookup(), llvm::BasicTTIImplBase< AArch64TTIImpl >::DL, llvm::dyn_cast(), llvm::ISD::FADD, llvm::ISD::FDIV, llvm::ISD::FMUL, llvm::ISD::FREM, llvm::ISD::FSUB, getArithmeticInstrCost(), llvm::BasicTTIImplBase< AArch64TTIImpl >::getArithmeticInstrCost(), llvm::BasicTTIImplBase< AArch64TTIImpl >::getCallInstrCost(), getCastInstrCost(), getFP16BF16PromoteCost(), llvm::InstructionCost::getInvalid(), llvm::TargetTransformInfo::OperandValueInfo::getNoProps(), llvm::User::getOperand(), llvm::ElementCount::getScalable(), llvm::BasicTTIImplBase< AArch64TTIImpl >::getTypeLegalizationCost(), getVectorInstrCost(), llvm::Value::hasOneUse(), llvm::isa(), llvm::TargetTransformInfo::OperandValueInfo::isConstant(), llvm::TargetTransformInfo::OperandValueInfo::isNegatedPowerOf2(), llvm::TargetTransformInfo::OperandValueInfo::isPowerOf2(), llvm::TargetTransformInfo::OperandValueInfo::isUniform(), llvm::PatternMatch::m_FMul(), llvm::PatternMatch::m_Value(), llvm::PatternMatch::match(), llvm::ISD::MUL, llvm::TargetTransformInfo::None, llvm::ISD::OR, llvm::ISD::SDIV, llvm::ISD::SHL, llvm::ISD::SRA, llvm::ISD::SREM, llvm::ISD::SRL, llvm::TargetTransformInfo::TCK_RecipThroughput, llvm::ISD::UDIV, llvm::ISD::UREM, llvm::Value::user_begin(), and llvm::ISD::XOR.

Referenced by getArithmeticInstrCost(), getArithmeticReductionCost(), getArithmeticReductionCostSVE(), and getIntrinsicInstrCost().

◆ getArithmeticReductionCost()

Reimplemented from llvm::TargetTransformInfoImplBase.

Definition at line 5574 of file AArch64TargetTransformInfo.cpp.

References llvm::ISD::ADD, llvm::ISD::AND, assert(), llvm::cast(), CostKind, llvm::CostTableLookup(), llvm::dyn_cast(), llvm::ISD::FADD, llvm::FixedVectorType::get(), getArithmeticInstrCost(), llvm::BasicTTIImplBase< AArch64TTIImpl >::getArithmeticReductionCost(), getArithmeticReductionCostSVE(), llvm::InstructionCost::getInvalid(), getMaxNumElements(), llvm::ElementCount::getScalable(), llvm::Type::getScalarType(), llvm::BasicTTIImplBase< AArch64TTIImpl >::getTypeLegalizationCost(), llvm::MVT::getVectorNumElements(), llvm::isa(), llvm::isPowerOf2_32(), llvm::MVT::isVector(), llvm::Log2_32(), llvm::ISD::OR, llvm::TargetTransformInfo::requiresOrderedReduction(), and llvm::ISD::XOR.

◆ getArithmeticReductionCostSVE()

Definition at line 5548 of file AArch64TargetTransformInfo.cpp.

References llvm::ISD::ADD, llvm::ISD::AND, assert(), CostKind, llvm::ISD::FADD, getArithmeticInstrCost(), llvm::InstructionCost::getInvalid(), llvm::EVT::getTypeForEVT(), llvm::BasicTTIImplBase< AArch64TTIImpl >::getTypeLegalizationCost(), llvm::ISD::OR, and llvm::ISD::XOR.

Referenced by getArithmeticReductionCost().

◆ getCastInstrCost()

Reimplemented from llvm::TargetTransformInfoImplBase.

Definition at line 3229 of file AArch64TargetTransformInfo.cpp.

References assert(), llvm::EVT::bitsGT(), llvm::cast(), llvm::ConvertCostTableLookup(), CostKind, llvm::BasicTTIImplBase< AArch64TTIImpl >::DL, llvm::ISD::FP_ROUND, llvm::ISD::FP_TO_SINT, llvm::ISD::FP_TO_UINT, llvm::ScalableVectorType::get(), getCastInstrCost(), llvm::BasicTTIImplBase< AArch64TTIImpl >::getCastInstrCost(), llvm::InstructionCost::getInvalid(), getNumElements(), llvm::BasicTTIImplBase< AArch64TTIImpl >::getScalarizationOverhead(), llvm::EVT::getScalarSizeInBits(), llvm::Type::getScalarSizeInBits(), llvm::EVT::getScalarType(), llvm::EVT::getSimpleVT(), llvm::EVT::getTypeForEVT(), llvm::BasicTTIImplBase< AArch64TTIImpl >::getTypeLegalizationCost(), llvm::EVT::getVectorNumElements(), llvm::Type::getWithNewBitWidth(), I, llvm::isa(), isExtPartOfAvgExpr(), llvm::EVT::isFixedLengthVector(), llvm::EVT::isSimple(), llvm::TargetTransformInfo::Masked, llvm::TargetTransformInfo::None, llvm::TargetTransformInfo::Normal, llvm::ISD::SIGN_EXTEND, llvm::ISD::SINT_TO_FP, llvm::AArch64::SVEBitsPerBlock, llvm::TargetTransformInfo::TCK_RecipThroughput, llvm::ISD::TRUNCATE, llvm::TargetLoweringBase::TypePromoteInteger, llvm::TargetLoweringBase::TypeSplitVector, llvm::ISD::UINT_TO_FP, and llvm::ISD::ZERO_EXTEND.

Referenced by getArithmeticInstrCost(), getCastInstrCost(), getCmpSelInstrCost(), getExtractWithExtendCost(), getFP16BF16PromoteCost(), getIntrinsicInstrCost(), and getSpliceCost().

◆ getCFInstrCost()

◆ getCmpSelInstrCost()

Reimplemented from llvm::TargetTransformInfoImplBase.

Definition at line 4601 of file AArch64TargetTransformInfo.cpp.

References llvm::any_of(), llvm::CmpInst::BAD_ICMP_PREDICATE, llvm::cast(), llvm::ConvertCostTableLookup(), CostKind, llvm::BasicTTIImplBase< AArch64TTIImpl >::DL, llvm::CmpInst::FCMP_OEQ, llvm::CmpInst::FCMP_OGE, llvm::CmpInst::FCMP_OGT, llvm::CmpInst::FCMP_OLE, llvm::CmpInst::FCMP_OLT, llvm::CmpInst::FCMP_ONE, llvm::CmpInst::FCMP_ORD, llvm::CmpInst::FCMP_UEQ, llvm::CmpInst::FCMP_UNE, llvm::CmpInst::FCMP_UNO, llvm::BasicTTIImplBase< AArch64TTIImpl >::getCallInstrCost(), getCastInstrCost(), getCmpSelInstrCost(), llvm::BasicTTIImplBase< AArch64TTIImpl >::getCmpSelInstrCost(), getFP16BF16PromoteCost(), llvm::VectorType::getInteger(), llvm::EVT::getSimpleVT(), llvm::BasicTTIImplBase< AArch64TTIImpl >::getTypeLegalizationCost(), hasKnownLowerThroughputFromSchedulingModel(), I, llvm::CmpInst::ICMP_SGE, llvm::CmpInst::ICMP_SGT, llvm::CmpInst::ICMP_SLE, llvm::CmpInst::ICMP_SLT, llvm::isa(), llvm::CmpInst::isIntPredicate(), llvm::EVT::isSimple(), llvm::CmpInst::isUnsigned(), llvm::Type::isVectorTy(), llvm::PatternMatch::m_AllOnes(), llvm::PatternMatch::m_And(), llvm::PatternMatch::m_Cmp(), llvm::PatternMatch::m_One(), llvm::PatternMatch::m_Select(), llvm::PatternMatch::m_Value(), llvm::PatternMatch::m_Zero(), llvm::PatternMatch::match(), llvm::TargetTransformInfo::None, llvm::TargetTransformInfo::TCK_Latency, and llvm::TargetTransformInfo::TCK_RecipThroughput.

Referenced by getCmpSelInstrCost(), getIntrinsicInstrCost(), and getSpliceCost().

◆ getCostOfKeepingLiveOverCall()

◆ getEpilogueVectorizationMinVF()

unsigned AArch64TTIImpl::getEpilogueVectorizationMinVF ( ) const overridevirtual

◆ getExtendedReductionCost()

◆ getExtractWithExtendCost()

◆ getFeatureMask()

◆ getFP16BF16PromoteCost()

◆ getGatherScatterOpCost()

Definition at line 4822 of file AArch64TargetTransformInfo.cpp.

References llvm::cast(), CostKind, llvm::MemIntrinsicCostAttributes::getAlignment(), llvm::MemIntrinsicCostAttributes::getDataType(), llvm::MemIntrinsicCostAttributes::getID(), llvm::MemIntrinsicCostAttributes::getInst(), llvm::InstructionCost::getInvalid(), getMaxNumElements(), llvm::BasicTTIImplBase< AArch64TTIImpl >::getMemIntrinsicInstrCost(), getMemoryOpCost(), llvm::ElementCount::getScalable(), getSVEGatherScatterOverhead(), llvm::BasicTTIImplBase< AArch64TTIImpl >::getTypeLegalizationCost(), I, isElementTypeLegalForScalableVector(), isLegalMaskedGatherScatter(), and useNeonVector().

Referenced by getMemIntrinsicInstrCost().

◆ getGISelRematGlobalCost()

unsigned llvm::AArch64TTIImpl::getGISelRematGlobalCost ( ) const inlineoverridevirtual

◆ getIndexedVectorInstrCostFromEnd()

◆ getInlineCallPenalty()

◆ getInterleavedMemoryOpCost()

◆ getIntImmCost() [1/2]

◆ getIntImmCost() [2/2]

◆ getIntImmCostInst()

◆ getIntImmCostIntrin()

◆ getIntrinsicInstrCost()

Reimplemented from llvm::TargetTransformInfoImplBase.

Definition at line 608 of file AArch64TargetTransformInfo.cpp.

References _, llvm::any_of(), llvm::CallingConv::C, llvm::cast(), CostKind, llvm::CostTableLookup(), llvm::ISD::CTPOP, llvm::BasicTTIImplBase< AArch64TTIImpl >::DL, llvm::dyn_cast(), llvm::SmallVectorTemplateCommon< T, typename >::empty(), llvm::CmpInst::FCMP_UNO, llvm::VectorType::get(), llvm::IntrinsicCostAttributes::getArgs(), llvm::IntrinsicCostAttributes::getArgTypes(), getArithmeticInstrCost(), getCastInstrCost(), getCmpSelInstrCost(), llvm::TargetTransformInfoImplBase::getDataLayout(), llvm::Type::getFloatTy(), getHistogramCost(), llvm::IntrinsicCostAttributes::getID(), llvm::Type::getIntNTy(), getIntrinsicInstrCost(), llvm::BasicTTIImplBase< AArch64TTIImpl >::getIntrinsicInstrCost(), llvm::InstructionCost::getInvalid(), llvm::details::FixedOrScalableQuantity< LeafTy, ValueTy >::getKnownMinValue(), llvm::TargetTransformInfo::getOperandInfo(), llvm::IntrinsicCostAttributes::getReturnType(), llvm::ElementCount::getScalable(), llvm::EVT::getScalarSizeInBits(), llvm::MVT::getScalarSizeInBits(), llvm::Type::getScalarType(), llvm::EVT::getSimpleVT(), llvm::EVT::getTypeForEVT(), llvm::BasicTTIImplBase< AArch64TTIImpl >::getTypeLegalizationCost(), llvm::DataLayout::getTypeSizeInBits(), llvm::EVT::getVectorNumElements(), llvm::Type::getWithNewBitWidth(), llvm::CmpInst::ICMP_UGT, llvm::isa(), llvm::TargetTransformInfo::OperandValueInfo::isConstant(), llvm::Type::isDoubleTy(), llvm::EVT::isFixedLengthVector(), llvm::Type::isFloatTy(), llvm::Type::isHalfTy(), llvm::Type::isIntegerTy(), llvm::isPowerOf2_64(), llvm::EVT::isSimple(), llvm::BasicTTIImplBase< AArch64TTIImpl >::isTypeLegal(), llvm::TargetTransformInfo::OperandValueInfo::isUniform(), isUnpackedVectorVT(), llvm::InstructionCost::isValid(), llvm::MVT::isVector(), llvm::ConstantInt::isZero(), llvm::TargetTransformInfo::None, llvm::SmallVectorTemplateCommon< T, typename >::size(), llvm::TargetTransformInfo::TCC_Free, llvm::TargetLoweringBase::TypeLegal, and llvm::TargetLoweringBase::TypeSplitVector.

Referenced by getIntrinsicInstrCost(), and getMinMaxReductionCost().

◆ getMaskedMemoryOpCost()

◆ getMaxInterleaveFactor()

◆ getMaxNumElements()

◆ getMemIntrinsicInstrCost()

◆ getMemoryOpCost()

Reimplemented from llvm::TargetTransformInfoImplBase.

Definition at line 4867 of file AArch64TargetTransformInfo.cpp.

References llvm::CallingConv::C, llvm::cast(), CostKind, llvm::BasicTTIImplBase< AArch64TTIImpl >::DL, llvm::dyn_cast(), llvm::SmallVectorTemplateCommon< T, typename >::empty(), llvm::InstructionCost::getInvalid(), llvm::BasicTTIImplBase< AArch64TTIImpl >::getMemoryOpCost(), llvm::ElementCount::getScalable(), llvm::EVT::getScalarSizeInBits(), llvm::BasicTTIImplBase< AArch64TTIImpl >::getTypeLegalizationCost(), llvm::EVT::getVectorElementType(), llvm::EVT::getVectorNumElements(), llvm::EVT::getVectorVT(), I, llvm::isPowerOf2_32(), llvm::NextPowerOf2(), llvm::SmallVectorImpl< T >::pop_back_val(), llvm::SmallVectorTemplateBase< T, bool >::push_back(), llvm::TargetTransformInfo::TCK_CodeSize, llvm::TargetTransformInfo::TCK_RecipThroughput, llvm::TargetTransformInfo::TCK_SizeAndLatency, and useNeonVector().

Referenced by getCostOfKeepingLiveOverCall(), and getGatherScatterOpCost().

◆ getMinMaxReductionCost()

◆ getMinPageSize()

std::optional< unsigned > llvm::AArch64TTIImpl::getMinPageSize ( ) const inlineoverridevirtual

◆ getMinTripCountTailFoldingThreshold()

unsigned llvm::AArch64TTIImpl::getMinTripCountTailFoldingThreshold ( ) const inlineoverridevirtual

◆ getMinVectorRegisterBitWidth()

unsigned llvm::AArch64TTIImpl::getMinVectorRegisterBitWidth ( ) const inlineoverridevirtual

◆ getMulAccReductionCost()

◆ getNumberOfRegisters()

unsigned llvm::AArch64TTIImpl::getNumberOfRegisters ( unsigned ClassID) const inlineoverridevirtual

◆ getOrCreateResultFromMemIntrinsic()

Value * AArch64TTIImpl::getOrCreateResultFromMemIntrinsic ( IntrinsicInst * Inst, Type * ExpectedType, bool CanCreate = true ) const overridevirtual

◆ getPartialReductionCost()

Reimplemented from llvm::TargetTransformInfoImplBase.

Definition at line 5811 of file AArch64TargetTransformInfo.cpp.

References assert(), CostKind, llvm::details::FixedOrScalableQuantity< LeafTy, ValueTy >::divideCoefficientBy(), llvm::VectorType::get(), llvm::Type::getContext(), llvm::EVT::getEVT(), llvm::InstructionCost::getInvalid(), llvm::details::FixedOrScalableQuantity< LeafTy, ValueTy >::getKnownMinValue(), llvm::Type::getPrimitiveSizeInBits(), llvm::TypeSize::getScalable(), llvm::Type::getScalarSizeInBits(), llvm::BasicTTIImplBase< AArch64TTIImpl >::getTypeLegalizationCost(), llvm::Invalid, llvm::details::FixedOrScalableQuantity< LeafTy, ValueTy >::isFixed(), llvm::details::FixedOrScalableQuantity< TypeSize, uint64_t >::isKnownLT(), llvm::TargetTransformInfo::PR_None, llvm::TargetTransformInfo::TCC_Basic, llvm::TargetTransformInfo::TCK_RecipThroughput, llvm::TargetLoweringBase::TypeLegal, llvm::TargetLoweringBase::TypePromoteInteger, and llvm::TargetLoweringBase::TypeSplitVector.

◆ getPeelingPreferences()

◆ getPopcntSupport()

◆ getPreferredTailFoldingStyle()

TailFoldingStyle llvm::AArch64TTIImpl::getPreferredTailFoldingStyle ( bool IVUpdateMayOverflow) const inlineoverridevirtual

◆ getRegisterBitWidth()

◆ getScalarizationOverhead()

◆ getScalingFactorCost()

Return the cost of the scaling factor used in the addressing mode represented by AM for this target, for a load/store of the specified type.

If the AM is supported, the return value must be >= 0. If the AM is not supported, it returns an invalid cost.

Reimplemented from llvm::TargetTransformInfoImplBase.

Definition at line 6350 of file AArch64TargetTransformInfo.cpp.

References llvm::TargetLoweringBase::AddrMode::BaseGV, llvm::TargetLoweringBase::AddrMode::BaseOffs, llvm::BasicTTIImplBase< AArch64TTIImpl >::DL, llvm::StackOffset::getFixed(), llvm::InstructionCost::getInvalid(), llvm::StackOffset::getScalable(), llvm::TargetLoweringBase::AddrMode::HasBaseReg, llvm::BasicTTIImplBase< AArch64TTIImpl >::isLegalAddressingMode(), llvm::TargetLoweringBase::AddrMode::ScalableOffset, and llvm::TargetLoweringBase::AddrMode::Scale.

◆ getShuffleCost()

Reimplemented from llvm::TargetTransformInfoImplBase.

Definition at line 5911 of file AArch64TargetTransformInfo.cpp.

References llvm::all_of(), assert(), llvm::cast(), CostKind, llvm::CostTableLookup(), llvm::drop_begin(), llvm::enumerate(), llvm::VectorType::get(), llvm::VectorType::getElementCount(), llvm::ElementCount::getFixed(), llvm::details::FixedOrScalableQuantity< LeafTy, ValueTy >::getKnownMinValue(), llvm::FixedVectorType::getNumElements(), llvm::getPerfectShuffleCost(), llvm::Type::getPrimitiveSizeInBits(), llvm::Type::getScalarType(), getShuffleCost(), llvm::BasicTTIImplBase< AArch64TTIImpl >::getShuffleCost(), getSpliceCost(), llvm::BasicTTIImplBase< AArch64TTIImpl >::getTypeLegalizationCost(), llvm::Value::hasOneUse(), llvm::BasicTTIImplBase< AArch64TTIImpl >::improveShuffleKindFromMask(), llvm::isa(), llvm::ShuffleVectorInst::isDeInterleaveMaskOfFactor(), llvm::isDUPFirstSegmentMask(), llvm::isDUPQMask(), llvm::ShuffleVectorInst::isInterleaveMask(), isLegalBroadcastLoad(), llvm::isREVMask(), llvm::Type::isScalableTy(), llvm::isUZPMask(), llvm::isZIPMask(), N, llvm::PoisonMaskElem, llvm::SmallVectorTemplateBase< T, bool >::push_back(), llvm::TargetTransformInfo::SK_Broadcast, llvm::TargetTransformInfo::SK_ExtractSubvector, llvm::TargetTransformInfo::SK_InsertSubvector, llvm::TargetTransformInfo::SK_PermuteSingleSrc, llvm::TargetTransformInfo::SK_PermuteTwoSrc, llvm::TargetTransformInfo::SK_Reverse, llvm::TargetTransformInfo::SK_Select, llvm::TargetTransformInfo::SK_Splice, llvm::TargetTransformInfo::SK_Transpose, llvm::AArch64::SVEBitsPerBlock, llvm::TargetTransformInfo::TCK_CodeSize, and llvm::Value::user_begin().

Referenced by getShuffleCost().

◆ getSpliceCost()

Definition at line 5755 of file AArch64TargetTransformInfo.cpp.

References assert(), llvm::CmpInst::BAD_ICMP_PREDICATE, CostKind, llvm::CostTableLookup(), getCastInstrCost(), getCmpSelInstrCost(), llvm::Type::getContext(), llvm::VectorType::getElementCount(), llvm::InstructionCost::getInvalid(), llvm::ElementCount::getScalable(), llvm::EVT::getSimpleVT(), llvm::EVT::getTypeForEVT(), llvm::BasicTTIImplBase< AArch64TTIImpl >::getTypeLegalizationCost(), llvm::TargetTransformInfo::None, and llvm::TargetTransformInfo::SK_Splice.

Referenced by getShuffleCost().

◆ getStoreMinimumVF()

unsigned llvm::AArch64TTIImpl::getStoreMinimumVF ( unsigned VF, Type * ScalarMemTy, Type * ScalarValTy ) const inlineoverridevirtual

◆ getTgtMemIntrinsic()

◆ getUnrollingPreferences()

Reimplemented from llvm::TargetTransformInfoImplBase.

Definition at line 5292 of file AArch64TargetTransformInfo.cpp.

References Aarch64ForceUnrollThreshold, llvm::cast(), llvm::TargetTransformInfo::UnrollingPreferences::DefaultUnrollRuntimeCount, EnableFalkorHWPFUnrollFix, F, llvm::TargetTransformInfo::UnrollingPreferences::Force, llvm::AArch64Subtarget::Generic, getAppleRuntimeUnrollPreferences(), llvm::getBooleanLoopAttribute(), getCalledFunction(), getFalkorUnrollingPreferences(), llvm::TargetTransformInfoImplCRTPBase< T >::getInstructionCost(), llvm::BasicTTIImplBase< AArch64TTIImpl >::getUnrollingPreferences(), I, llvm::isa(), llvm::TargetTransformInfoImplBase::isLoweredToCall(), llvm::TargetTransformInfo::UnrollingPreferences::Partial, llvm::TargetTransformInfo::UnrollingPreferences::PartialOptSizeThreshold, llvm::TargetTransformInfo::UnrollingPreferences::PartialThreshold, llvm::TargetTransformInfo::UnrollingPreferences::Runtime, llvm::TargetTransformInfo::UnrollingPreferences::RuntimeUnrollMultiExit, llvm::TargetTransformInfo::UnrollingPreferences::SCEVExpansionBudget, shouldUnrollMultiExitLoop(), llvm::TargetTransformInfo::TCK_SizeAndLatency, llvm::TargetTransformInfo::UnrollingPreferences::UnrollAndJam, llvm::TargetTransformInfo::UnrollingPreferences::UnrollAndJamInnerLoopThreshold, llvm::TargetTransformInfo::UnrollingPreferences::UnrollRemainder, and llvm::TargetTransformInfo::UnrollingPreferences::UpperBound.

◆ getVectorInstrCost() [1/3]

◆ getVectorInstrCost() [2/3]

◆ getVectorInstrCost() [3/3]

◆ getVScaleForTuning()

std::optional< unsigned > llvm::AArch64TTIImpl::getVScaleForTuning ( ) const inlineoverridevirtual

◆ hasKnownLowerThroughputFromSchedulingModel()

bool AArch64TTIImpl::hasKnownLowerThroughputFromSchedulingModel ( unsigned Opcode1,
unsigned Opcode2 ) const

◆ instCombineIntrinsic()

Reimplemented from llvm::TargetTransformInfoImplBase.

Definition at line 2871 of file AArch64TargetTransformInfo.cpp.

References constructSVEIntrinsicInfo(), llvm::BasicTTIImplBase< AArch64TTIImpl >::DL, I, II, instCombineConvertFromSVBool(), instCombineDMB(), instCombineInStreamingMode(), instCombineLD1GatherIndex(), instCombineMaxMinNM(), instCombinePTrue(), instCombineRDFFR(), instCombineSMECntsd(), instCombineST1ScatterIndex(), instCombineSVECmpNE(), instCombineSVECntElts(), instCombineSVECondLast(), instCombineSVEDup(), instCombineSVEDupqLane(), instCombineSVEDupX(), instCombineSVEInsr(), instCombineSVELast(), instCombineSVELD1(), instCombineSVEPTest(), instCombineSVESDIV(), instCombineSVESel(), instCombineSVESrshl(), instCombineSVEST1(), instCombineSVETBL(), instCombineSVEUnpack(), instCombineSVEUxt(), instCombineSVEUzp1(), instCombineSVEVectorAdd(), instCombineSVEVectorBinOp(), instCombineSVEVectorFAdd(), instCombineSVEVectorFAddU(), instCombineSVEVectorFSub(), instCombineSVEVectorFSubU(), instCombineSVEVectorFuseMulAddSub(), instCombineSVEVectorSub(), instCombineSVEZip(), instCombineWhilelo(), and simplifySVEIntrinsic().

◆ isElementTypeLegalForCompressStore()

bool llvm::AArch64TTIImpl::isElementTypeLegalForCompressStore ( Type * Ty) const inline

◆ isElementTypeLegalForScalableVector()

bool llvm::AArch64TTIImpl::isElementTypeLegalForScalableVector ( Type * Ty) const inlineoverridevirtual

◆ isExtPartOfAvgExpr()

Definition at line 3187 of file AArch64TargetTransformInfo.cpp.

References llvm::Add, llvm::cast(), llvm::BasicTTIImplBase< AArch64TTIImpl >::DL, llvm::dyn_cast_or_null(), llvm::Instruction::getOpcode(), llvm::Value::hasOneUse(), llvm::PatternMatch::m_c_Add(), llvm::PatternMatch::m_Instruction(), llvm::PatternMatch::m_SpecificInt(), llvm::PatternMatch::m_Value(), llvm::PatternMatch::m_ZExtOrSExt(), and llvm::PatternMatch::match().

Referenced by getCastInstrCost().

◆ isLegalBroadcastLoad()

bool llvm::AArch64TTIImpl::isLegalBroadcastLoad ( Type * ElementTy, ElementCount NumElements ) const inlineoverridevirtual

◆ isLegalMaskedCompressStore()

bool llvm::AArch64TTIImpl::isLegalMaskedCompressStore ( Type * DataType, Align Alignment ) const inlineoverridevirtual

◆ isLegalMaskedGather()

bool llvm::AArch64TTIImpl::isLegalMaskedGather ( Type * DataType, Align Alignment ) const inlineoverridevirtual

◆ isLegalMaskedGatherScatter()

bool llvm::AArch64TTIImpl::isLegalMaskedGatherScatter ( Type * DataType) const inline

◆ isLegalMaskedLoad()

◆ isLegalMaskedLoadStore()

bool llvm::AArch64TTIImpl::isLegalMaskedLoadStore ( Type * DataType, Align Alignment ) const inline

◆ isLegalMaskedScatter()

bool llvm::AArch64TTIImpl::isLegalMaskedScatter ( Type * DataType, Align Alignment ) const inlineoverridevirtual

◆ isLegalMaskedStore()

◆ isLegalNTLoad()

bool llvm::AArch64TTIImpl::isLegalNTLoad ( Type * DataType, Align Alignment ) const inlineoverridevirtual

◆ isLegalNTStore()

bool llvm::AArch64TTIImpl::isLegalNTStore ( Type * DataType, Align Alignment ) const inlineoverridevirtual

◆ isLegalNTStoreLoad()

bool llvm::AArch64TTIImpl::isLegalNTStoreLoad ( Type * DataType, Align Alignment ) const inline

◆ isLegalToVectorizeReduction()

Reimplemented from llvm::TargetTransformInfoImplBase.

Definition at line 5490 of file AArch64TargetTransformInfo.cpp.

References llvm::Add, llvm::AddChainWithSubs, llvm::And, llvm::AnyOf, llvm::FAdd, llvm::FMax, llvm::FMin, llvm::FMulAdd, llvm::RecurrenceDescriptor::getRecurrenceKind(), llvm::RecurrenceDescriptor::getRecurrenceType(), isElementTypeLegalForScalableVector(), llvm::details::FixedOrScalableQuantity< LeafTy, ValueTy >::isScalable(), llvm::Or, llvm::SMax, llvm::SMin, llvm::Sub, llvm::UMax, llvm::UMin, and llvm::Xor.

◆ isLSRCostLess()

◆ isMultiversionedFunction()

bool AArch64TTIImpl::isMultiversionedFunction ( const Function & F) const overridevirtual

◆ isProfitableToSinkOperands()

Check if sinking I's operands to I's basic block is profitable, because the operands can be folded into a target instruction, e.g.

shufflevectors extracts and/or sext/zext can be folded into (u,s)subl(2).

Reimplemented from llvm::TargetTransformInfoImplBase.

Definition at line 6557 of file AArch64TargetTransformInfo.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, llvm::any_of(), areExtractExts(), areExtractShuffleVectors(), areOperandsOfVmullHighP64(), llvm::cast(), Cond, llvm::BasicTTIImplBase< AArch64TTIImpl >::DL, llvm::dyn_cast(), getCondition(), llvm::APInt::getHighBitsSet(), llvm::Instruction::getOpcode(), llvm::User::getOperand(), llvm::User::getOperandUse(), llvm::ilist_detail::node_parent_access< NodeTy, ParentTy >::getParent(), I, II, llvm::isa(), isSplatShuffle(), llvm::ConstantInt::isZero(), llvm::PatternMatch::m_And(), llvm::PatternMatch::m_c_And(), llvm::PatternMatch::m_c_Or(), llvm::PatternMatch::m_Instruction(), llvm::PatternMatch::m_Load(), llvm::MIPatternMatch::m_Not(), llvm::MIPatternMatch::m_OneUse(), llvm::PatternMatch::m_SExt(), llvm::PatternMatch::m_Specific(), llvm::PatternMatch::m_Value(), llvm::PatternMatch::m_ZExtOrSExt(), llvm::MaskedValueIsZero(), llvm::PatternMatch::match(), shouldSinkVectorOfPtrs(), and shouldSinkVScale().

◆ isVScaleKnownToBeAPowerOfTwo()

bool llvm::AArch64TTIImpl::isVScaleKnownToBeAPowerOfTwo ( ) const inlineoverridevirtual

◆ preferFixedOverScalableIfEqualCost()

bool AArch64TTIImpl::preferFixedOverScalableIfEqualCost ( bool IsEpilogue) const overridevirtual

◆ preferPredicatedReductionSelect()

bool llvm::AArch64TTIImpl::preferPredicatedReductionSelect ( ) const inlineoverridevirtual

◆ preferPredicateOverEpilogue()

bool AArch64TTIImpl::preferPredicateOverEpilogue ( TailFoldingInfo * TFI) const overridevirtual

Reimplemented from llvm::TargetTransformInfoImplBase.

Definition at line 6308 of file AArch64TargetTransformInfo.cpp.

References llvm::LoopBase< BlockT, LoopT >::blocks(), containsDecreasingPointers(), llvm::Disabled, llvm::LoopVectorizationLegality::getDominatorTree(), llvm::LoopVectorizationLegality::getFixedOrderRecurrences(), llvm::LoopVectorizationLegality::getLoop(), llvm::LoopVectorizationLegality::getPredicatedScalarEvolution(), llvm::LoopVectorizationLegality::getReductionVars(), llvm::InterleavedAccessInfo::hasGroups(), llvm::TailFoldingInfo::IAI, llvm::TailFoldingInfo::LVL, llvm::Recurrences, llvm::Reductions, llvm::Required, llvm::Reverse, llvm::Simple, llvm::MapVector< KeyT, ValueT, MapType, VectorType >::size(), llvm::SmallPtrSetImplBase::size(), SVETailFoldInsnThreshold, and TailFoldingOptionLoc.

◆ prefersVectorizedAddressing()

bool AArch64TTIImpl::prefersVectorizedAddressing ( ) const overridevirtual

◆ shouldConsiderAddressTypePromotion()

bool AArch64TTIImpl::shouldConsiderAddressTypePromotion ( const Instruction & I, bool & AllowPromotionWithoutCommonHeader ) const overridevirtual

◆ shouldExpandReduction()

◆ shouldMaximizeVectorBandwidth()

◆ shouldTreatInstructionLikeSelect()

bool AArch64TTIImpl::shouldTreatInstructionLikeSelect ( const Instruction * I) const overridevirtual

◆ simplifyDemandedVectorEltsIntrinsic()

◆ supportsScalableVectors()

bool llvm::AArch64TTIImpl::supportsScalableVectors ( ) const inlineoverridevirtual

◆ useNeonVector()

The documentation for this class was generated from the following files: