LLVM: lib/Target/AMDGPU/SIFrameLowering.cpp File Reference (original) (raw)

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Namespaces
namespace llvm
This is an optimization pass for GlobalISel generic memory operations.
Macros
#define DEBUG_TYPE "frame-info"
Functions
static MCRegister findUnusedRegister (MachineRegisterInfo &MRI, const LiveRegUnits &LiveUnits, const TargetRegisterClass &RC)
static MCRegister findScratchNonCalleeSaveRegister (MachineRegisterInfo &MRI, LiveRegUnits &LiveUnits, const TargetRegisterClass &RC, bool Unused=false)
static void getVGPRSpillLaneOrTempRegister (MachineFunction &MF, LiveRegUnits &LiveUnits, Register SGPR, const TargetRegisterClass &RC=AMDGPU::SReg_32_XM0_XEXECRegClass, bool IncludeScratchCopy=true)
Query target location for spilling SGPRs IncludeScratchCopy : Also look for free scratch SGPRs.
static void buildPrologSpill (const GCNSubtarget &ST, const SIRegisterInfo &TRI, const SIMachineFunctionInfo &FuncInfo, LiveRegUnits &LiveUnits, MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, Register SpillReg, int FI, Register FrameReg, int64_t DwordOff=0)
static void buildEpilogRestore (const GCNSubtarget &ST, const SIRegisterInfo &TRI, const SIMachineFunctionInfo &FuncInfo, LiveRegUnits &LiveUnits, MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, Register SpillReg, int FI, Register FrameReg, int64_t DwordOff=0)
static void buildGitPtr (MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, const SIInstrInfo *TII, Register TargetReg)
static void initLiveUnits (LiveRegUnits &LiveUnits, const SIRegisterInfo &TRI, const SIMachineFunctionInfo *FuncInfo, MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, bool IsProlog)
static bool allStackObjectsAreDead (const MachineFrameInfo &MFI)
static unsigned getScratchScaleFactor (const GCNSubtarget &ST)
static Register buildScratchExecCopy (LiveRegUnits &LiveUnits, MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, bool IsProlog, bool EnableInactiveLanes)
static bool allSGPRSpillsAreDead (const MachineFunction &MF)
static void assignSlotsUsingVGPRBlocks (MachineFunction &MF, const GCNSubtarget &ST, std::vector< CalleeSavedInfo > &CSI)
static bool frameTriviallyRequiresSP (const MachineFrameInfo &MFI)
Returns true if the frame will require a reference to the stack pointer.
Variables
static cl::opt< bool > EnableSpillVGPRToAGPR ("amdgpu-spill-vgpr-to-agpr", cl::desc("Enable spilling VGPRs to AGPRs"), cl::ReallyHidden, cl::init(true))

◆ DEBUG_TYPE

#define DEBUG_TYPE "frame-info"

◆ allSGPRSpillsAreDead()

◆ allStackObjectsAreDead()

◆ assignSlotsUsingVGPRBlocks()

Definition at line 1845 of file SIFrameLowering.cpp.

References A(), llvm::alignDown(), assert(), B(), BlockSize, llvm::countl_zero(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getInfo(), llvm::CalleeSavedInfo::getReg(), llvm::is_sorted(), llvm::SIMachineFunctionInfo::isWWMReservedRegister(), Reg, llvm::SIMachineFunctionInfo::setMaskForVGPRBlockOps(), and TRI.

Referenced by llvm::SIFrameLowering::assignCalleeSavedSpillSlots().

◆ buildEpilogRestore()

void buildEpilogRestore ( const GCNSubtarget & ST, const SIRegisterInfo & TRI, const SIMachineFunctionInfo & FuncInfo, LiveRegUnits & LiveUnits, MachineFunction & MF, MachineBasicBlock & MBB, MachineBasicBlock::iterator I, const DebugLoc & DL, Register SpillReg, int FI, Register FrameReg, int64_t DwordOff = 0 ) static

Definition at line 158 of file SIFrameLowering.cpp.

References DL, llvm::MachinePointerInfo::getFixedStack(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getMachineMemOperand(), llvm::MachineFrameInfo::getObjectAlign(), llvm::MachineFrameInfo::getObjectSize(), I, MBB, llvm::MachineMemOperand::MOLoad, Opc, and TRI.

Referenced by llvm::SIFrameLowering::emitCSRSpillRestores().

◆ buildGitPtr()

Definition at line 178 of file SIFrameLowering.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineRegisterInfo::addLiveIn(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), DL, llvm::SIMachineFunctionInfo::getGITPtrHigh(), llvm::SIMachineFunctionInfo::getGITPtrLoReg(), llvm::MachineFunction::getInfo(), llvm::MachineFunction::getRegInfo(), I, llvm::RegState::ImplicitDefine, MBB, TII, and TRI.

◆ buildPrologSpill()

void buildPrologSpill ( const GCNSubtarget & ST, const SIRegisterInfo & TRI, const SIMachineFunctionInfo & FuncInfo, LiveRegUnits & LiveUnits, MachineFunction & MF, MachineBasicBlock & MBB, MachineBasicBlock::iterator I, const DebugLoc & DL, Register SpillReg, int FI, Register FrameReg, int64_t DwordOff = 0 ) static

Definition at line 135 of file SIFrameLowering.cpp.

References llvm::LiveRegUnits::addReg(), DL, llvm::MachinePointerInfo::getFixedStack(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getMachineMemOperand(), llvm::MachineFrameInfo::getObjectAlign(), llvm::MachineFrameInfo::getObjectSize(), I, MBB, llvm::MachineMemOperand::MOStore, Opc, llvm::LiveRegUnits::removeReg(), and TRI.

Referenced by llvm::SIFrameLowering::emitCSRSpillStores().

◆ buildScratchExecCopy()

Definition at line 948 of file SIFrameLowering.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::LiveRegUnits::addReg(), assert(), llvm::BuildMI(), DL, findScratchNonCalleeSaveRegister(), llvm::MachineFunction::getInfo(), llvm::MachineInstr::getOperand(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), initLiveUnits(), llvm::SIMachineFunctionInfo::isWholeWaveFunction(), MBB, MBBI, MRI, llvm::report_fatal_error(), llvm::MachineOperand::setIsDead(), TII, and TRI.

Referenced by llvm::SIFrameLowering::emitCSRSpillRestores(), and llvm::SIFrameLowering::emitCSRSpillStores().

◆ findScratchNonCalleeSaveRegister()

◆ findUnusedRegister()

◆ frameTriviallyRequiresSP()

◆ getScratchScaleFactor()

◆ getVGPRSpillLaneOrTempRegister()

Query target location for spilling SGPRs IncludeScratchCopy : Also look for free scratch SGPRs.

Definition at line 73 of file SIFrameLowering.cpp.

References llvm::LiveRegUnits::addReg(), llvm::SIMachineFunctionInfo::addToPrologEpilogSGPRSpills(), llvm::SIMachineFunctionInfo::allocateSGPRSpillToVGPRLane(), llvm::COPY_TO_SCRATCH_SGPR, llvm::dbgs(), findUnusedRegister(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getInfo(), llvm::MachineFunction::getRegInfo(), llvm::SIMachineFunctionInfo::getSGPRSpillToPhysicalVGPRLanes(), llvm::MachineFunction::getSubtarget(), LLVM_DEBUG, llvm::printReg(), llvm::MachineFrameInfo::RemoveStackObject(), llvm::TargetStackID::SGPRSpill, Size, llvm::SPILL_TO_MEM, llvm::SPILL_TO_VGPR_LANE, and TRI.

Referenced by llvm::SIFrameLowering::determinePrologEpilogSGPRSaves().

◆ initLiveUnits()

◆ EnableSpillVGPRToAGPR

cl::opt< bool > EnableSpillVGPRToAGPR("amdgpu-spill-vgpr-to-agpr", cl::desc("Enable spilling VGPRs to AGPRs"), cl::ReallyHidden, cl::init(true)) ( "amdgpu-spill-vgpr-to-agpr" , cl::desc("Enable spilling VGPRs to AGPRs") , cl::ReallyHidden , cl::init(true) ) static