LLVM: llvm::AMDGPULegalizerInfo Class Reference (original) (raw)

#include "[Target/AMDGPU/AMDGPULegalizerInfo.h](AMDGPULegalizerInfo%5F8h%5Fsource.html)"

Definition at line 30 of file AMDGPULegalizerInfo.h.

Definition at line 688 of file AMDGPULegalizerInfo.cpp.

References llvm::alignTo(), llvm::LegalityPredicates::all(), AllS32Vectors, AllS64Vectors, AllVectors, llvm::LegalizeRuleSet::alwaysLegal(), assert(), llvm::bit_floor(), llvm::LegalizeRuleSet::bitcastIf(), bitcastToRegisterType(), bitcastToVectorElement32(), llvm::AMDGPUAS::BUFFER_FAT_POINTER, llvm::AMDGPUAS::BUFFER_RESOURCE, llvm::AMDGPUAS::BUFFER_STRIDED_POINTER, llvm::LegalizeMutations::changeTo(), llvm::LegalizeRuleSet::clampMaxNumElements(), llvm::LegalizeRuleSet::clampMaxNumElementsStrict(), llvm::LegalizeRuleSet::clampNumElements(), llvm::LegalizeRuleSet::clampScalar(), llvm::LegalizeRuleSet::clampScalarOrElt(), llvm::LegacyLegalizerInfo::computeTables(), llvm::AMDGPUAS::CONSTANT_ADDRESS, llvm::AMDGPUAS::CONSTANT_ADDRESS_32BIT, llvm::LegalizeRuleSet::custom(), llvm::LegalizeRuleSet::customFor(), llvm::LegalizeRuleSet::customIf(), llvm::LegalityPredicates::elementTypeIs(), elementTypeIsLegal(), F32, F64, llvm::LegalizeRuleSet::fewerElementsIf(), fewerEltsToSize64Vector(), llvm::LLT::fixed_vector(), llvm::AMDGPUAS::FLAT_ADDRESS, llvm::LegalizerInfo::getActionDefinitionsBuilder(), llvm::LLT::getAddressSpace(), llvm::LLT::getElementType(), llvm::ElementCount::getFixed(), llvm::LegalizerInfo::getLegacyLegalizerInfo(), llvm::LLT::getNumElements(), llvm::TargetMachine::getPointerSizeInBits(), llvm::LLT::getScalarSizeInBits(), getScalarTypeFromMemDesc(), llvm::SIRegisterInfo::getSGPRClassForBitWidth(), llvm::LLT::getSizeInBits(), llvm::AMDGPUAS::GLOBAL_ADDRESS, llvm::has_single_bit(), hasBufferRsrcWorkaround(), isIllegalRegisterType(), isLoadStoreLegal(), llvm::LegalityPredicates::isPointer(), llvm::LLT::isPointer(), llvm::isPowerOf2_32(), isRegisterClassType(), isRegisterType(), llvm::LegalityPredicates::isScalar(), isSmallOddVector(), isTruncStoreToSizePowerOf2(), llvm::LLT::isVector(), isWideVec16(), llvm::LegalityPredicates::largerThan(), llvm::LegalizeRuleSet::legalFor(), llvm::LegalizeRuleSet::legalForCartesianProduct(), llvm::LegalizeRuleSet::legalIf(), llvm::AMDGPUAS::LOCAL_ADDRESS, llvm::Log2_32_Ceil(), llvm::LegalizeRuleSet::lower(), llvm::LegalizeRuleSet::lowerFor(), llvm::LegalizeRuleSet::lowerIf(), MaxRegisterSize, MaxScalar, llvm::LegalizeRuleSet::maxScalar(), llvm::LegalizeRuleSet::maxScalarIf(), maxSizeForAddrSpace(), llvm::LegalizeRuleSet::minScalar(), llvm::LegalizeRuleSet::minScalarOrElt(), llvm::LegalityQuery::MMODescrs, llvm::LegalizeRuleSet::moreElementsIf(), moreElementsToNextExistingRegClass(), moreEltsToNext32Bit(), llvm::Mul, llvm::NotAtomic, numElementsNotEven(), oneMoreElement(), llvm::LLT::pointer(), llvm::AMDGPUAS::PRIVATE_ADDRESS, llvm::AMDGPUAS::REGION_ADDRESS, S1, S128, S16, S256, S32, S512, S64, S8, llvm::LegalityPredicates::sameSize(), llvm::LLT::scalar(), llvm::LegalizeMutations::scalarize(), llvm::LegalizeRuleSet::scalarize(), llvm::LegalityPredicates::scalarNarrowerThan(), llvm::LegalityPredicates::scalarOrEltNarrowerThan(), llvm::LegalityPredicates::scalarOrEltWiderThan(), llvm::LLT::scalarOrVector(), llvm::LegalizeRuleSet::scalarSameSizeAs(), llvm::AMDGPUSubtarget::SEA_ISLANDS, shouldBitcastLoadStoreType(), shouldWidenLoad(), llvm::LegalityPredicates::sizeIs(), sizeIsMultipleOf32(), llvm::LegalityPredicates::smallerThan(), llvm::LegalityPredicates::typeInSet(), llvm::LegalityPredicates::typeIs(), llvm::LegalityPredicates::typeIsNot(), llvm::LegalityQuery::Types, llvm::LegalizeRuleSet::unsupported(), unsupported(), llvm::LegalizeRuleSet::unsupportedFor(), llvm::LegalizeRuleSet::unsupportedIf(), V16S32, V16S64, V2BF16, V2F16, V2S16, V2S32, V2S64, V2S8, V32S32, V4S16, V4S32, vectorSmallerThan(), vectorWiderThan(), verify, llvm::LegalizeRuleSet::widenScalarIf(), llvm::LegalizeMutations::widenScalarOrEltToNextPow2(), llvm::LegalizeRuleSet::widenScalarToNextMultipleOf(), and llvm::LegalizeRuleSet::widenScalarToNextPow2().

◆ buildAbsGlobalAddress()

◆ buildLoadInputValue()

Definition at line 4512 of file AMDGPULegalizerInfo.cpp.

References assert(), B(), llvm::countr_zero(), llvm::getFunctionLiveInPhysReg(), llvm::ArgDescriptor::getMask(), llvm::ArgDescriptor::getRegister(), llvm::ArgDescriptor::isMasked(), llvm::MCRegister::isPhysical(), llvm::Register::isVirtual(), S32, and llvm::LLT::scalar().

Referenced by loadInputValue().

◆ buildMultiply()

Definition at line 4117 of file AMDGPULegalizerInfo.cpp.

References llvm::Add, assert(), B(), llvm::MutableArrayRef< T >::drop_front(), llvm::GISelValueTracking::getKnownBits(), llvm::LegalizerHelper::getValueTracking(), llvm::Hi, llvm::KnownBits::isZero(), llvm::Lo, llvm::LegalizerHelper::MIRBuilder, llvm::Mul, llvm::MutableArrayRef(), llvm::SmallVectorTemplateBase< T, bool >::push_back(), Register, S1, S32, S64, llvm::LLT::scalar(), and llvm::ArrayRef< T >::size().

Referenced by legalizeMul().

◆ buildPCRelGlobalAddress()

◆ fixStoreSourceType()

◆ getImplicitArgPtr()

◆ getKernargParameterPtr()

◆ getKernargSegmentPtrInfo()

◆ getLDSKernelId()

◆ getScaledLogInput()

◆ getSegmentAperture()

Definition at line 2305 of file AMDGPULegalizerInfo.cpp.

References llvm::AMDGPU::AMDHSA_COV5, assert(), B(), llvm::commonAlignment(), llvm::AMDGPUAS::CONSTANT_ADDRESS, llvm::AMDGPU::getAMDHSACodeObjectVersion(), llvm::MachineFunction::getFunction(), getKernargSegmentPtrInfo(), llvm::MachineFunction::getMachineMemOperand(), llvm::GlobalValue::getParent(), llvm::MachineFunction::getSubtarget(), llvm::MachinePointerInfo::getWithOffset(), llvm::AMDGPUFunctionArgInfo::KERNARG_SEGMENT_PTR, loadInputValue(), llvm::AMDGPUAS::LOCAL_ADDRESS, llvm::MachineMemOperand::MODereferenceable, llvm::MachineMemOperand::MOInvariant, llvm::MachineMemOperand::MOLoad, MRI, llvm::Offset, llvm::LLT::pointer(), llvm::AMDGPUAS::PRIVATE_ADDRESS, llvm::AMDGPUTargetLowering::PRIVATE_BASE, llvm::AMDGPUFunctionArgInfo::QUEUE_PTR, Register, S32, S64, llvm::LLT::scalar(), and llvm::AMDGPUTargetLowering::SHARED_BASE.

Referenced by legalizeAddrSpaceCast(), and legalizeIsAddrSpace().

◆ handleD16VData()

Handle register layout difference for f16 images for some subtargets.

Definition at line 6190 of file AMDGPULegalizerInfo.cpp.

References assert(), B(), llvm::LLT::fixed_vector(), llvm::LLT::getElementType(), llvm::LLT::getNumElements(), I, llvm::LLT::isVector(), llvm_unreachable, MRI, llvm::SmallVectorTemplateBase< T, bool >::push_back(), llvm::SmallVectorImpl< T >::resize(), S16, S32, and llvm::LLT::scalar().

Referenced by fixStoreSourceType(), and legalizeImageIntrinsic().

◆ legalizeAddrSpaceCast()

Definition at line 2412 of file AMDGPULegalizerInfo.cpp.

References llvm::AllOnes, assert(), B(), llvm::cast(), llvm::AMDGPUAS::CONSTANT_ADDRESS_32BIT, llvm::AMDGPUAS::FLAT_ADDRESS, llvm::LLT::getAddressSpace(), llvm::MachineFunction::getInfo(), llvm::AMDGPUTargetMachine::getNullPointerValue(), getReg(), getSegmentAperture(), llvm::LLT::getSizeInBits(), llvm::MachineFunction::getTarget(), llvm::CmpInst::ICMP_NE, llvm::isa(), isKnownNonNull(), llvm::AMDGPUTargetMachine::isNoopAddrSpaceCast(), llvm::Register::isValid(), llvm::LLT::isVector(), llvm::AMDGPUAS::LOCAL_ADDRESS, MI, MRI, llvm::AMDGPUAS::PRIVATE_ADDRESS, Register, S32, S64, llvm::LLT::scalar(), and llvm::Sub.

Referenced by legalizeCustom(), and legalizeIntrinsic().

◆ legalizeAtomicCmpXChg()

◆ legalizeBufferAtomic()

◆ legalizeBufferLoad()

Definition at line 6397 of file AMDGPULegalizerInfo.cpp.

References assert(), B(), llvm::LegalizerHelper::bitcastDst(), buildBufferLoad(), castBufferRsrcArgToV4I32(), castBufferRsrcFromV4I32(), llvm::GISelChangeObserver::changedInstr(), llvm::LLT::changeElementSize(), llvm::GISelChangeObserver::changingInstr(), llvm::divideCeil(), llvm::LLT::fixed_vector(), llvm::Format, getBitcastRegisterType(), llvm::MachineMemOperand::getMemoryType(), llvm::LLT::getScalarType(), llvm::LLT::getSizeInBits(), hasBufferRsrcWorkaround(), I, MI, llvm::LegalizerHelper::MIRBuilder, MRI, N, llvm::LegalizerHelper::Observer, Opc, llvm::SmallVectorTemplateBase< T, bool >::push_back(), S32, llvm::LLT::scalar(), shouldBitcastLoadStoreType(), splitBufferOffsets(), and llvm::SmallVectorImpl< T >::truncate().

Referenced by legalizeIntrinsic().

◆ legalizeBufferStore()

Definition at line 6285 of file AMDGPULegalizerInfo.cpp.

References B(), castBufferRsrcArgToV4I32(), fixStoreSourceType(), llvm::Format, llvm::MachineMemOperand::getMemoryType(), llvm::LLT::getScalarType(), llvm::MachineMemOperand::getSize(), llvm::LLT::getSizeInBits(), llvm::LocationSize::getValue(), MI, llvm::LegalizerHelper::MIRBuilder, MRI, Opc, S32, llvm::LLT::scalar(), and splitBufferOffsets().

Referenced by legalizeIntrinsic().

◆ legalizeBuildVector()

◆ legalizeBVHDualOrBVH8IntersectRayIntrinsic()

Definition at line 7597 of file AMDGPULegalizerInfo.cpp.

References assert(), B(), llvm::cast(), llvm::LLVMContext::diagnose(), llvm::LLT::fixed_vector(), llvm::Function::getContext(), llvm::AMDGPU::getMIMGOpcode(), MI, S32, llvm::LLT::scalar(), and V2S32.

Referenced by legalizeIntrinsic().

◆ legalizeBVHIntersectRayIntrinsic()

Definition at line 7445 of file AMDGPULegalizerInfo.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, assert(), B(), llvm::LLVMContext::diagnose(), llvm::LLT::fixed_vector(), llvm::Function::getContext(), llvm::AMDGPU::getMIMGOpcode(), llvm::AMDGPU::isGFX11(), llvm::AMDGPU::isGFX11Plus(), llvm::AMDGPU::isGFX12Plus(), MI, MRI, R2, S16, S32, llvm::LLT::scalar(), V2S16, and V3S32.

Referenced by legalizeIntrinsic().

◆ legalizeBVHIntrinsic()

◆ legalizeConstHwRegRead()

◆ legalizeCTLZ_CTTZ()

◆ legalizeCTLZ_ZERO_UNDEF()

◆ legalizeCustom()

Called for instructions with the Custom LegalizationAction.

Reimplemented from llvm::LegalizerInfo.

Definition at line 2201 of file AMDGPULegalizerInfo.cpp.

References B(), legalizeAddrSpaceCast(), legalizeAtomicCmpXChg(), legalizeBuildVector(), legalizeCTLZ_CTTZ(), legalizeCTLZ_ZERO_UNDEF(), legalizeDebugTrap(), legalizeExtractVectorElt(), legalizeFceil(), legalizeFDIV(), legalizeFExp(), legalizeFExp2(), legalizeFFloor(), legalizeFFREXP(), legalizeFlog2(), legalizeFlogCommon(), legalizeFMad(), legalizeFPow(), legalizeFPTOI(), legalizeFrem(), legalizeFroundeven(), legalizeFSQRT(), legalizeGetFPEnv(), legalizeGlobalValue(), legalizeInsertVectorElt(), legalizeIntrinsicTrunc(), legalizeITOFP(), legalizeLoad(), legalizeMinNumMaxNum(), legalizeMul(), legalizeSetFPEnv(), legalizeSignedDIV_REM(), legalizeSinCos(), legalizeStackSave(), legalizeStore(), legalizeTrap(), legalizeUnsignedDIV_REM(), llvm_unreachable, MI, llvm::LegalizerHelper::MIRBuilder, and MRI.

◆ legalizeDebugTrap()

◆ legalizeExtractVectorElt()

Definition at line 2866 of file AMDGPULegalizerInfo.cpp.

References assert(), B(), llvm::LLT::changeElementType(), llvm::LLT::getElementType(), llvm::getIConstantVRegValWithLookThrough(), llvm::LLT::getNumElements(), llvm::LLT::getSizeInBits(), llvm::LLT::isPointer(), MI, MRI, and llvm::LLT::scalar().

Referenced by legalizeCustom().

◆ legalizeFastUnsafeFDIV()

◆ legalizeFastUnsafeFDIV64()

◆ legalizeFceil()

◆ legalizeFDIV()

◆ legalizeFDIV16()

◆ legalizeFDIV32()

Definition at line 5354 of file AMDGPULegalizerInfo.cpp.

References assert(), B(), llvm::DenormalMode::Dynamic, llvm::DenormalMode::getIEEE(), llvm::SIMachineFunctionInfo::getMode(), legalizeFastUnsafeFDIV(), MI, MRI, llvm::Mul, S1, S32, llvm::LLT::scalar(), SPDenormModeBitField, and toggleSPDenormMode().

Referenced by legalizeFDIV().

◆ legalizeFDIV64()

Definition at line 5441 of file AMDGPULegalizerInfo.cpp.

References llvm::ArrayRef(), B(), llvm::CmpInst::ICMP_EQ, legalizeFastUnsafeFDIV64(), MI, MRI, llvm::Mul, S1, S32, S64, and llvm::LLT::scalar().

Referenced by legalizeFDIV().

◆ legalizeFDIVFastIntrin()

◆ legalizeFExp()

Definition at line 3835 of file AMDGPULegalizerInfo.cpp.

References A(), allowApproxFunc(), assert(), B(), llvm::CallingConv::C, CH, F32, llvm::CmpInst::FCMP_OGT, llvm::CmpInst::FCMP_OLT, llvm::MachineInstr::FmNoInfs, llvm::APFloat::getInf(), getMad(), llvm::APFloatBase::IEEEsingle(), legalizeFExp10Unsafe(), legalizeFExpUnsafe(), legalizeFExpUnsafeImpl(), llvm:🔢:log2ef, MI, MRI, llvm::LLT::scalar(), and X.

Referenced by legalizeCustom().

◆ legalizeFExp10Unsafe()

◆ legalizeFExp2()

◆ legalizeFExpUnsafe()

◆ legalizeFExpUnsafeImpl()

◆ legalizeFFloor()

Definition at line 4026 of file AMDGPULegalizerInfo.cpp.

References assert(), B(), llvm::bit_cast(), F64, llvm::CmpInst::FCMP_ORD, llvm::LLT::float64(), llvm::MachineInstr::FmNoNans, llvm::SIMachineFunctionInfo::getMode(), llvm::SIModeRegisterDefaults::IEEE, MI, MRI, S1, llvm::LLT::scalar(), and stripAnySourceMods().

Referenced by legalizeCustom().

◆ legalizeFFREXP()

◆ legalizeFlog2()

◆ legalizeFlogCommon()

Definition at line 3520 of file AMDGPULegalizerInfo.cpp.

References assert(), B(), llvm::CallingConv::C, CH, F32, llvm::CmpInst::FCMP_OLT, llvm::MachineInstr::FmAfn, llvm::MachineInstr::FmContract, llvm::MachineInstr::FmNoInfs, llvm::MachineInstr::FmNoNans, llvm::APFloat::getInf(), getMad(), getScaledLogInput(), llvm::MachineFunction::getTarget(), llvm::APFloatBase::IEEEsingle(), legalizeFlogUnsafe(), MI, MRI, llvm::TargetOptions::NoNaNsFPMath, llvm::TargetMachine::Options, llvm::LLT::scalar(), X, and Y.

Referenced by legalizeCustom().

◆ legalizeFlogUnsafe()

◆ legalizeFMad()

Definition at line 3353 of file AMDGPULegalizerInfo.cpp.

References assert(), B(), llvm::LLT::float16(), llvm::LLT::float32(), llvm::SIModeRegisterDefaults::FP32Denormals, llvm::SIModeRegisterDefaults::FP64FP16Denormals, llvm::MachineFunction::getInfo(), llvm::SIMachineFunctionInfo::getMode(), llvm::DenormalMode::getPreserveSign(), llvm::LegalizerHelper::Legalized, llvm::LegalizerHelper::lowerFMad(), MI, and MRI.

Referenced by legalizeCustom().

◆ legalizeFPow()

◆ legalizeFPTOI()

Definition at line 2784 of file AMDGPULegalizerInfo.cpp.

References assert(), B(), llvm::bit_cast(), llvm::Hi, llvm::Lo, MI, MRI, llvm::Mul, S32, S64, llvm::LLT::scalar(), and llvm::Signed.

Referenced by legalizeCustom().

◆ legalizeFrem()

◆ legalizeFroundeven()

◆ legalizeFSQRT()

◆ legalizeFSQRTF16()

◆ legalizeFSQRTF32()

Definition at line 5609 of file AMDGPULegalizerInfo.cpp.

References allowApproxFunc(), B(), F32, llvm::CmpInst::FCMP_OGT, llvm::CmpInst::FCMP_OLE, llvm::fcPosInf, llvm::fcZero, MI, MRI, needsDenormHandlingF32(), S1, llvm::LLT::scalar(), and X.

Referenced by legalizeFSQRT().

◆ legalizeFSQRTF64()

Definition at line 5690 of file AMDGPULegalizerInfo.cpp.

References assert(), B(), F64, llvm::CmpInst::FCMP_OLT, llvm::fcPosInf, llvm::fcZero, MI, MRI, S1, S32, llvm::LLT::scalar(), and X.

Referenced by legalizeFSQRT().

◆ legalizeGetFPEnv()

◆ legalizeGlobalValue()

Definition at line 3132 of file AMDGPULegalizerInfo.cpp.

References llvm::AMDGPUMachineFunction::allocateLDSGlobal(), B(), buildAbsGlobalAddress(), buildPCRelGlobalAddress(), llvm::cast(), llvm::AMDGPUAS::CONSTANT_ADDRESS, llvm::LLVMContext::diagnose(), llvm::DS_Warning, llvm::Function::getContext(), llvm::MachineFunction::getFunction(), llvm::MachinePointerInfo::getGOT(), llvm::MachineFunction::getInfo(), llvm::MachineFunction::getMachineMemOperand(), llvm::Value::getName(), llvm::LLT::getSizeInBits(), llvm::GlobalValue::getValueType(), llvm::GlobalValue::hasExternalLinkage(), llvm::AMDGPUMachineFunction::isModuleEntryFunction(), llvm::AMDGPU::isNamedBarrier(), llvm::AMDGPUAS::LOCAL_ADDRESS, MI, llvm::SIInstrInfo::MO_ABS32_LO, llvm::SIInstrInfo::MO_GOTPCREL32, llvm::SIInstrInfo::MO_REL32, llvm::MachineMemOperand::MODereferenceable, llvm::MachineMemOperand::MOInvariant, llvm::MachineMemOperand::MOLoad, MRI, llvm::LLT::pointer(), llvm::AMDGPUAS::REGION_ADDRESS, S32, llvm::LLT::scalar(), llvm::AMDGPUMachineFunction::setDynLDSAlign(), llvm::SITargetLowering::shouldEmitFixup(), llvm::SITargetLowering::shouldEmitPCReloc(), and llvm::SITargetLowering::shouldUseLDSConstAddress().

Referenced by legalizeCustom().

◆ legalizeImageIntrinsic()

Rewrite image intrinsics to use register layouts expected by the subtarget.

Depending on the subtarget, load/store with 16-bit element data need to be rewritten to use the low half of 32-bit registers, or directly use a packed layout. 16-bit addresses should also sometimes be packed into 32-bit registers.

We don't want to directly select image instructions just yet, but also want to exposes all register repacking to the legalizer/combiners. We also don't want a selected instruction entering RegBankSelect. In order to avoid defining a multitude of intermediate image instructions, directly hack on the intrinsic's arguments. In cases like a16 addresses, this requires padding now unnecessary arguments with $noreg.

Definition at line 6823 of file AMDGPULegalizerInfo.cpp.

References llvm::ArrayRef(), assert(), llvm::AMDGPU::MIMGBaseOpcodeInfo::Atomic, llvm::AMDGPU::MIMGBaseOpcodeInfo::AtomicX2, B(), llvm::AMDGPU::ImageDimIntrinsicInfo::BaseOpcode, llvm::AMDGPU::MIMGBaseOpcodeInfo::BaseOpcode, llvm::GISelChangeObserver::changedInstr(), llvm::GISelChangeObserver::changingInstr(), Concat, convertImageAddrToPacked(), llvm::AMDGPU::ImageDimIntrinsicInfo::CoordStart, llvm::MachineOperand::CreateImm(), llvm::AMDGPU::ImageDimIntrinsicInfo::DMaskIndex, llvm::LLT::fixed_vector(), llvm::AMDGPU::MIMGBaseOpcodeInfo::Gather4, llvm::ElementCount::getFixed(), llvm::SrcOp::getImm(), llvm::AMDGPU::getMIMGBaseOpcodeInfo(), llvm::SrcOp::getReg(), llvm::LLT::getScalarType(), llvm::LLT::getSizeInBits(), llvm::AMDGPU::MIMGBaseOpcodeInfo::Gradients, llvm::AMDGPU::ImageDimIntrinsicInfo::GradientStart, handleD16VData(), I, llvm::LLT::isVector(), llvm::make_scope_exit(), MI, MRI, llvm::AMDGPU::MIMGBaseOpcodeInfo::NoReturn, llvm::AMDGPU::ImageDimIntrinsicInfo::NumVAddrs, packImage16bitOpsToDwords(), llvm::popcount(), llvm::SmallVectorTemplateBase< T, bool >::push_back(), llvm::SmallVectorImpl< T >::resize(), S16, S32, llvm::AMDGPU::MIMGBaseOpcodeInfo::Sampler, llvm::LLT::scalar(), llvm::LLT::scalarOrVector(), llvm::SmallVectorTemplateCommon< T, typename >::size(), llvm::AMDGPU::MIMGBaseOpcodeInfo::Store, V2S16, V4S16, and llvm::AMDGPU::ImageDimIntrinsicInfo::VAddrStart.

Referenced by legalizeIntrinsic().

◆ legalizeImplicitArgPtr()

◆ legalizeInsertVectorElt()

Definition at line 2917 of file AMDGPULegalizerInfo.cpp.

References assert(), B(), llvm::LLT::changeElementType(), llvm::LLT::getElementType(), llvm::getIConstantVRegValWithLookThrough(), llvm::LLT::getNumElements(), llvm::LLT::getSizeInBits(), llvm::LLT::isPointer(), MI, MRI, llvm::SmallVectorTemplateBase< T, bool >::push_back(), and llvm::LLT::scalar().

Referenced by legalizeCustom().

◆ legalizeIntrinsic()

Returns

true if MI is either legal or has been legalized and false if not legal. Return true if MI is either legal or has been legalized and false if not legal.

Reimplemented from llvm::LegalizerInfo.

Definition at line 7738 of file AMDGPULegalizerInfo.cpp.

References assert(), B(), llvm::cast(), llvm::GISelChangeObserver::changedInstr(), llvm::GISelChangeObserver::changingInstr(), llvm::AMDGPUFunctionArgInfo::CLUSTER_WORKGROUP_ID_X, llvm::AMDGPUFunctionArgInfo::CLUSTER_WORKGROUP_ID_Y, llvm::AMDGPUFunctionArgInfo::CLUSTER_WORKGROUP_ID_Z, llvm::AMDGPUFunctionArgInfo::CLUSTER_WORKGROUP_MAX_FLAT_ID, llvm::AMDGPUFunctionArgInfo::CLUSTER_WORKGROUP_MAX_ID_X, llvm::AMDGPUFunctionArgInfo::CLUSTER_WORKGROUP_MAX_ID_Y, llvm::AMDGPUFunctionArgInfo::CLUSTER_WORKGROUP_MAX_ID_Z, llvm::AMDGPUFunctionArgInfo::DISPATCH_ID, llvm::AMDGPUFunctionArgInfo::DISPATCH_PTR, llvm::AMDGPU::getImageDimIntrinsicInfo(), llvm::MachineInstr::getOperand(), llvm::AMDGPU::Hwreg::ID_IB_STS2, llvm::AMDGPUFunctionArgInfo::IMPLICIT_BUFFER_PTR, llvm::AMDGPU::isKernel(), llvm::AMDGPUFunctionArgInfo::KERNARG_SEGMENT_PTR, llvm::AMDGPUFunctionArgInfo::LDS_KERNEL_ID, legalizeAddrSpaceCast(), legalizeBufferAtomic(), legalizeBufferLoad(), legalizeBufferStore(), legalizeBVHDualOrBVH8IntersectRayIntrinsic(), legalizeBVHIntersectRayIntrinsic(), legalizeConstHwRegRead(), legalizeFDIVFastIntrin(), legalizeImageIntrinsic(), legalizeImplicitArgPtr(), legalizeIsAddrSpace(), legalizeKernargMemParameter(), legalizeLaneOp(), legalizePointerAsRsrcIntrin(), legalizePreloadedArgIntrin(), legalizeRsqClampIntrinsic(), legalizeSBufferLoad(), legalizeSBufferPrefetch(), legalizeWaveID(), legalizeWorkGroupId(), legalizeWorkitemIDIntrinsic(), llvm::AMDGPUAS::LOCAL_ADDRESS, llvm::SI::KernelInputOffsets::LOCAL_SIZE_X, llvm::SI::KernelInputOffsets::LOCAL_SIZE_Y, llvm::SI::KernelInputOffsets::LOCAL_SIZE_Z, MI, llvm::LegalizerHelper::MIRBuilder, MRI, llvm::SI::KernelInputOffsets::NGROUPS_X, llvm::SI::KernelInputOffsets::NGROUPS_Y, llvm::SI::KernelInputOffsets::NGROUPS_Z, llvm::LegalizerHelper::Observer, llvm::AMDGPUAS::PRIVATE_ADDRESS, llvm::AMDGPUFunctionArgInfo::QUEUE_PTR, S32, S64, llvm::LLT::scalar(), llvm::MachineOperand::setMBB(), std::swap(), TRI, verifyCFIntrinsic(), llvm::AMDGPUFunctionArgInfo::WORKGROUP_ID_X, llvm::AMDGPUFunctionArgInfo::WORKGROUP_ID_Y, llvm::AMDGPUFunctionArgInfo::WORKGROUP_ID_Z, llvm::AMDGPUFunctionArgInfo::WORKITEM_ID_X, llvm::AMDGPUFunctionArgInfo::WORKITEM_ID_Y, and llvm::AMDGPUFunctionArgInfo::WORKITEM_ID_Z.

◆ legalizeIntrinsicTrunc()

Definition at line 2682 of file AMDGPULegalizerInfo.cpp.

References assert(), B(), extractF64Exponent(), llvm::Hi, llvm::CmpInst::ICMP_SGT, llvm::CmpInst::ICMP_SLT, MI, MRI, S1, S32, S64, and llvm::LLT::scalar().

Referenced by legalizeCustom().

◆ legalizeIsAddrSpace()

Definition at line 6106 of file AMDGPULegalizerInfo.cpp.

References B(), getReg(), getSegmentAperture(), llvm::CmpInst::ICMP_EQ, llvm::CmpInst::ICMP_ULT, MI, MRI, llvm::AMDGPUAS::PRIVATE_ADDRESS, Register, S32, and llvm::LLT::scalar().

Referenced by legalizeIntrinsic().

◆ legalizeITOFP()

◆ legalizeKernargMemParameter()

◆ legalizeLaneOp()

Definition at line 5837 of file AMDGPULegalizerInfo.cpp.

References B(), llvm::LLT::changeElementCount(), llvm::LLT::getElementType(), llvm::ElementCount::getFixed(), llvm::MachineInstrBuilder::getReg(), llvm::LLT::getSizeInBits(), llvm::AMDGPU::isLegalDPALU_DPPControl(), llvm_unreachable, MI, llvm::LegalizerHelper::MIRBuilder, MRI, llvm::SmallVectorTemplateBase< T, bool >::push_back(), S32, llvm::LLT::scalar(), and Size.

Referenced by legalizeIntrinsic().

◆ legalizeLDSKernelId()

◆ legalizeLoad()

Definition at line 3246 of file AMDGPULegalizerInfo.cpp.

References B(), castBufferRsrcFromV4I32(), llvm::GISelChangeObserver::changedInstr(), llvm::GISelChangeObserver::changingInstr(), llvm::AMDGPUAS::CONSTANT_ADDRESS, llvm::AMDGPUAS::CONSTANT_ADDRESS_32BIT, llvm::LLT::getAddressSpace(), llvm::MachineMemOperand::getAlign(), llvm::MachineFunction::getMachineMemOperand(), llvm::MachineMemOperand::getMemoryType(), llvm::LLT::getSizeInBits(), hasBufferRsrcWorkaround(), isRegisterType(), llvm::LLT::isVector(), MI, llvm::LegalizerHelper::MIRBuilder, MRI, llvm::LegalizerHelper::Observer, llvm::LLT::pointer(), llvm::PowerOf2Ceil(), shouldWidenLoad(), llvm::Align::value(), and widenToNextPowerOf2().

Referenced by legalizeCustom().

◆ legalizeMinNumMaxNum()

◆ legalizeMul()

Definition at line 4370 of file AMDGPULegalizerInfo.cpp.

References assert(), B(), buildMultiply(), llvm::AMDGPUSubtarget::GFX10, MI, llvm::LegalizerHelper::MIRBuilder, MRI, llvm::SmallVectorTemplateBase< T, bool >::push_back(), S32, llvm::LLT::scalar(), and Size.

Referenced by legalizeCustom().

◆ legalizePointerAsRsrcIntrin()

◆ legalizePreloadedArgIntrin()

◆ legalizeRsqClampIntrinsic()

◆ legalizeSBufferLoad()

Definition at line 7222 of file AMDGPULegalizerInfo.cpp.

References assert(), B(), llvm::LegalizerHelper::bitcastDst(), castBufferRsrcFromV4I32(), llvm::GISelChangeObserver::changedInstr(), llvm::GISelChangeObserver::changingInstr(), getBitcastRegisterType(), llvm::Function::getContext(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getMachineMemOperand(), getPow2ScalarType(), getPow2VectorType(), llvm::getTypeForLLT(), hasBufferRsrcWorkaround(), llvm::isPowerOf2_32(), MI, llvm::LegalizerHelper::MIRBuilder, llvm::MachineMemOperand::MODereferenceable, llvm::MachineMemOperand::MOInvariant, llvm::MachineMemOperand::MOLoad, llvm::LegalizerHelper::moreElementsVectorDst(), llvm::LegalizerHelper::Observer, Opc, llvm::LLT::scalar(), shouldBitcastLoadStoreType(), Size, and llvm::LegalizerHelper::widenScalarDst().

Referenced by legalizeIntrinsic().

◆ legalizeSBufferPrefetch()

◆ legalizeSetFPEnv()

◆ legalizeSignedDIV_REM()

◆ legalizeSinCos()

◆ legalizeStackSave()

◆ legalizeStore()

◆ legalizeTrap()

◆ legalizeTrapEndpgm()

Definition at line 7318 of file AMDGPULegalizerInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMBB(), llvm::MachineBasicBlock::addSuccessor(), B(), llvm::BuildMI(), llvm::MachineFunction::CreateMachineBasicBlock(), DL, llvm::MachineBasicBlock::end(), llvm::MachineBasicBlock::getParent(), MI, MRI, llvm::MachineFunction::push_back(), llvm::MachineBasicBlock::splitAt(), and llvm::MachineBasicBlock::succ_empty().

Referenced by legalizeTrap().

◆ legalizeTrapHsa()

◆ legalizeTrapHsaQueuePtr()

Definition at line 7347 of file AMDGPULegalizerInfo.cpp.

References llvm::AMDGPU::AMDHSA_COV5, B(), llvm::commonAlignment(), llvm::AMDGPUAS::CONSTANT_ADDRESS, llvm::AMDGPU::getAMDHSACodeObjectVersion(), llvm::MachineFunction::getFunction(), getKernargSegmentPtrInfo(), llvm::MachineFunction::getMachineMemOperand(), llvm::GlobalValue::getParent(), llvm::MachinePointerInfo::getWithOffset(), llvm::RegState::Implicit, llvm::AMDGPUFunctionArgInfo::KERNARG_SEGMENT_PTR, llvm::GCNSubtarget::LLVMAMDHSATrap, loadInputValue(), MI, llvm::MachineMemOperand::MODereferenceable, llvm::MachineMemOperand::MOInvariant, llvm::MachineMemOperand::MOLoad, MRI, llvm::Offset, llvm::LLT::pointer(), llvm::AMDGPUFunctionArgInfo::QUEUE_PTR, llvm::AMDGPUTargetLowering::QUEUE_PTR, S64, and llvm::LLT::scalar().

Referenced by legalizeTrap().

◆ legalizeUnsignedDIV_REM()

◆ legalizeUnsignedDIV_REM32Impl()

◆ legalizeUnsignedDIV_REM64Impl()

◆ legalizeWaveID()

◆ legalizeWorkGroupId()

Definition at line 4544 of file AMDGPULegalizerInfo.cpp.

References B(), llvm::AMDGPU::ClusterDimsAttr::FixedDims, llvm::SIMachineFunctionInfo::getClusterDims(), llvm::AMDGPU::ClusterDimsAttr::getKind(), llvm::CmpInst::ICMP_EQ, llvm_unreachable, loadInputValue(), MI, MRI, llvm::AMDGPU::ClusterDimsAttr::NoCluster, S32, llvm::LLT::scalar(), llvm::AMDGPU::ClusterDimsAttr::Unknown, and llvm::AMDGPU::ClusterDimsAttr::VariableDims.

Referenced by legalizeIntrinsic().

◆ legalizeWorkitemIDIntrinsic()

◆ loadInputValue()

Definition at line 4612 of file AMDGPULegalizerInfo.cpp.

References llvm::CallingConv::AMDGPU_Gfx, B(), buildLoadInputValue(), llvm::AMDGPUFunctionArgInfo::CLUSTER_WORKGROUP_ID_X, llvm::AMDGPUFunctionArgInfo::CLUSTER_WORKGROUP_ID_Y, llvm::AMDGPUFunctionArgInfo::CLUSTER_WORKGROUP_ID_Z, llvm::AMDGPUFunctionArgInfo::CLUSTER_WORKGROUP_MAX_FLAT_ID, llvm::AMDGPUFunctionArgInfo::CLUSTER_WORKGROUP_MAX_ID_X, llvm::AMDGPUFunctionArgInfo::CLUSTER_WORKGROUP_MAX_ID_Y, llvm::AMDGPUFunctionArgInfo::CLUSTER_WORKGROUP_MAX_ID_Z, llvm::ArgDescriptor::createRegister(), llvm::SIMachineFunctionInfo::getClusterDims(), llvm::AMDGPU::ClusterDimsAttr::getDims(), llvm::SIMachineFunctionInfo::getPreloadedValue(), llvm::SIMachineFunctionInfo::hasWorkGroupIDZ(), llvm::AMDGPU::isCompute(), llvm::AMDGPU::isEntryFunctionCC(), llvm::AMDGPU::ClusterDimsAttr::isFixedDims(), llvm::AMDGPUFunctionArgInfo::KERNARG_SEGMENT_PTR, N, llvm::LLT::scalar(), llvm::AMDGPUFunctionArgInfo::WORKGROUP_ID_X, llvm::AMDGPUFunctionArgInfo::WORKGROUP_ID_Y, and llvm::AMDGPUFunctionArgInfo::WORKGROUP_ID_Z.

Referenced by getImplicitArgPtr(), getKernargParameterPtr(), getSegmentAperture(), legalizePreloadedArgIntrin(), legalizeTrapHsaQueuePtr(), legalizeWorkGroupId(), and legalizeWorkitemIDIntrinsic().

◆ splitBufferOffsets()

The documentation for this class was generated from the following files:

• lib/Target/AMDGPU/AMDGPULegalizerInfo.h
• lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp